委員歴
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2017年06月-2023年05月
電子情報通信学会エレクトロニクスソサエティ 集積回路研究専門委員会 専門委員
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2020年11月-2021年07月
電子情報通信学会 集積回路設計技術に関する小特集編集委員会
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2013年05月-2019年09月
IEEE ESSCIRC Technical program committee
2024/11/02 更新
電子情報通信学会エレクトロニクスソサエティ 集積回路研究専門委員会 専門委員
電子情報通信学会 集積回路設計技術に関する小特集編集委員会
IEEE ESSCIRC Technical program committee
電子情報通信学会
IEEE
エネルギー・ハーベスティング
IoT
電子回路設計
Test of Time Award
2023年06月 Symposium on VLSI Technology and Circuits
IEEE Fellow
2016年01月 IEEE
A Low-Power BL Path Design for NAND Flash Based on an Existing NAND Interface
Hikaru Makino, Toru Tanzawa
Journal of Low Power Electronics and Applications 14 ( 1 ) 1 - 16 2024年02月 [査読有り]
Modeling of Cross-Coupled AC–DC Charge Pump Operating in Subthreshold Region
Ryoma Kotsubo, Toru Tanzawa
Electronics 12 ( 24 ) 5031 - 5031 2023年12月 [査読有り]
担当区分:責任著者
A −31.7 dBm Sensitivity 0.011mm2 CMOS On-Chip Rectifier for Microwave Wireless Power Transfer
Takuma Hashimoto, Hikaru Nekozuka, Yoshitaka Toeda, Masayuki Otani, Yasuhiko Fukuoka, Toru Tanzawa
Electronics ( 6 ) 2023年03月 [査読有り]
A Charge Loss Aware Advanced Model of Dickson Voltage Multipliers
Andrea Ballo, Alfio Dario Grasso, Gaetano Palumbo, Toru Tanzawa
IEEE Access 10 2022年11月 [査読有り]
Hashimoto, T., Tanzawa, T.
Electronics (Switzerland) 11 ( 19 ) 2022年10月 [査読有り]
More Enhanced Swing Colpitts Oscillators: A Circuit Analysis
Nomura, T., Tanzawa, T.
Electronics (Switzerland) 11 ( 18 ) 2022年09月 [査読有り]
Pre-Emphasis Pulse Design for Reducing Bit-Line Access Time in NAND Flash Memory
Kondo, J., Tanzawa, T.
Electronics (Switzerland) 11 ( 13 ) 1926 2022年06月 [査読有り]
Demura, Y., Tanzawa, T.
Electronics (Switzerland) 11 ( 12 ) 1874 2022年06月 [査読有り]
An optimum structure of scalable capacitors in 3d crosspoint memory technology
Tone, Y., Tanzawa, T.
Electronics (Switzerland) 10 ( 22 ) 2755 2021年11月 [査読有り]
Charge Pumps for Ultra-Low-Power Applications: Analysis, Design, and New Solutions
Andrea Ballo, Alfio Dario Grasso, Gaetano Palumbo, Toru Tanzawa
IEEE Transactions on Circuits and Systems II: Express Briefs 68 ( 8 ) 2021年08月 [査読有り]
Pre-emphasis pulse design for random-access memory
Sugiura, Y., Tanzawa, T.
Electronics (Switzerland) 10 ( 12 ) 2021年06月 [査読有り]
A circuit analysis of pre-emphasis pulses for RC delay lines
Matsuyama, K., Tanzawa, T.
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences 1 ( 6 ) 912 - 926 2021年06月 [査読有り]
Koketsu, K., Tanzawa, T.
Electronics (Switzerland) 10 ( 10 ) 2021年05月 [査読有り]
Ishida, Y., Tanzawa, T.
Electronics (Switzerland) 10 ( 10 ) 2021年05月 [査読有り]
An optimum design of clocked AC-DC charge pump circuits for vibration energy harvesting
Ye, J., Tanzawa, T.
Electronics (Switzerland) 9 ( 12 ) 2020年12月 [査読有り]
A fully integrated clocked AC-DC charge pump for mignetostrictive vibration energy harvesting
Kawauchi, H., Tanzawa, T.
Electronics (Switzerland) 9 ( 12 ) 2020年12月 [査読有り]
Linear distribution of capacitance in Dickson charge pumps to reduce rise time
Andrea Ballo, Alfio Dario Grasso, Gaetano Palumbo, Toru Tanzawa
International Journal of Circuit Theory and Applications 48 ( 4 ) 2020年04月 [査読有り]
Toru Tanzawa
Proceedings of the Ieee Asia-pacific Microwave Conference (apmc) 2019年
Toward a Minimum-Operating-Voltage Design of DC-DC Charge Pump Circuits for Energy Harvesting
Toru Tanzawa
IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS 2019年
Design of Pre-Emphasis Pulses for Large Memory Arrays with Minimal Word-Line Delay Time
Toru Tanzawa
IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS 2019年
Toru Tanzawa
IEEE Transactions on Circuits and Systems II: Express Briefs 65 ( 11 ) 1664 - 1667 2018年11月 [査読有り]
Design considerations on power, performance, reliability and yield in 3D NAND technology
Toru Tanzawa
IEICE Transactions on Electronics E101C ( 1 ) 78 - 81 2018年01月 [査読有り]
An Analytical Model of Charge Pump DC-DC Voltage Multiplier Using Diodes
Toru Tanzawa
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E100A ( 5 ) 1137 - 1144 2017年05月 [査読有り]
An Analytical Model of AC-DC Charge Pump Voltage Multipliers
Toru Tanzawa
IEICE TRANSACTIONS ON ELECTRONICS E99C ( 1 ) 108 - 118 2016年01月 [査読有り]
system overview and key design considerations
Tanzawa, T.
Analog Circuits and Signal Processing 2016年
On-chip High-Voltage Generator Design: Design Methodology for Charge Pumps: Second Edition
Tanzawa, T.
On-chip High-Voltage Generator Design: Design Methodology for Charge Pumps: Second Edition 2015年
A Comprehensive Optimization Methodology for Designing Charge Pump Voltage Multipliers
Toru Tanzawa
2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) 1358 - 1361 2015年 [査読有り]
An Analytical Model of AC-DC Voltage Multipliers
Toru Tanzawa
2014 21ST IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS) 323 - 326 2014年 [査読有り]
Design of DC-DC Switched-Capacitor Voltage Multiplier driven by DC Energy Transducer
Toru Tanzawa
2014 21ST IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS) 327 - 330 2014年 [査読有り]
Dickson Charge Pump Circuit Design with Parasitic Resistance in Power Lines
Toru Tanzawa
IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS 2009年
Toru Tanzawa
IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS 2008年
A 2.4-GHz temperature-compensated CMOS LC-VCO for low frequency drift low-power direct-modulation GFSK transmitters
T Tanzawa, K Agawa, H Shibayama, R Terauchi, K Hisano, H Ishikuro, S Kousai, H Kobayashi, H Majima, T Takayama, M Koizumi, F Hatori
IEICE TRANSACTIONS ON ELECTRONICS E88C ( 4 ) 490 - 495 2005年04月 [査読有り]
A 44-mm(2) four-bank eight-word page-read 64-Mb flash memory with flexible block redundancy and fast accurate word-line voltage controller
T Tanzawa, A Umezawa, T Taura, H Shiga, T Hara, Y Takano, T Miyaba, N Tokiwa, K Watanabe, H Watanabe, K Masuda, K Naruke, H Kato, S Atsumi
IEEE JOURNAL OF SOLID-STATE CIRCUITS 37 ( 11 ) 1485 - 1492 2002年11月 [査読有り]
Circuit techniques for a 1.8-V-only NAND flash memory
T Tanzawa, T Tanaka, K Takeuchi, H Nakamura
IEEE JOURNAL OF SOLID-STATE CIRCUITS 37 ( 1 ) 84 - 89 2002年01月 [査読有り]
Wordline voltage generating system for low-power low-voltage flash memories
T Tanzawa, A Umezawa, M Kuriyama, T Taura, H Banba, T Miyaba, H Shiga, Y Takano, S Atsumi
IEEE JOURNAL OF SOLID-STATE CIRCUITS 36 ( 1 ) 55 - 63 2001年01月 [査読有り]
A channel-erasing 1.8-V-only 32-Mb NOR flash EEPROM with a bitline direct sensing scheme
S Atsumi, A Umezawa, T Tanzawa, T Taura, H Shiga, Y Takano, T Miyaba, M Matsui, H Watanabe, K Isobe, S Kitamura, S Yamada, M Saito, S Mori, T Watanabe
IEEE JOURNAL OF SOLID-STATE CIRCUITS 35 ( 11 ) 1648 - 1654 2000年11月 [査読有り]
Design of a sense circuit for low-voltage flash memories
T Tanzawa, Y Takano, T Taura, S Atsumi
IEEE JOURNAL OF SOLID-STATE CIRCUITS 35 ( 10 ) 1415 - 1421 2000年10月 [査読有り]
Optimization of word-line booster circuits for low-voltage flash memories
T Tanzawa, S Atsumi
IEEE JOURNAL OF SOLID-STATE CIRCUITS 34 ( 8 ) 1091 - 1098 1999年08月 [査読有り]
A CMOS bandgap reference circuit with sub-1-V operation
H Banba, H Shiga, A Umezawa, T Miyaba, T Tanzawa, S Atsumi, K Sakui
IEEE JOURNAL OF SOLID-STATE CIRCUITS 34 ( 5 ) 670 - 674 1999年05月 [査読有り]
A multipage cell architecture for high-speed programming multilevel NAND flash memories
K Takeuchi, T Tanaka, T Tanzawa
IEEE JOURNAL OF SOLID-STATE CIRCUITS 33 ( 8 ) 1228 - 1238 1998年08月 [査読有り]
A dynamic analysis of the Dickson charge pump circuit
T Tanzawa, T Tanaka
IEEE JOURNAL OF SOLID-STATE CIRCUITS 32 ( 8 ) 1231 - 1240 1997年08月 [査読有り]
A stable programming pulse generator for single power supply flash memories
T Tanzawa, T Tanaka
IEEE JOURNAL OF SOLID-STATE CIRCUITS 32 ( 6 ) 845 - 851 1997年06月 [査読有り]
A compact on-chip ECC for low cost flash memories
T Tanzawa, T Tanaka, K Takeuchi, R Shirota, S Aritome, H Watanabe, G Kemink, K Shimizu, S Sato, Y Takeucki, K Ohuchi
IEEE JOURNAL OF SOLID-STATE CIRCUITS 32 ( 5 ) 662 - 669 1997年05月 [査読有り]
QUANTUM-MECHANICS OF A PARTICLE CONFINED TO A TWISTED RING
S TAKAGI, T TANZAWA
PROGRESS OF THEORETICAL PHYSICS 87 ( 3 ) 561 - 568 1992年03月 [査読有り]
QUANTUM-MECHANICS OF A PARTICLE ON A CURVED SURFACE - COMPARISON OF 3 DIFFERENT APPROACHES
Toru Tanzawa
Progress of Theoretical Physics 88 ( 2 ) 229 - 249 1992年02月 [査読有り]
Fully-Integrated Power Management Circuits for Thermoelectric Energy Harvesting
Toru Tanzawa( 担当: 単著)
Springer Nature 2024年06月 ISBN: 9783031597886
On-chip High-Voltage Generator Design: Design Methodology for Charge Pumps, 2nd edition
T. Tanzawa( 担当: 単著)
Springer 2015年10月
Power Aware Design Methodologies
T. Tanzawa( 担当: 共著)
Kluwer Academic Publishers 2002年01月
IoTエッジ端末の長寿命化電源回路設計技術
丹沢徹 [招待有り]
電子情報通信学会ソサエティ大会
発表年月: 2024年09月
A Design of Battery Charger Boost Converters Operating at Input Voltages Below 10 mV for Energy Harvesting
Wataru Saito, Toru Tanzawa
TJCAS2024
発表年月: 2024年08月
NAND Flash Design for 30% Power Reduction
Toru Tanzawa
FMS (Previously "Flash Memory Summit", Currently "Future of Memory and Storage")
発表年月: 2024年08月
電圧振幅拡大型コルピッツ・オシレータを用いた昇圧回路の設計と動作実証
稲葉泰誠, 丹沢徹
LSIとシステムワークショップ 2024
発表年月: 2024年05月
低電圧電源バッテリ充電器のスイッチング・レギュレータ設計
齋藤航, 丹沢徹
LSIとシステムワークショップ 2024
発表年月: 2024年05月
熱電素子バッテリ直列接続型バッテリ充電回路の充電効率最大化
山本 究太郎, 丹沢 徹
電子情報通信学会総合大会
発表年月: 2024年03月
論理回路電源電圧下限の解析
平野 敬祐, 丹沢 徹
電子情報通信学会総合大会
発表年月: 2024年03月
100mV以下の電源から1.5Vバッテリを充電するチャージポンプの設計
樋口 愛莉, 丹沢 徹
電子情報通信学会総合大会
発表年月: 2024年03月
NANDフラッシュの高速化と低電力化を同時に実現する動的ビット線分割方式
杉澤 有右太, 丹沢 徹
電子情報通信学会総合大会
発表年月: 2024年03月
バッテリ充電器用バッテリ電圧監視回路の回路面積最小化設計
佐藤 光翼, 丹沢 徹
電子情報通信学会総合大会
発表年月: 2024年03月
高インピーダンス発電素子用Switched capacitor降圧コンバータの性能比較: 直並切替型対Dickson型
宮崎 直人, 丹沢 徹
電子情報通信学会総合大会
発表年月: 2024年03月
電圧振幅拡大型コルピッツオシレータを用いたDC-DC昇圧回路の動作実証
稲葉 泰誠, 丹沢 徹
電子情報通信学会総合大会
発表年月: 2024年03月
熱電素子バッテリ直列接続型バッテリ充電回路のMPPT回路設計
田辺 駿介, 丹沢 徹
電子情報通信学会総合大会
発表年月: 2024年03月
差動型LC発振器駆動チャージポンプの昇圧特性評価
植村寛太, 丹沢 徹
電子情報通信学会総合大会
発表年月: 2024年03月
Fully-Integrated Power Management Circuits for Thermoelectric Energy Harvesting: Fundamentals and Challenges
Toru Tanzawa [招待有り]
Tutorial at the IEEE 30th International Conference on Electronics, Circuits and Systems (ICECS)
発表年月: 2023年12月
高い電力変換効率と低コスト化を目指したエナジーハーベスト用電源回路
丹沢 徹 [招待有り]
電子情報技術産業協会にてスマートセンシングとその社会実装技術分科会
発表年月: 2023年11月
IoT端末 環境発電でバッテリー交換の手間を省きます!
丹沢 徹
イノベーション・ジャパン2023
発表年月: 2023年08月
A Hybrid Thermoelectric Generator – Battery Power Supply System Toward Replacement-Free Battery
S. Tanabe, Y. Sakamoto, H. Uchida, T. Tanzawa
International Conference on Power Electronics - ECCE Asia
発表年月: 2023年05月
静電振動発電用降圧コンバータの設計
宮崎直人, 丹沢徹
LSIとシステムのワークショップ
発表年月: 2023年05月
極低電圧電源動作バッテリ充電器の設計
齋藤航, 丹沢徹
LSIとシステムのワークショップ
発表年月: 2023年05月
振幅拡大型コルピッツ・オシレータとそれを利用したオンチップ昇圧回路の設計
稲葉泰誠, 野村達也, 丹沢 徹
LSIとシステムのワークショップ
発表年月: 2023年05月
LC発振器駆動チャージポンプの設計
植村寛太, 丹沢 徹
LSIとシステムのワークショップ
発表年月: 2023年05月
NANDフラッシュ用ブースト・コンバータの高速昇圧動作設計
金山湧司, 丹沢 徹
電子情報通信学会/電子通信エネルギー技術研究会
発表年月: 2023年01月
無線電力伝送用ラッチ型RF-DCチャージポンプの回路モデル
小坪稜麻, 丹沢 徹
電子情報通信学会/電子通信エネルギー技術研究会
発表年月: 2023年01月
バッテリーと熱電発電素子からなるハイブリッド電源用DC-DCコンバータ設計
田辺駿介, 丹沢 徹
電子情報通信学会/電子通信エネルギー技術研究会
発表年月: 2023年01月
CMOSクロスカップル型RF-DCチャージポンプの回路モデル
小坪稜麻, 丹沢 徹
Young CAS Researchers Workshop
発表年月: 2022年11月
NANDフラッシュ用ブースト・コンバータの高速昇圧動作方式
金山湧司, 丹沢 徹
Young CAS Researchers Workshop
発表年月: 2022年11月
IoT端末のバッテリ交換を不要とするハイブリッド電源回路
田辺駿介, 酒本陽介, 丹沢 徹
Young CAS Researchers Workshop
発表年月: 2022年11月
H. Makino, T. Tanzawa
Asia Pacific Conference on Postgraduate Research in Microelectronics & Electronics (PrimeAsia) in 2022 IEEE the 18th Asia Pacific Conference on Circuits and Systems
発表年月: 2022年11月
バッテリー交換不要の熱電発電用電源回路
丹沢 徹
イノベーション・ジャパン2022
発表年月: 2022年10月
Antenna/On-Chip-Rectifier Co-Design Methodology for Micro-Watt Microwave Wireless Power Transfer
T. Hashimoto, T. Tanzawa
65th IEEE International Midwest Symposium on Circuits and Systems(MWSCAS 2022)
発表年月: 2022年08月
マイクロ波無線電力伝送レクテナの入力パワー最小化設計
橋本拓磨, 丹沢 徹
LSIとシステムのワークショップ
発表年月: 2022年05月
NANDフラッシュ用ブースト・コンバータの最速昇圧方式の提案
金山湧司, 丹沢 徹
LSIとシステムのワークショップ
発表年月: 2022年05月
CMOSラッチ型チャージポンプの出力抵抗モデル
小坪稜麻, 丹沢 徹
LSIとシステムのワークショップ
発表年月: 2022年05月
熱電素子・バッテリーのハイブリッド電源用DC/DC コンバータの設計
田辺駿介, 酒本陽介, 丹沢 徹
LSIとシステムのワークショップ
発表年月: 2022年05月
環境温度が変動時しても常に出力電力を最大にする熱電発電用チャージポンプ回路システムの設計
濃野公一, 丹沢 徹
LSIとシステムのワークショップ
発表年月: 2022年05月
NANDフラッシュの読み出し動作に伴うビット線パスの電力を60%削減する回路設計
牧野 耀, 丹沢 徹
LSIとシステムのワークショップ
発表年月: 2022年05月
インターフェースの変更なしにアレイアクセスの消費電力を30%低減するNANDフラッシュ用センス回路設計
牧野 耀, 丹沢 徹
電子情報通信学会・集積回路研究会
発表年月: 2022年04月
回路面積最小でMPPTを実現する熱電発電用チャージポンプ電源回路システムの設計
濃野公一, 丹沢 徹
2021年電子情報通信学会ソサイエティ大会
発表年月: 2021年09月
開放交流電圧が10V を超える静電発電素子から1V トランジスタだけで直流1V に変換するインターフェース回路の設計
石田 遥祐, 丹沢 徹
電子情報通信学会 集積回路研究会
発表年月: 2021年08月
K. Nono, T. Tanzawa
IEICE general conference
発表年月: 2021年03月
A Design Guideline of Scalable Capacitors in 3D Cross-Point Memory
Y. Tone, T. Tanzawa
IEICE general conference
発表年月: 2021年03月
A Study of Sensing Schemes for NAND Flash: Shielded Bit-Line vs. All Bit-Line
H. Makino, T. Tanzawa
IEICE general conference
発表年月: 2021年03月
T. Hashimoto, T. Tanzawa
IEICE general conference
発表年月: 2021年03月
A Design of Cold Start Charge Pump for Flexible Thermoelectric Generator with High Output Impedance
Kazuma Koketsu, Toru Tanzawa
IEEE International Conference on Electronics Circuits and Systems
発表年月: 2020年11月
Rectenna with Serially Connected Diodes for Micro-watt Energy Harvesting
Yuki Tabuchi, Toru Tanzawa
IEEE Wireless Power Transfer Conference
発表年月: 2020年11月
IoTエッジ端末の小型化低コスト化振動発電用電源回路
丹沢 徹
イノベーション・ジャパン2020
発表年月: 2020年09月
バッテリー・熱電素子直列接続型電力変換回路システムの バッテリー長寿命化コンセプトの実証
Y. Sakamoto, T. Tanzawa
IEICE society conference, C-12-9
発表年月: 2020年09月
静電振動発電用耐プロセス温度変動 完全集積化シャント・レギュレータの設計
Y. Ishida, T. Tanzawa
IEICE society conference, C-12-8
発表年月: 2020年09月
マイクロワット・レクテナ最適回路トポロジーの 出力電圧電流平面へのマッピング
Y. Tabuchi, T. Tanzawa
IEICE society conference, C-2-11
発表年月: 2020年09月
An Optimum Circuit Design of clocked AC-DC charge pumps
J. Ye, T. Tanzawa
IEICE general conference
発表年月: 2020年03月
T. Nomura, T. Tanzawa
IEICE general conference
発表年月: 2020年03月
An Optimum Pre-Emphasis Pulse Design for Random Access Memory
Y. Sugiura, T. Tanzawa
IEICE general conference
発表年月: 2020年03月
A Power Converter System for Energy Harvesting Toward Zero Net Battery Power
Y. Sakamoto, H. Uchida, T. Tanzawa
IEICE general conference
発表年月: 2020年03月
Y. Yamazaki, M. Tsuchiaki, T. Tanzawa
IEEE Asia-Pacific Microwave Conference (APMC)
発表年月: 2019年12月
A 2V 3.8μW Fully-Integrated Clocked AC-DC Charge Pump with 0.5V 500Ω Vibration Energy Harvester
H. Kawauchi, T. Tanzawa
IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)
発表年月: 2019年11月
K. Matsuyama, T. Tanzawa
IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)
発表年月: 2019年11月
Design of Pre-Emphasis Pulses for Large Memory Arrays with Minimal Word-Line Delay Time
K. Matsuyama, T. Tanzawa
IEEE International Symposium on Circuits and Systems (ISCAS)
発表年月: 2019年05月
Toward a minimum-operating-voltage design of DC-DC charge pump circuits for energy harvesting
S. Tokuda, T. Tanzawa
IEEE International Symposium on Circuits and Systems (ISCAS)
発表年月: 2019年05月
Y. Yamazaki, T. Tanzawa
IEICE general conference
発表年月: 2019年03月
An Optimum Design of Micro-watt RF Energy Harvesters with RF-DC and DC-DC Conversions
Y. Tabuchi, T. Tanzawa
IEICE general conference
発表年月: 2019年03月
K. Koketsu, T. Tanzawa
IEICE general conference
発表年月: 2019年03月
Y. Ishida, T. Tanzawa
IEICE general conference
発表年月: 2019年03月
(Invited) Interface Circuit Design for Energy Harvesting: State of the Art and Challenges
T. Tanzawa [招待有り]
IEICE society conference, CI-3-1
発表年月: 2018年09月
Formulation of minimal delay time with pre-emphasis pulses for dense parallel RC lines
K. Matsuyama, T. Tanzawa
IEICE society conference, C-12-5
発表年月: 2018年09月
A system design of clocked AC-DC converter for vibration energy harvesting
H. Kawauchi, T. Tanzawa
IEICE society conference, C-12-9
発表年月: 2018年09月
A closed-form expression for pre-emphasis pulses with minimal RC delay time
K. Matsuyama, T. Tanzawa
IEICE general conference, C-12-35
発表年月: 2018年03月
Toward a minimum-operating-voltage design of DC-DC charge pump circuits for energy harvesting
S. Tokuda, T. Tanzawa
IEICE general conference, C-12-18
発表年月: 2018年03月
An analysis on lower bounds of supply voltages for enhanced-swing Colpitts oscillators
Y. Kawakami, T. Tanzawa
IEICE general conference, C-12-17
発表年月: 2018年03月
H. Kawauchi, T. Tanzawa
IEICE general conference, C-12-16
発表年月: 2018年03月
On-Chip Switched-Capacitor DC-DC Converter in Memory Technology: State of the Art and Challenges
T. Tanzawa
IEEE ECCTD (European Conference on Circuit Theory and Design)
発表年月: 2017年09月
T. Tanzawa
IEEE Asian Solid-State Circuits Conference
発表年月: 2016年11月
An Analytical Model of Multi-Sine AC-DC Voltage Multiplier
T. Tanzawa
IEEE International Conference on Circuits and Systems
発表年月: 2015年05月
A Comprehensive Optimization Methodology for Designing Charge Pump Voltage Multipliers
T. Tanzawa
IEEE International Conference on Circuits and Systems
発表年月: 2015年05月
Design of DC-DC Switched-Capacitor Voltage Multiplier driven by DC Energy Transducer
T. Tanzawa
IEEE International Conference on Electronics Circuits and Systems
発表年月: 2014年12月
An Analytical Model of AC-DC Voltage Multipliers
T. Tanzawa
IEEE International Conference on Electronics Circuits and Systems
発表年月: 2014年12月
A temperature compensation word-line voltage generator for multi-level cell NAND Flash memories
T. Tanzawa
IEEE ESSCIRC
発表年月: 2010年09月
NBTI stress relaxation design for scaling high-voltage transistors in NAND Flash memories
T. Tanzawa
IEEE International Memory Workshop
発表年月: 2010年08月
Dickson charge pump circuit design with parasitic resistance in power lines
T. Tanzawa
IEEE International Conference on Circuits and Systems
発表年月: 2009年05月
A 172mm2 32Gb MLC NAND flash memory in 34nm CMOS
R. Zeng
IEEE International Solid-State Circuits Conference
発表年月: 2009年01月
A process- and temperature-tolerant power-on reset circuit with a flexible detection level higher than the bandgap voltage
T. Tanzawa
IEEE International Conference on Circuits and Systems
発表年月: 2008年01月
A low-IF CMOS single-chip Bluetooth EDR transmitter with digital I/Q mismatch trimming circuit
D. Miyashita
Symposium on VLSI Circuits
発表年月: 2005年06月
A temperature-compensated CMOS LC-VCO enabling the direct modulation architecture in 2.4GHz GFSK transmitter
T. Tanzawa
IEEE Custom Integrated Circuits Conference
発表年月: 2004年09月
A 44mm2 4-bank 8-word page read 64Mb flash memory with flexible block redundancy and fast accurate word-line voltage controller
T. Tanzawa
IEEE International Solid-State Circuits Conference
発表年月: 2002年02月
A channel-erasing 1.8 V-only 32 Mb NOR flash EEPROM with a bit-line direct-sensing scheme
S. Atsumi
IEEE International Solid-State Circuits Conference
発表年月: 2000年02月
A sampling weak-program method to tighten Vth-distribution of 0.5 V for low-voltage flash memories
H. Shiga
Symposium on VLSI Circuits
発表年月: 1999年06月
Novel 0.44 μm2 Ti-salicide STI cell technology for high-density NOR flash memories and high performance embedded application
H. Watanabe
IEEE International Electron Devices Meeting
発表年月: 1998年12月
A CMOS band-gap reference circuit with sub 1 V operation
H. Banba
IEEE Symposium on VLSI Circuits
発表年月: 1998年06月
A novel isolation-scaling technology for NAND EEPROMs with the minimized program disturbance
S. Satoh
IEEE IEDM
発表年月: 1997年12月
A 3.4-Mbyte/sec Programming 3-level NAND Flash Memory Saving 40% Die Size Per Bit
T. Tanaka
IEEE Symposium on VLSI Circuits
発表年月: 1997年06月
A Multi-page Cell Architecture For High-speed Programming Multi-level NAND Flash Memories
K. Takeuchi
IEEE Symposium on VLSI Circuits
発表年月: 1997年06月
Circuit Technologies For A Single-1.8V Flash Memory
T. Tanzawa
IEEE Symposium on VLSI Circuits
発表年月: 1997年06月
A compact on-chip ECC for low cost flash memories
T. Tanzawa
IEEE Symposium on VLSI Circuits
発表年月: 1996年06月
A stable programming pulse generator for high-speed programming single power supply voltage flash memories
T. Tanzawa
IEEE Symposium on VLSI Circuits
発表年月: 1995年01月
A Quick Boosting Charge Pump Circuit for High Density and Low Voltage Flash Memories
T. Tanzawa
IEEE Symposium on VLSI Circuits
発表年月: 1994年06月
極低電圧から昇圧可能な電力変換回路の動作原理解明とIoT端末への応用
基盤研究(C)
研究期間:
Address-Dependent Divided-Bit-Line NAND Flash Memory for Reduction in Latency and Energy
Yuta Sugisawa, Toru Tanzawa
2024年08月
担当区分:最終著者, 責任著者
Evolution of Reconfigurable Switched-Capacitor DC-DC Converters
Toru Tanzawa
2024年08月
担当区分:筆頭著者, 最終著者, 責任著者
T. Tanzawa
IEEE Solid-State Circuits Magazine vol. 8 ( No. 3 ) 63 - 73 2016年08月
Innovation of Switched-Capacitor Voltage Multiplier: Part 2: Fundamentals of the charge pump
T. Tanzawa
IEEE Solid-State Circuits Magazine vol. 8 ( No. 2 ) 83 - 92 2016年06月
Innovation of Switched-Capacitor Voltage Multiplier: Part 1: A Brief History
T. Tanzawa
IEEE Solid-State Circuits Magazine vol. 8 ( No. 1 ) 51 - 59 2016年01月
電源装置及び電源システム
丹沢 徹, 内田 秀樹
特許権
電源装置
丹沢 徹, 内田 秀樹
特許権
メモリアクセス動作中に、メモリの複数のメモリプレーンに同時にアクセスするための装置および方法
特許第6931674号
ラジェード,シャンタヌ アール., カラヴァド,プラナフ, 丹沢 徹
特許権
読み出し回路及びメモリシステム
丹沢 徹
特許権
電源装置、昇圧回路の制御装置、及び昇圧回路の出力評価装置
丹沢 徹, 内田 秀樹, 濃野 公一
特許権
ランダムアクセス型メモリ回路及びメモリシステム
丹沢 徹
特許権
Semiconductor device and manufacturing method for same
US 11,258,008
Toru Tanzawa
特許権
ランダムアクセス型メモリ回路及びメモリシステム
丹沢 徹
特許権
昇圧回路及び電源装置
丹沢 徹, 野村 達也
特許権
電源装置
丹沢 徹, 内田 秀樹
特許権
レクテナ装置及びレクテナ装置を設計する方法
丹沢 徹, 田渕 侑幹
特許権
インピーダンス調整回路、電力変換素子及び電源素子
丹沢徹
特許権
電力変換装置及び電源装置
丹沢徹
特許権
駆動回路及び電子デバイス
丹沢徹, 松山和樹
特許権
半導体装置及びその製造方法
丹沢徹
特許権
電力変換回路及び電源装置
丹沢徹
特許権
インピーダンス調整回路、電力変換素子及び電源素子
丹沢徹
特許権
電力変換装置及び電源装置
丹沢徹
特許権
半導体装置及びその製造方法
7109795
丹沢徹
特許権
Non-volatile semiconductor memory device
5555204
Endoh; Tetsuo, Tanaka; Yoshiyuki, Aritome; Seiichi, Shirota; Riichiro, Shuto; Susumu, Tanaka; Tomoharu, Hemink; Gertjan, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Memory system
5621682
Tanzawa; Toru, Tanaka; Tomoharu
権利者: Kabushiki Kaisha Toshiba
特許権
Delay circuit, oscillation circuit and semiconductor memory device
5627488
Tanzawa; Toru, Tanaka; Tomoharu, Yamamura; Toshio, Sakui; Koji
権利者: Kabushiki Kaisha Toshiba
特許権
Eeprom semiconductor memory device including circuit for generating a voltage higher than a power supply voltage
5706241
Nakamura; Hiroshi , Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor memory device and high-voltage switching circuit
5708606
Tanzawa; Toru, Tanaka; Tomoharu, Takeuchi; Ken
権利者: Kabushiki Kaisha Toshiba
特許権
Memory system
5719888
Tanzawa; Toru, Tanaka; Tomoharu
権利者: Kabushiki Kaisha Toshiba
特許権
Non-volatile semiconductor memory device and method of programming a non-volatile memory cell to a predetermined state
5774397
Endoh; Tetsuo, Tanaka; Yoshiyuki, Aritome; Seiichi, Shirota; Riichiro, Shuto; Susumu, Tanaka; Tomoharu, Hemink; Gertjan, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor memory device and high-voltage switching circuit
5828621
Tanzawa; Toru, Tanaka; Tomoharu, Takeuchi; Ken
権利者: Kabushiki Kaisha Toshiba
特許権
Nonvolatile semiconductor memory with temperature compensation for read/verify referencing scheme
5864504
Tanzawa; Toru, Tanaka; Tomoharu, Takeuchi; Ken
権利者: Kabushiki Kaisha Toshiba
特許権
Three-value data storing semiconductor memory system
5901152
Tanaka; Tomoharu, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor memory
5905691
Tanzawa; Toru , Takeuchi; Ken , Tanaka; Tomoharu
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor memory device and high-voltage switching circuit
5909398
Tanzawa; Toru, Tanaka; Tomoharu, Takeuchi; Ken
権利者: Kabushiki Kaisha Toshiba
特許権
Error correction/detection circuit and semiconductor memory device using the same
5933436
Tanzawa; Toru, Tanaka; Tomoharu, Shirota; Riichiro, Ohuchi; Kazunori
権利者: Kabushiki Kaisha Toshiba
特許権
Non-volatile semiconductor memory device
5946231
Endoh; Tetsuo, Tanaka; Yoshiyuki, Aritome; Seiichi, Shirota; Riichiro, Shuto; Susumu, Tanaka; Tomoharu Hemink; Gertjan Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Delay circuit, oscillation circuit and semiconductor memory device
5969557
Tanzawa; Toru, Tanaka; Tomoharu, Yamamura; Toshio, Sakui; Koji
権利者: Kabushiki Kaisha Toshiba
特許権
Nonvolatile semiconductor memory device
5969985
Tanaka; Tomoharu, Ohuchi; Kazunori, Tanzawa; Toru, Takeuchi; Ken
権利者: Kabushiki Kaisha Toshiba
特許権
Voltage multiplier circuit and nonvolatile semiconductor memory device having voltage multiplier
5969988
Tanzawa; Toru, Tanaka; Tomoharu, Nakamura; Hiroshi, Tanaka; Yoshiyuki
権利者: Kabushiki Kaisha Toshiba
特許権
Memory system
5996108
Tanzawa; Toru, Tanaka; Tomoharu
権利者: Kabushiki Kaisha Toshiba
特許権
Non-volatile semiconductor memory device
6014330
Endoh; Tetsuo , Tanaka; Yoshiyuki, Aritome; Seiichi, Shirota; Riichiro, Shuto; Susumu, Tanaka; Tomoharu Hemink; Gertjan, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Nonvolatile semiconductor memory device
6044013
Tanaka; Tomoharu, Ohuchi; Kazunori, Tanzawa; Toru, Takeuchi; Ken
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor memory device
6064611
Tanaka; Tomoharu, Nakamura; Hiroshi, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor memory device
6072719
Tanzawa; Toru, Tanaka; Tomoharu
権利者: Kabushiki Kaisha Toshiba
特許権
Nonvolatile semiconductor memory having improved source line drive circuit
6084799
Tanzawa; Toru, Tanaka; Tomoharu
権利者: Kabushiki Kaisha Toshiba
特許権
Quantum tunneling effect device and semiconductor composite substrate
6111288
Watanabe; Hiroshi , Yasuda; Naoki , Toriumi; Akira, Tanaka; Tomoharu, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor memory preventing sense amplifier malfunctions due to effects of noise generated in output buffer
6141277
Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor memory device
6154403
Tanzawa; Toru, Tanaka; Tomoharu
権利者: Kabushiki Kaisha Toshiba
特許権
Non-volatile semiconductor memory device
6188611
Endoh; Tetsuo, Tanaka; Yoshiyuki , Aritome; Seiichi, Shirota; Riichiro, Shuto; Susumu, Tanaka; Tomoharu Hemink; Gertjan Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor memory device
6208573
Tanaka; Tomoharu, Nakamura; Hiroshi, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Data-erasable non-volatile semiconductor memory device
6222774
Tanzawa; Toru , Umezawa; Akira , Taura; Tadayuki, Atsumi; Shigeru
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor memory device
6233189
Tanzawa; Toru, Atsumi; Shigeru
権利者: Kabushiki Kaisha Toshiba
特許権
Nonvolatile semiconductor memory
6236609
Tanzawa; Toru , Taura; Tadayuki , Kuriyama; Masao
権利者: Kabushiki Kaisha Toshiba
特許権
Non-volatile semiconductor memory device having a function for controlling the range of distribution of memory cell threshold voltages
6240019
Shiga; Hitoshi, Tanzawa; Toru, Saito; Masanobu
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor memory device
6249479
Tanzawa; Toru, Tanaka; Tomoharu
権利者: Kabushiki Kaisha Toshiba
特許権
Nonvolatile semiconductor memory device capable of controlling mutual timing of write voltage pulse and transfer voltage pulse
6252798
Satoh; Shinji , Shirota; Riichiro, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Non-volatile semiconductor memory having column sub-selector layout pattern adaptable to miniaturization of memory cell
6256227
Atsumi; Shigeru , Umezawa; Akira , Tanzawa; Toru, Yamada; Seiji
権利者: Kabushiki Kaisha Toshiba
特許権
Pump circuit with reset circuitry
6278316
Tanzawa; Toru, Atsumi; Shigeru
権利者: Kabushiki Kaisha Toshiba
特許権
Nonvolatile semiconductor memory device
6282117
Tanaka; Tomoharu, Ohuchi; Kazunori, Tanzawa; Toru, Takeuchi; Ken
権利者: Kabushiki Kaisha Toshiba
特許権
Quantum tunneling effect device and semiconductor composite substrate
6320220
Watanabe; Hiroshi, Yasuda; Naoki, Toriumi; Akira, Tanaka; Tomoharu , Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor memory device
6337825
Tanzawa; Toru, Atsumi; Shigeru
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor integrated circuit device
6344764
Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor memory device
6344996
Tanaka; Tomoharu , Nakamura; Hiroshi , Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Non-volatile semiconductor memory device having a function for controlling the range of distribution of memory cell threshold voltages and method of erasing data thereof
6351417
Shiga; Hitoshi , Tanzawa; Toru, Saito; Masanobu
権利者: Kabushiki Kaisha Toshiba
特許権
Nonvolatile semiconductor memory device
6363010
Tanaka; Tomoharu, Ohuchi; Kazunori, Tanzawa; Toru, Takeuchi; Ken
権利者: Kabushiki Kaisha Toshiba
特許権
Channel-erase nonvolatile semiconductor memory device
6373749
Atsumi; Shigeru , Taura; Tadayuki, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Pump circuit with active-mode and stand-by mode booster circuits
6429725
Tanzawa; Toru, Atsumi; Shigeru
権利者: Kabushiki Kaisha Toshiba
特許権
Non-volatile semiconductor memory device controlling the range of distribution of memory cell threshold voltages
6434054
Shiga; Hitoshi, Tanzawa; Toru , Saito; Masanobu
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor device
6438034
Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Nonvolatile semiconductor memory
6442080
Tanzawa; Toru , Taura; Tadayuki, Kuriyama; Masao
権利者: Kabushiki Kaisha Toshiba
特許権
Channel-erase nonvolatile semiconductor memory device
6445618
Atsumi; Shigeru, Taura; Tadayuki, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Booster circuit for raising voltage by sequentially transferring charges from input terminals of booster units to output terminals thereof in response to clock signals having different phases
6456541
Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Boosted voltage generating circuit and semiconductor memory device having the same
6487120
Tanzawa; Toru , Miyaba; Takeshi, Atsumi; Shigeru
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor memory device
6525964
Tanaka; Tomoharu, Nakamura; Hiroshi, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Nonvolatile semiconductor memory device with initialization circuit and control method thereof
6535427
Takano; Yoshinori, Tanzawa; Toru, Taura; Tadayuki
権利者: Kabushiki Kaisha Toshiba
特許権
Nonvolatile semiconductor memory device
6545909
Tanaka; Tomoharu, Ohuchi; Kazunori, Tanzawa; Toru, Takeuchi; Ken
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor storage apparatus
6552936
Shiga; Hitoshi, Takano; Yoshinori, Tanzawa; Toru, Atsumi; Shigeru
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor device
6567309
Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Channel-erase nonvolatile semiconductor memory device
6577538
Atsumi; Shigeru, Taura; Tadayuki, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Level shifter for converting a voltage level and a semiconductor memory device having the level shifter
6600679
Tanzawa; Toru, Watanabe; Kentaro
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor device with a voltage regulator
6600692
Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Boosted voltage generating circuit and semiconductor memory device having the same
6605986
Tanzawa; Toru, Miyaba; Takeshi, Atsumi; Shigeru
権利者: Kabushiki Kaisha Toshiba
特許権
Flash memory
6611938
Tanaka; Tomoharu, Shibata; Noboru, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Booster circuit for raising voltage by sequentially transferring charges from input terminals of booster units to output terminals thereof in response to clock signals having different phases
6614699
Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor memory device
6621738
Tanaka; Tomoharu, Nakamura; Hiroshi, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Non-volatile semiconductor memory device
6639837
Takano; Yoshinori, Taura; Tadayuki, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Channel-erase nonvolatile semiconductor memory device
6643183
Atsumi; Shigeru, Taura; Tadayuki, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Non-volatile semiconductor memory
6650570
Tanzawa; Toru, Atsumi; Shigeru
権利者: Kabushiki Kaisha Toshiba
特許権
Nonvolatile semiconductor memory having page mode with a plurality of banks
6671203
Tanzawa; Toru, Atsumi; Shigeru, Umezawa; Akira, Taura; Tadayuki, Shiga; Hitosh), Takano; Yoshinori
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor storage apparatus
6693818
Shiga; Hitoshi, Takano; Yoshinor), Tanzawa; Tor), Atsumi; Shigeru
権利者: Kabushiki Kaisha Toshiba
特許権
Nonvolatile semiconductor memory device and method of retrieving faulty in the same
6711057
Taura; Tadayuki, Atsumi; Shigeru, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Nonvolatile semiconductor memory
6711066
Tanzawa; Toru, Taura; Tadayuki, Kuriyama; Masao
権利者: Kabushiki Kaisha Toshiba
特許権
Constant voltage generation circuit and semiconductor memory device
6734719
Tanzawa; Toru, Takano; Yoshinori
権利者: Kabushiki Kaisha Toshiba
特許権
High-speed data programmable nonvolatile semiconductor memory device
6762956
Mori; Seiichi, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Boosted voltage generating circuit and semiconductor memory device having the same
6771547
Tanzawa; Toru, Miyaba; Takeshi, Atsumi; Shigeru
権利者: Kabushiki Kaisha Toshiba
特許権
Memory device pump circuit with two booster circuits
6781439
Tanzawa; Toru, Atsumi; Shigeru
権利者: Kabushiki Kaisha Toshiba
特許権
Nonvolatile semiconductor memory with a page mode
6781879
Tanzawa; Toru, Atsumi; Shigeru
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor memory device and current mirror circuit
6788601
Takano; Yoshinori, Atsumi; Shigeru, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Nonvolatile semiconductor memory having page mode with a plurality of banks
6795352
Tanzawa; Toru, Atsumi; Shigeru, Umezawa; Akira, Taura; Tadayuki, Shiga; Hitoshi, Takano; Yoshinori
権利者: Kabushiki Kaisha Toshiba
特許権
Non-volatile semiconductor memory
6801457
Tanzawa; Toru, Atsumi; Shigeru
権利者: Kabushiki Kaisha Toshiba
特許権
Non-volatile semiconductor memory device
6807097
Takano; Yoshinori, Taura; Tadayuki, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Nonvolatile semiconductor memory capable of generating read-mode reference current and verify-mode reference current from the same reference cell
6816413
Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Nonvolatile semiconductor memory
6816421
Tanzawa; Toru, Umezawa; Akira
権利者: Kabushiki Kaisha Toshiba
特許権
Fast data readout semiconductor storage apparatus
6826068
Shiga; Hitoshi, Takano; Yoshinori, Tanzawa; Toru, Atsumi; Shigeru
権利者: Kabushiki Kaisha Toshiba
特許権
Nonvolatile semiconductor memory device with first and second read modes
6842377
Takano; Yoshinori, Honda; Yasuhiko, Tanzawa; Toru, Kuriyama; Masao
権利者: Kabushiki Kaisha Toshiba
特許権
Nonvolatile semiconductor memory device and method of retrieving faulty in the same
6850437
Taura; Tadayuki, Atsumi; Shigeru, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Nonvolatile semiconductor memory
6856548
Tanzawa; Toru, Taura; Tadayuki, Kuriyama; Masao
権利者: Kabushiki Kaisha Toshiba
特許権
Non-volatile semiconductor memory
6865125
Tanzawa; Toru, Atsumi; Shigeru
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor memory device
6868013
Tanaka; Tomoharu, Nakamura; Hiroshi, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor device having switch circuit to supply voltage
6977850
Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Boosted voltage generating circuit and semiconductor memory device having the same
6996024
Tanzawa; Toru, Miyaba; Takeshi, Atsumi; Shigeru
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor memory device and current mirror circuit
6999365
Takano; Yoshinori, Atsumi; Shigeru, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Direct frequency modulation apparatus which modulates frequency by applying data-dependent voltage to control terminal of voltage-controlled oscillator without mediacy of PLL, and communication system
7005936
Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor device having switch circuit to supply voltage
7050339
Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor memory device
7061807
Tanaka; Tomoharu, Shibata; Noboru, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Current difference divider circuit
7071771
Takano; Yoshinori , Taura; Tadayuki, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Analog level shifter
7148734
Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Boosted voltage generating circuit and semiconductor memory device having the same
7180796
Tanzawa; Toru, Miyaba; Takeshi, Atsumi; Shigeru
権利者: Kabushiki Kaisha Toshiba
特許権
Boosted voltage generating circuit and semiconductor memory device having the same
7203120
Tanzawa; Toru, Miyaba; Takeshi, Atsumi; Shigeru
権利者: Kabushiki Kaisha Toshiba
特許権
Flash memory
7219285
Tanaka; Tomoharu, Shibata; Noboru, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Voltage subtracting circuit carrying out voltage subtraction by converting input voltage into current, intensity detecting circuit, and semiconductor integrated circuit device using the same
7233190
Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
High voltage switching circuit
7272046
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Method and apparatus for generating temperature-compensated read and verify operations in flash memories
7277355
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Semiconductor device having switch circuit to supply voltage
7336545
Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor memory device
7349259
Tanaka; Tomoharu, Nakamura; Hiroshi, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor integrated circuit device and frequency modulation device
7474139
Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Method and apparatus for generating read and verify operations in non-volatile memories
7489556
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Flash memory
7509566
Tanaka; Tomoharu, Shibata; Noboru, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Semiconductor memory device
7535762
Tanaka; Tomoharu, Nakamura; Hiroshi, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
High voltage switching circuit
7609554
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Semiconductor memory device
7649780
Tanaka; Tomoharu, Nakamura; Hiroshi, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Adjustable voltage regulator for providing a regulated output voltage
7764563
Tanzawa; Toru, Harrington; Peter B.
権利者: Micron Technology, Inc.
特許権
Compensation capacitor network for divided diffused resistors for a voltage divider
7902907
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Flash memory
7908529
Tanaka; Tomoharu, Shibata; Noboru, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Random telegraph signal noise reduction scheme for semiconductor memories
7916544
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Semiconductor memory device
7952933
Tanaka; Tomoharu, Nakamura; Hiroshi, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Adjustable voltage regulator for providing a regulated output voltage
7957214
Tanzawa; Toru, Harrington; Peter B.
権利者: Micron Technology, Inc.
特許権
Method and apparatus for generating temperature-compensated read and verify operations in flash memories
7957215
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Voltage trimming
8013579
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Voltage regulator system
8026702
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Biasing system and method
8125829
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Semiconductor memory device
8154922
Tanaka; Tomoharu, Nakamura; Hiroshi, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Level shifting circuit
8184489
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Random telegraph signal noise reduction scheme for semiconductor memories
8194459
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Arrangement of pairs of NAND strings that share bitline contacts while utilizing distinct sources lines
8208305
Tanzawa; Toru
権利者: Intel Corporation
特許権
Devices for shielding a signal line over an active region
8253198
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Voltage regulator system
8253396
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Flash memory
8365025
Tanaka; Tomoharu, Shibata; Noboru, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Level shifting circuit
8446784
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Voltage trimming
8466664
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Random telegraph signal noise reduction scheme for semiconductor memories
8537620
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Voltage generation and adjustment in a memory device
8547746
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods including memory array and data line architecture
8593869
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Biasing system and method
8611153
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods including memory array data line selection
8619471
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Devices and systems including enabling circuits
8675420
Tanzawa; Toru, Ghalam; Ali Feiz Zarrin
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods including memory write operation
8681561
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Memory devices and programming methods that program a memory cell with a data value, read the data value from the memory cell and reprogram the memory cell with the read data value
8743622
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Memory devices having data lines included in top and bottom conductive lines
8780631
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Random telegraph signal noise reduction scheme for semiconductor memories
8780638
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods including memory with top and bottom data lines
8792263
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods for transposing select gates
8796778
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Vertical memory with body connection
8797804
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Memory array with power-efficient read architecture
8811084
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Methods and apparatuses including a select transistor having a body region including monocrystalline semiconductor material and/or at least a portion of its gate located in a substrate
8837222
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Devices for shielding a signal line over an active region
8853778
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Semiconductor apparatus with multiple tiers of memory cells with peripheral transistors, and methods
8860117
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Compensating for off-current in a memory
8861274
Tanzawa; Toru
権利者: Intel Corporation
特許権
Apparatuses and methods involving accessing distributed sub-blocks of memory cells
8891305
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Three-dimensional devices having reduced contact length
8952482
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Apparatus and methods for applying a non-zero voltage differential across a memory cell not involved in an access operation
8971117
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Memory read apparatus and methods
8976594
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Sharing support circuitry in a memory
8995188
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Voltage generator circuit
9000836
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Biasing system and method
9019766
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Voltage generation and adjustment in a memory device
9025385
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods including memory array data line selection
9030882
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Charge pump redundancy in a memory
9042180
Tanzawa; Toru, Tanaka; Tomoharu
権利者: Intel Corporation
特許権
Method of error correction of a memory
9053043
Tanaka; Tomoharu, Shibata; Noboru, Tanzawa; Toru
権利者: Kabushiki Kaisha Toshiba
特許権
Apparatuses and methods for coupling load current to a common source
9064551
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods for transposing select gates
9064576
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods to control body potential in memory operations
9064577
Zhao; Han, Goda; Akira, Parat; Krishna K., Mauri; Aurelio Giancarlo, Liu; Haitao, Tanzawa; Toru, Yamada; Shigekazu, Sakui; Koji
権利者: Micron Technology, Inc.
特許権
Enable/disable of memory chunks during memory access
9064578
Tanzawa; Toru, Tamada; Satoru, Kawai; Koichi, Manabe; Tetsuji
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods including memory array and data line architecture
9082485
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Interconnections for 3D memory
9111591
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Memory having memory cell string and coupling components
9111620
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Short-checking methods
9136017
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Vertical memory with body connection
9171587
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods including memory with top and bottom data lines
9177614
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Memory array with power-efficient read architecture
9208891
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods for coupling load current to a common source
9224477
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Random telegraph signal noise reduction scheme for semiconductor memories
9257180
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Methods and apparatuses including a select transistor having a body region including monocrystalline semiconductor material and/or at least a portion of its gate located in a substrate
9263460
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Apparatuses including memory arrays with source contacts adjacent edges of sources
9263461
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Independently selective tile group access with data structuring
9285997
Tanzawa; Toru
権利者: Intel Corporation
特許権
Apparatuses and methods including memory write operation
9299437
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Methods applying a non-zero voltage differential across a memory cell not involved in an access operation
9305656
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods for measuring an electrical characteristic of a model signal line and providing measurement information
9318173
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods including memory array data line selection
9318211
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Compensating for off-current in a memory
9324443
Tanzawa; Toru
権利者: Intel Corporation
特許権
Short-checking methods
9330789
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Three-dimensional devices having reduced contact length
9343479
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Memory read apparatus and methods
9349470
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Interconnections for 3D memory
9368216
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Programming a memory cell to a voltage to indicate a data value and after a relaxation time programming the memory cell to a second voltage to indicate the data value
9378823
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Devices and systems including enabling circuits
9401188
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods using dummy cells programmed to different states
9412451
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Current leakage reduction in 3D NAND memory
9424936
Toru Tanzawa, Akira Goda, Shigekazu Yamada, Hiroyuki Sanda
権利者: Intel Corporation
特許権
Sequential memory access operations
9430417
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Memory devices having data lines included in top and bottom conductive lines
9437253
Tanzawa; Toru
権利者: Micron Technology, Inc.
特許権
Enable/disable of memory chunks during memory access
9536582
Toru Tanzawa, Satoru Tamada, Koichi Kawai, Tetsuji Manabe
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods to control body potential in memory operations
9536618
Han Zhao, Akira Goda, Krishna K. Parat, Aurielo Giancarlo Mauri, Haitao Liu, Toru Tanzawa, Shigekazu Yamada, Koji Sakui
権利者: Micron Technology, Inc.
特許権
Memory array having connections going through control gates
9595533
Toru Tanzawa, Tamotsu Murakoshi, Deepak Thimmegowda
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods for charging a global access line prior to accessing a memory
9607705
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Devices for shielding a signal line over an active region
9614516
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Voltage generator circuit
9641068
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Selectable memory access time
9646660
Toru Tanzawa
権利者: Intel Corporation
特許権
Apparatuses and methods using dummy cells programmed to different states
9697907
Toru Tanzawa, Aaron Yip
権利者: Micron Technology, Inc.
特許権
Semiconductor apparatus with multiple tiers, and methods
9704876
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Devices including memory arrays, row decoder circuitries and column decoder circuitries
9711224
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Methods and apparatuses including a select transistor having a body region including monocrystalline semiconductor material and/or at least a portion of its gate located in a substrate
9711514
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Apparatus and methods of operating memory with erase de-bias
9711228
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Data line arrangement and pillar arrangement in apparatuses
9721960
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Chunk redundancy architecture for memory
9727417
Toru Tanzawa
権利者: Intel Corporation
特許権
Three-dimensional devices having reduced contact length
9728538
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Random telegraph signal noise reduction scheme for semiconductor memories
9747991
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Memory read apparatus and methods
9773564
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Segmented memory and operation
9773553
Toru Tanzawa, Han Zhao
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods involving accessing distributed sub-blocks of memory cells
9779791
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Memory having memory cell string and coupling components
9780110
Toru Tanzawa
権利者: Micron Technology
特許権
Connecting memory cells to a data line sequentially while applying a program voltage to the memory cells
9779819
Qiang Tang, Ramin Ghodsi, Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Sequential memory access operations
9778846
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Interconnections for 3D memory
9786334
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Memory array with power-efficient read architecture
9842652
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods to control body potential in 3D non-volatile memory operations
9881686
Han Zhao, Akira Goda, Krishna K. Parat, Aurelio Giancarlo Mauri, Haitao Liu, Toru Tanzawa, Shigekazu Yamada, Koji Sakui
権利者: Micron Technology, Inc.
特許権
Interconnections for 3D memory
9881651
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods for charging a global access line prior to accessing a memory
9892797
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Semiconductor device structures including staircase structures, and related methods and electronic systems
9905514
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods for concurrently accessing multiple memory planes of a memory during a memory access operation
9910594
Shantanu R. Rajwade, Pranav Kalavade, Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Methods of operating memory under erase conditions
9953711
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Chunk redundancy architecture for memory
9996438
Toru Tanzawa
権利者: Intel Corporation
特許権
Devices including memory arrays, row decoder circuitries and column decoder circuitries
10014057
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Apparatuses including memory arrays with source contacts adjacent edges of sources
10050049
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Methods including establishing a negative body potential in a memory cell
10049750
Koji Sakui, Mark Hawes, Toru Tanzawa, Jeremy Binfet
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods using dummy cells programmed to different states
10079064
Toru Tanzawa, Aaron Yip
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods for charging a global access line prior to accessing a memory
10079063
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods for measuring an electrical characteristic of a model signal line and providing measurement information
10083265
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Memory array with power-efficient read architecture
10090051
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Field effect transistors having a fin
10096696
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Random telegraph signal noise reduction scheme for semiconductor memories
10102914
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Interconnections for 3D memory
10109325
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Connecting memory cells to a data line sequentially while applying a program voltage to the memory cells
10121544
Qiang Tang, Ramin Ghodsi, Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Three dimensional memory device with access signal triggering from voltage pump output levels
10127991
Toru Tanzawa
権利者: Intel Corporation
特許権
Methods of programming and sensing in a memory device
10153043
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Memory having memory cell string and coupling components
10163928
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Memory device including pass transistors in memory tiers
10170490
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods involving accessing distributed sub-blocks of memory cells
10170169
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods to control body potential in 3D non-volatile memory operations
10170196
Han Zhao, Akira Goda, Krishna K. Parat, Aurelio Giancarlo Mauri, Haitao Liu, Toru Tanzawa, Shigekazu Yamada, Koji Sakui
権利者: Micron Technology, Inc.
特許権
Apparatus and methods of operating memory for negative gate to body conditions
10170193
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Memory device including mixed non-volatile memory cell types
10203885
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Memory read apparatus and methods
10210940
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Memory devices with a transistor that selectively connects a data line to another data line
10224103
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Segmented memory and operation
10242742
Toru Tanzawa, Han Zhao
権利者: Micron Technology, Inc.
特許権
Devices including memory arrays, row decoder circuitries and column decoder circuitries
10262739
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods using dummy cells programmed to different states
10262745
Toru Tanzawa, Aaron Yip
権利者: Micron Technology, Inc.
特許権
Memory devices having selectively electrically connected data lines
10269431
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Sequential memory access operations
10282093
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Interconnections for 3D memory
10304498
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Tier mode for access operations to 3D memory
10310734
Toru Tanzawa
権利者: Intel Corporation
特許権
Apparatuses and methods for charging a global access line prior to accessing a memory
10340015
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods for measuring an electrical characteristic of a model signal line and providing measurement information
10354030
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Memory devices having selectively electrically connected data lines
10366759
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods for concurrently accessing multiple memory planes of a memory during a memory access operation
10379738
Shantanu R. Rajwade, Pranav Kalavade, Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Apparatus and methods including establishing a negative body potential in a memory cell
10453538
Koji Sakui, Mark Hawes, Toru Tanzawa, Jeremy Binfet
権利者: Micron Technology, Inc.
特許権
Memory having memory cell string and coupling components
10484718
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods to control body potential in 3D non-volatile memory operations
10490292
Han Zhao, Akira Goda, Krishna K. Parat, Aurelio Giancarlo Mauri, Haitao Liu, Toru Tanzawa, Shigekazu Yamada, Koji Sakui
権利者: Micron Technology, Inc.
特許権
Connecting memory cells to a data line sequentially while applying a read voltage to the memory cells and programming the read data to a single memory cell
10504599
Qiang Tang, Ramin Ghodsi, Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Random telegraph signal noise reduction scheme for semiconductor memories
10510420
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Memory device including mixed non-volatile memory cell types
10521130
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Field effect transistors having a fin
10573728
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Semiconductor apparatus with multiple tiers, and methods
10580790
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Memory read apparatus and methods
10580502
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Segmented memory and operation
10672477
Toru Tanzawa, Han Zhao
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods for charging a global access line prior to accessing a memory
10685721
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Three-dimensional devices having reduced contact length
10692870
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Interconnections for 3D memory
10706895
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods involving accessing distributed sub-blocks of memory cells
10734049
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods using dummy cells programmed to different states
10741259
Toru Tanzawa, Aaron Yip
権利者: Micron Technology, Inc.
特許権
Methods of forming semiconductor device structures including staircase structures
10748918
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Memory array having connections going through control gates
10770470
Toru Tanzawa, Tamotsu Murakoshi, Deepak Thimmegowda
権利者: Micron Technology, Inc.
特許権
Memory device including pass transistors in memory tiers
10784269
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods to control body potential in 3D non-volatile memory operations
10796778
Han Zhao, Akira Goda, Krishna K. Parat, Aurelio Giancarlo Mauri, Haitao Liu, Toru Tanzawa, Shigekazu Yamada, Koji Sakui
権利者: Micron Technology, Inc.
特許権
Sequential memory access operations
10824336
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Segmented memory operation
10854293
Toru Tanzawa, Han Zhao
権利者: Micron Technology, Inc.
特許権
Apparatuses including memory arrays with source contacts adjacent edges of sources
10879255
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Memory device including mixed non-volatile memory cell types
10901623
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Apparatus and methods including establishing a negative body potential in a memory cell
10916313
Koji Sakui, Mark Hawes, Toru Tanzawa, Jeremy Binfet
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods for measuring an electrical characteristic of a model signal line and providing measurement information
10956642
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Memory read apparatus and methods
10964400
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Random telegraph signal noise reduction scheme for semiconductor memories
10998054
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Three-dimensional devices having reduced contact length
11018135
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Semiconductor apparatus with multiple tiers, and methods
11145673
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods for concurrently accessing multiple memory planes of a memory during a memory access operation
11182074
Shantanu R. Rajwade, Pranav Kalavade, Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Semiconductor device and manufacturing method for same
11258008
Toru Tanzawa
権利者: National University Corporation Shizuoka University
特許権
Interconnections for 3D memory
11276437
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Apparatuses and methods involving accessing distributed sub-blocks of memory cells
11282556
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Memory device including mixed non-volatile memory cell types
11347401
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Memory array having connections going through control gates
11398489
Toru Tanzawa, Tamotsu Murakoshi, Deepak Thimmegowda
権利者: Micron Technology, Inc.
特許権
Memory device including pass transistors in memory tiers
11417671
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Field effect transistors having a fin
11462629
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
Random telegraph signal noise reduction scheme for semiconductor memories
11462277
Toru Tanzawa
権利者: Micron Technology, Inc.
特許権
電子回路II
静岡大学
電子回路I
静岡大学
電子回路Ⅰ
静岡大学
電気電子工学研究第二
静岡大学
電気電子工学研究第一
静岡大学
電気電子工学概論
静岡大学
電気電子工学セミナー第一
静岡大学
電気電子工学セミナー第ニ
静岡大学
電気回路Ⅰ
静岡大学
卒業研究
静岡大学
数値シミュレーション
静岡大学
集積回路工学
静岡大学
集積回路プロセス工学特論
静岡大学
集積プロセス・デバイス工学特論
静岡大学
セミナー1
静岡大学
キャリアデザイン
電気電子工学セミナー第二
静岡大学
社会と製造業
静岡大学
プロセッサ工学
静岡大学
理工学術院総合研究所 兼任研究員
Click to view the Scopus page. The data was downloaded from Scopus API in November 01, 2024, via http://api.elsevier.com and http://www.scopus.com .