Updated on 2024/07/03

写真a

 
SHIMURA, Takayoshi
 
Affiliation
Faculty of Science and Engineering, Graduate School of Information, Production, and Systems
Job title
Professor(non-tenure-track)
Degree
Ph.D(Eng.) ( Nagoya University )
Mail Address
メールアドレス

Research Experience

  • 2024.04
    -
    Now

    Osaka University

  • 2024.04
    -
    Now

    Waseda University   Graduate School of Information Production and Systems   Professor

  • 2020.04
    -
    2024.03

    Osaka University Graduate School of Engineering .   Associate Professor

  • 2007.01
    -
    2024.03

    Osaka University, Associate Professor

  • 2007.04
    -
    2020.03

    Osaka University Graduate School of Engineering Division of Science and Biotechnology   Associate Professor

  • 2007.04
    -
    2011.03

    Osaka University Center for Advanced Science and Innovation

  • 2007.02
    -
    2007.03

    Osaka University Graduate School of Engineering Division of Science and Biotechnology   Associate Professor

  • 2005.08
    -
    2007.01

    Osaka University Graduate School of Engineering Division of Precision Science & Technology and Applied Physics   Research Assistant

  • 2007
    -
    　

    - 大阪大学・准教授

  • 2007
    -
    　

    - Osaka University, Associate Professor

  • 1993.04
    -
    2007.01

    大阪大学助手

  • 2005.04
    -
    2005.07

    Osaka University Graduate School of Engineering Division of Science and Biotechnology   Research Assistant

  • 1998.08
    -
    2005.03

    Osaka University Graduate School of Engineering   Research Assistant

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Professional Memberships

  • 　
    　
    　

    日本放射光学会

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    応用物理学会

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    日本結晶学会

  • 　
    　
    　

    日本物理学会

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    The Japanese Society for Synchrotron Radiation Research

  • 　
    　
    　

    The Japan Society of Applied Physics

  • 　
    　
    　

    The Crystallographic Society of Japan

  • 　
    　
    　

    The Physical Society of Japan

  • 　
    　
    　

    放射光学会

  • 　
    　
    　

    結晶学会

  • 　
    　
    　

    物理学会

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Research Areas

  • Optical engineering and photon science / Applied condensed matter physics / Quantum beam science / Electric and electronic materials / Crystal engineering / Applied physical properties

Research Interests

  • ゲート絶縁膜

  • X線位相イメージング

  • ゲルマニウム

  • シリコンフォトニクス

  • x-ray imaging

  • electronic materials

  • X線結晶学

  • X-ray Crystallography

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Awards

  • 第8回（2016年秋季）応用物理学会 Poster Award

    2016.09   公益社団法人 応用物理学会  

    Winner： 冨田 崇史, 岡 博史, 小山 真広, 田中 章吾, 細井 卓治, 志村 考功, 渡部 平司

  • 第7回（2016年春季）応用物理学会 Poster Award

    2016.03   応用物理学会  

    Winner： 小川慎吾, 淺原亮平, 箕浦佑也, 迫秀樹, 川崎直彦, 山田一子, 宮本隆志, 細井卓治, 志村考功, 渡部平司

  • 第3回（2014年春季）応用物理学会 Poster Award

    2014.03   応用物理学会  

    Winner： 小川慎吾, 川崎直彦, 木村耕輔, 田中亮平, 箕浦佑也, 細井卓治, 志村考功, 渡部平司

  • 2008 IWDTF Best Poster Award

    2008.11   The Japan Society of Applied Physics, Japan  

    Winner： T. Shimura, Y. Okamoto, T. Inoue, T. Hosoi, H. Watanabe

Media Coverage

  • GaN製パワー半導体 パナソニックが基地局向け

    日本経済新聞（電子版）  

    2018.02

  • 5G基地局向け半導体 小型で大電流耐える

    日経産業新聞  

    2018.02

  • 大電力電源機器を高速・小型化 絶縁ゲート型GaNパワートランジスタ

    日刊工業新聞  

    2018.02

  • 連続安定駆動が可能 MIS型GaNパワーTR

    電波新聞  

    2018.02

  • 大阪大学ら SiC絶縁耐圧1.5倍 AlON膜で信頼性向上

    半導体産業新聞  

    2012.12

  • 漏れ電流１ケタ低減 AlON採用のSiCトランジスタ 阪大など開発 長期信頼性も向上

    化学工業日報  

    2012.12

  • 阪大/京大/ローム/東京エレ ゲート絶縁膜にAｌON採用 SiCパワーMOSFET開発 13年度にも実用化めざす

    電波新聞  

    2012.12

  • 電力損失を大幅低減 パワー半導体 アルミ酸化物使う 阪大など

    日経産業新聞  

    2012.12

  • SiC MOSFET 高誘電率ゲート絶縁膜採用 阪大など 漏れ電流9割低減

    日刊工業新聞  

    2012.12

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Papers

  • Characterization of nitrided SiC(1-100) MOS structures by means of electrical measurements and X-ray photoelectron spectroscopy

    Takuma Kobayashi, Asato Suzuki, Takato Nakanuma, Mitsuru Sometani, Mitsuo Okamoto, Akitaka Yoshigoe, Takayoshi Shimura, Heiji Watanabe

    Materials Science in Semiconductor Processing   175   108251 - 108251  2024.06  [Refereed]

    DOI

    Scopus

  • Oxygen-related defects in 4H-SiC from first principles

    Sosuke Iwamoto, Takayoshi Shimura, Heiji WATANABE, Takuma Kobayashi

    Applied Physics Express    2024.04  [Refereed]

    　View Summary

    Abstract

    We investigated the abundance, structures, energy levels, and spin states of oxygen-related defects in 4H-SiC on the basis of first principles calculations. We applied a hybrid functional in the overall calculations, which gives reliable defect properties, and also considered relevant defect charge states. We identified the oxygen interstitial (Oi,1), substitutional oxygen (OC), and oxygen-vacancy (OCVSi) complex as prominent defects in n-type conditions. Among them, OCVSi was predicted as a spin-1 defect with near-infrared emission in a previous study. On the basis of the obtained results, we discuss the possible spin decoherence sources when employing OCVSi as a spin-to-photon interface.

    DOI

    Scopus

  • Generation of single photon emitters at a SiO2/SiC interface by high-temperature oxidation and reoxidation at lower temperatures

    Kentaro Onishi, Takato Nakanuma, Kosuke Tahara, Katsuhiro KUTSUKI, Takayoshi Shimura, Heiji WATANABE, Takuma Kobayashi

    Applied Physics Express    2024.04  [Refereed]

    　View Summary

    Abstract

    We report on an approach to produce single photon emitters at the SiO2/SiC interface. We form a high-quality SiO2/SiC interface by high-temperature oxidation and subsequently perform oxidation at lower temperatures (200–1000°C) to generate the emitters. After reoxidation at 800°C, we confirmed the formation of emitters with a bright luminescence (> 50 kcps). Through Hambury-Brown and Twiss measurements, single photon characteristics were confirmed. Thus, the proposed approach is effective in generating highly bright single photon emitters at the SiO2/SiC interface.

    DOI

    Scopus

  • Separate evaluation of interface and oxide hole traps in SiO2/GaN MOS structures with below- and above-gap light excitation

    Takuma Kobayashi, Kazuki Tomigahara, Mikito Nozaki, Takayoshi Shimura, Heiji Watanabe

    Applied Physics Express   17 ( 1 ) 011003 - 011003  2023.12  [Refereed]

    　View Summary

    Abstract

    Understanding the traps in metal-oxide-semiconductor (MOS) structures is crucial in the fabrication of MOS transistors with high performance and reliability. In this study, we evaluated the hole traps in SiO2/GaN MOS structures through photo-assisted capacitance-voltage measurements. Below- and above-gap light was used to distinguish between the contributions of fast interface and slow oxide hole traps. While annealing in oxygen is effective in reducing the oxide hole traps, a high density of hole traps exceeding 1012 cm−2eV−1 remains at the interface. Although these traps are donor-type and thus hidden in n-type MOS structures, they could impair the switching performance of GaN MOS transistors.

    DOI

    Scopus

    1
    Citation
    (Scopus)

  • Design of SiO2/4H–SiC MOS interfaces by sputter deposition of SiO2 followed by high-temperature CO2-post deposition annealing

    Tae-Hyeon Kil, Takuma Kobayashi, Takayoshi Shimura, Heiji Watanabe

    AIP Advances   13 ( 11 ) 115304-1 - 115304-5  2023.11  [Refereed]

    　View Summary

    Oxidation of silicon carbide (SiC) is known to induce defects at the interface of the SiO2/SiC system. NO-annealing is a standard industrial method of nitridation, but oxidation may progress during NO-nitridation, which may generate interface defects. Here, we propose a new method of fabricating SiO2/SiC metal-oxide-semiconductor (MOS) devices: sputter deposition of SiO2 in an Ar/N2 gas mixture followed by high-temperature CO2-post deposition annealing to form SiO2 and incorporate nitrogen at the interface while suppressing oxidation of the SiC. We obtained the nitrogen depth profile by performing x-ray photoelectron spectroscopy and confirmed that most of the nitrogen atoms exist at the abrupt interface. While maintaining a low interface state density and good insulating property, we demonstrated much improved reliability of MOS devices compared to conventional NO-annealed samples, thanks to the well-designed SiO2/SiC interface by the proposed method.

    DOI

    Scopus

    1
    Citation
    (Scopus)

  • Oxygen-vacancy defect in 4H-SiC as a near-infrared emitter: An ab initio study

    Takuma Kobayashi, Takayoshi Shimura, Heiji Watanabe

    Journal of Applied Physics   134 ( 14 ) 145701-1 - 145701-9  2023.10  [Refereed]

    　View Summary

    Optically active spin defects in semiconductors can serve as spin-to-photon interfaces, key components in quantum technologies. Silicon carbide (SiC) is a promising host of spin defects thanks to its wide bandgap and well-established crystal growth and device technologies. In this study, we investigated the oxygen-vacancy complexes as potential spin defects in SiC by means of ab initio calculations. We found that the OCVSi defect has a substantially low formation energy compared with its counterpart, OSiVC, regardless of the Fermi level position. The OCVSi defect is stable in its neutral charge state with a high-spin ground state (S = 1) within a wide energy range near the midgap energy. The zero-phonon line (ZPL) of the OCVSi0 defect lies in the near-infrared regime, 1.11–1.24 eV (1004–1117 nm). The radiative lifetime for the ZPL transition of the defect in kk configuration is fairly short (12.5 ns). Furthermore, the estimated Debye–Waller factor for the optical transition is 13.4%, indicating a large weight of ZPL in the photoluminescence spectrum. All together, we conclude that the OCVSi0 defect possesses desirable spin and optical properties and thus is potentially attractive as a quantum bit.

    DOI

    Scopus

    2
    Citation
    (Scopus)

  • Passivation of hole traps in SiO2/GaN metal-oxide-semiconductor devices by high-density magnesium doping

    Hidetoshi Mizobata, Mikito Nozaki, Takuma Kobayashi, Takayoshi Shimura, Heiji Watanabe

    Applied Physics Express   16 ( 10 ) 105501-1 - 105501-4  2023.10  [Refereed]

    　View Summary

    Abstract

    A major challenge in GaN-based metal-oxide-semiconductor (MOS) devices is significant hole trapping near the oxide/GaN interface. In this study, we show that the density and energy level of the hole traps depends crucially on the concentration of magnesium (Mg) dopants in GaN layers. Although the surface potential of a conventional SiO2/p-GaN MOS device is severely pinned by hole trapping, hole accumulation and very low interface state densities below 1011 cm−2 eV−1 are demonstrated for MOS capacitors on heavily Mg-doped GaN epilayers regardless of the degree of dopant activation. These findings indicate the decisive role of Mg atoms in defect passivation.

    DOI

    Scopus

    2
    Citation
    (Scopus)

  • Interface and oxide trap states of SiO2/GaN metal–oxide–semiconductor capacitors and their effects on electrical properties evaluated by deep level transient spectroscopy

    Shingo Ogawa, Hidetoshi Mizobata, Takuma Kobayashi, Takayoshi Shimura, Heiji Watanabe

    Journal of Applied Physics   134 ( 9 ) 095704-1 - 095704-7  2023.09  [Refereed]

    　View Summary

    The relationship between the electrical properties and the carrier trap properties of the SiO2/GaN metal–oxide–semiconductor (MOS) capacitors was investigated using electrical measurements and deep level transient spectroscopy (DLTS). The capacitance–voltage (C–V) measurement showed that the frequency dispersion of the C–V curves became smaller after an 800 °C annealing in O2 ambient. DLTS revealed that before the annealing, the interface trap states, in a broad energy range above the midgap of GaN, were detected with the higher interface state density at around 0.3 and 0.9 eV below the conduction band minimum (EC) of GaN. Moreover, the oxide trap states were formed at around 0.1 eV below the EC of GaN, plausibly indicating a slow electron trap with a tunneling process. Although both trap states affect the electrical reliability and insulating property of the SiO2/GaN MOS capacitors, they were found to drastically decrease after the annealing, leading to the improvement of the electrical properties.

    DOI

    Scopus

  • Control on the density and optical properties of color centers at SiO2/SiC interfaces by oxidation and annealing

    Takato Nakanuma, Kosuke Tahara, Katsuhiro Kutsuki, Takayoshi Shimura, Heiji Watanabe, Takuma Kobayashi

    Applied Physics Letters   123 ( 10 ) 102102-1 - 102102-5  2023.09  [Refereed]

    　View Summary

    Color centers in solids can serve as single photon emitters (SPEs) those are important in many quantum applications. Silicon carbide (SiC) is a promising host for color centers because of its well-established crystal growth and device technologies. Although color centers with extremely high brightness were found at the silicon dioxide (SiO2)/SiC interface, controlling their density and optical properties remains a challenge. In this study, we demonstrate control over the color centers at the SiO2/SiC interface by designing the oxidation and annealing conditions. We report that post-oxidation CO2 annealing has the ability to reduce the color centers at the interface and form well-isolated SPEs with bright emission. We also discuss the correlation between the color centers and electrically active defects.

    DOI

    Scopus

    3
    Citation
    (Scopus)

  • Impact of Sn incorporation on sputter epitaxy of GeSn

    Nobuyuki Tanaka, Mizuki Kuniyoshi, Kazuya Abe, Masaki Hoshihara, Takuma Kobayashi, Takayoshi Shimura, Heiji Watanabe

    Applied Physics Express   16 ( 9 ) 095502 - 095502  2023.09  [Refereed]

    　View Summary

    Abstract

    Epitaxial growth of high-quality low tin content germanium (GeSn) alloy is demonstrated by sputter deposition. Adding several percent of Sn during simultaneous sputter deposition significantly improved the crystallographic structure of the GeSn alloy, leading to intense photoluminescence even at room temperature. Dislocation-free single-crystal GeSn films were formed on a Ge(100) substrate under tuned growth conditions, that is, an Sn/Ge flux ratio of 6.2% and deposition temperature of 500 °C, in which compositional gradation of the Sn content in the film thickness direction spontaneously formed. The growth mechanisms are discussed based on growth kinetics and Sn diffusion on the growing surface.

    DOI

    Scopus

    1
    Citation
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  • Improvement of interface properties in SiC(0001) MOS structures by plasma nitridation of SiC surface followed by SiO2 deposition and CO2 annealing

    Hiroki Fujimoto, Takuma Kobayashi, Takayoshi Shimura, Heiji Watanabe

    Applied Physics Express   16 ( 7 ) 074004-1 - 074004-4  2023.07  [Refereed]

    　View Summary

    Abstract

    Although nitridation passivates defects at the SiO2/SiC interface, avoiding the introduction of nitrogen atoms into SiO2 is crucial for reliability. This paper presents a method to selectively introduce nitrogen at the SiC-side of the interface. The method comprises the following steps: (i) plasma nitridation of the SiC surface, (ii) sputter deposition of SiO2, and (iii) annealing in a CO2 ambient. Significantly low Dit values of about 1 × 1011 cm−2eV−1 were obtained near the conduction band edge of SiC. Furthermore, the resulting interface properties were hardly degraded by excimer ultraviolet light irradiation, indicating better stability compared with a NO-nitrided sample.

    DOI

    Scopus

    2
    Citation
    (Scopus)

  • Formation of high-quality SiO2/GaN interfaces with suppressed Ga-oxide interlayer via sputter deposition of SiO2

    Kentaro Onishi, Takuma Kobayashi, Hidetoshi Mizobata, Mikito Nozaki, Akitaka Yoshigoe, Takayoshi Shimura, Heiji Watanabe

    Japanese Journal of Applied Physics   62 ( 5 ) 050903-1 - 050903-4  2023.05  [Refereed]

    　View Summary

    Abstract

    While the formation of a GaOx interlayer is key to achieving SiO2/GaN interfaces with low defect density, positive fixed charge is rather easily generated through the reduction of GaOx layer if the annealing conditions are not properly designed. In this study, we minimized the unstable GaOx layer by sputter SiO2 deposition. Negligible GaOx growth was confirmed by synchrotron radiation X-ray photoelectron spectroscopy, even when post-deposition oxygen annealing up to 600°C was performed. A MOS device with negligible capacitance-voltage hysteresis, stable flat-band voltage, and low leakage current was demonstrated by performing oxygen and forming gas annealing at temperatures of 600°C and 400°C, respectively.

    DOI

    Scopus

    4
    Citation
    (Scopus)

  • Fabrication and Luminescence Characterization of Ge Wires with Uniaxial Tensile Strains Applied using Internal Stresses in Deposited Metal Thin Films

    Takayoshi Shimura, Shogo Tanaka, Takuji Hosoi, Heiji Watanabe

    Journal of Electronic Materials    2023.03  [Refereed]

    Authorship：Lead author

    DOI

    Scopus

  • Reduction of interface and oxide traps in SiO2/GaN MOS structures by oxygen and forming gas annealing

    Bunichiro Mikake, Takuma Kobayashi, Hidetoshi Mizobata, Mikito Nozaki, Takayoshi Shimura, Heiji Watanabe

    Applied Physics Express   16 ( 3 ) 031004 - 031004  2023.03  [Refereed]

    　View Summary

    Abstract

    The effect of post-deposition annealing on the electrical characteristics of SiO2/GaN MOS devices was investigated. While the key to the improvement was using oxygen annealing to form an interfacial GaOx layer and forming gas annealing to passivate the remaining defects, caution must be taken not to produce a fixed charge through reduction of the GaOx layer. By growing the GaOx layer with oxygen annealing at 800 °C and performing forming gas annealing at a low temperature of 200 °C, it became possible to suppress the reduction of GaOx and to reduce the interface traps, oxide traps, and fixed charge simultaneously.

    DOI

    Scopus

    4
    Citation
    (Scopus)

  • Controllability of luminescence wavelength from GeSn wires fabricated by laser-induced local liquid phase crystallization on quartz substrates

    Takayoshi Shimura, Ryoga Yamaguchi, Naoto Tabuchi, Masato Kondoh, Mizuki Kuniyoshi, Takuji Hosoi, Takuma Kobayashi, Heiji Watanabe

    Japanese Journal of Applied Physics   62 ( SC ) SC1083-1 - SC1083-5  2023.03  [Refereed]

    Authorship：Lead author

    　View Summary

    Abstract

    We examined the effects of the laser scan speed and power on the Sn fraction and crystallinity of GeSn wires of 1 μm width and 1 mm length fabricated by laser-induced local liquid phase crystallization on quartz substrates. The Sn fraction increased from 1% to 3.5% with an increasing scan speed from 5 to 100 μm s−1, corresponding to a luminescence wavelength of 1770–2070 nm. This result can be interpreted as the scan speed dependence of the non-equilibrium degree during crystal growth. The increase in the laser power reduced the Sn fraction and caused a blue shift in the luminescence wavelength. We discuss these phenomena based on the growth kinetics of zone melting.

    DOI

    Scopus

  • Optical Characteristics of Single-Crystal GeSn Thin Wires Fabricated by Local Liquid Phase Crystallization

    Takayoshi Shimura, Takuji Hosoi, Takuma Kobayashi, Heiji Watanabe

    The Review of Laser Engineering   50 ( 10 ) 565 - 569  2022.10  [Refereed]

    Authorship：Lead author

  • Degradation of NO-nitrided SiC MOS interfaces by excimer ultraviolet light irradiation

    Hiroki Fujimoto, Takuma Kobayashi, Mitsuru Sometani, Mitsuo Okamoto, Takayoshi Shimura, Heiji Watanabe

    Applied Physics Express   15 ( 10 ) 104004 - 104004  2022.10  [Refereed]

    　View Summary

    Abstract

    The impact of excimer ultraviolet (UV) light irradiation on SiO2/SiC(0001) and (112̄0) interfaces was examined to get insight into the effect of NO nitridation. While NO nitridation appears to be effective in passivating the electron traps at the SiO2/SiC interfaces, we found that the nitridation induces additional traps that are not active until UV light is irradiated. The traps include those causing hysteresis and frequency dispersion in the C–V characteristics and those affecting the long-term reliability of MOS devices. A non-nitrided SiO2/SiC interface was less sensitive to UV light, indicating the instability of the nitrided SiC MOS structure.

    DOI

    Scopus

    1
    Citation
    (Scopus)

  • Electrical properties and energy band alignment of SiO2/GaN metal-oxide-semiconductor structures fabricated on N-polar GaN( 0001¯) substrates

    Hidetoshi Mizobata, Kazuki Tomigahara, Mikito Nozaki, Takuma Kobayashi, Akitaka Yoshigoe, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Applied Physics Letters   121 ( 6 ) 062104-1 - 062104-6  2022.08  [Refereed]

    　View Summary

    The interface properties and energy band alignment of SiO2/GaN metal-oxide-semiconductor (MOS) structures fabricated on N-polar GaN([Formula: see text]) substrates were investigated by electrical measurements and synchrotron-radiation x-ray photoelectron spectroscopy. They were then compared with those of SiO2/GaN MOS structures on Ga-polar GaN(0001). Although the SiO2/GaN([Formula: see text]) structure was found to be more thermally unstable than that on the GaN(0001) substrate, excellent electrical properties were obtained for the SiO2/GaN([Formula: see text]) structure by optimizing conditions for post-deposition annealing. However, the conduction band offset for SiO2/GaN([Formula: see text]) was smaller than that for SiO2/GaN(0001), leading to increased gate leakage current. Therefore, caution is needed when using N-polar GaN([Formula: see text]) substrates for MOS device fabrication.

    DOI

    Scopus

    1
    Citation
    (Scopus)

  • Impact of post-nitridation annealing in CO2 ambient on threshold voltage stability in 4H-SiC metal-oxide-semiconductor field-effect transistors

    Takuji Hosoi, Momoe Ohsako, Kidist Moges, Koji Ito, Tsunenobu Kimoto, Mitsuru Sometani, Mitsuo Okamoto, Akitaka Yoshigoe, Takayoshi Shimura, Heiji Watanabe

    Applied Physics Express   16 ( 6 ) 061003-1 - 061003-5  2022.05  [Refereed]

    DOI

    Scopus

    3
    Citation
    (Scopus)

  • Comprehensive physical and electrical characterizations of NO nitrided SiO2/4H-SiC(112̄0) interfaces

    Takato Nakanuma, Yu Iwakata, Arisa Watanabe, Takuji Hosoi, Takuma Kobayashi, Mitsuru Sometani, Mitsuo Okamoto, Akitaka Yoshigoe, Takayoshi Shimura, Heiji Watanabe

    Japanese Journal of Applied Physics   61 ( SC ) SC1065-1 - SC1065-8  2022.05  [Refereed]

    　View Summary

    <title>Abstract</title>
    Nitridation of SiO2/4H-SiC(112̄0) interfaces with post-oxidation annealing in an NO ambient (NO-POA) and its impact on the electrical properties were investigated. Sub-nm-resolution nitrogen depth profiling at the interfaces was conducted by using a scanning X-ray photoelectron spectroscopy microprobe. The results showed that nitrogen atoms were incorporated just at the interface and that interface nitridation proceeded much faster than at SiO2/SiC(0001) interfaces, resulting in a 2.3 times higher nitrogen concentration. Electrical characterizations of metal-oxide-semiconductor capacitors were conducted through capacitance–voltage (<italic>C</italic>–<italic>V</italic>) measurements in the dark and under illumination with ultraviolet light to evaluate the interface defects near the conduction and valence band edges and those causing hysteresis and shifting of the <italic>C</italic>–<italic>V</italic> curves. While all of these defects were passivated with the progress of the interface nitridation, excessive nitridation resulted in degradation of the MOS capacitors. The optimal conditions for NO-POA are discussed on the basis of these experimental findings.

    DOI

    Scopus

    8
    Citation
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  • Fixed-charge generation in SiO2/GaN MOS structures by forming gas annealing and its suppression by controlling Ga-oxide interlayer growth

    Hidetoshi Mizobata, Mikito Nozaki, Takuma Kobayashi, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Japanese Journal of Applied Physics   61 ( SC ) SC1034 - SC1034  2022.05  [Refereed]

    　View Summary

    <title>Abstract</title>
    A recent study has shown that anomalous positive fixed charge is generated at SiO2/GaN interfaces by forming gas annealing (FGA). Here, we conducted systematic physical and electrical characterizations of GaN-based metal-oxide-semiconductor (MOS) structures to gain insight into the charge generation mechanism and to design optimal interface structures. A distinct correlation between the amount of FGA-induced fixed charge and interface oxide growth indicated the physical origins of the fixed charge to be defect formation driven by the reduction of the Ga-oxide (GaO<italic>
    x
    </italic>) interlayer. This finding implies that, although post-deposition annealing in oxygen compensates for oxygen deficiencies and FGA passivates defect in GaN MOS structures, excessive interlayer GaO<italic>
    x
    </italic> growth leads to instability in the subsequent FGA treatment. On the basis of this knowledge, SiO2/GaO<italic>
    x
    </italic>/GaN MOS devices with improved electrical properties were fabricated by precisely controlling the interfacial oxide growth while taking advantage of defect passivation with FGA.

    DOI

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    10
    Citation
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  • Toward Super Temporal Resolution by Suppression of Mixing Effects of Electrons

    Nguyen Hoai Ngo, Takeharu Goji Etoh, Kazuhiro Shimonomura, Taeko Ando, Yoshiyuki Matsunaga, Takayoshi Shimura, Heiji Watanabe, Hideki Mutoh, Yoshinari Kamakura, Edoardo Charbon

    IEEE Transactions on Electron Devices   69 ( 6 ) 2879 - 2885  2022.04  [Refereed]

    DOI

  • Impact of nitridation on the reliability of 4H-SiC(112̄0) MOS devices

    Takato Nakanuma, Takuma Kobayashi, Takuji Hosoi, Mitsuru Sometani, Mitsuo Okamoto, Akitaka Yoshigoe, Takayoshi Shimura, Heiji Watanabe

    Applied Physics Express   15 ( 4 ) 041002-1 - 041002-4  2022.04  [Refereed]

    　View Summary

    Abstract

    The leakage current and flat-band voltage (VFB) instability of NO-nitrided SiC(11$\bar{2}$0) (a-face) MOS devices were systematically investigated. Although NO nitridation is effective in improving the interface properties, we found that it reduces the onset field of Fowler–Nordheim current by about 1 MV cm−1, leading to pronounced leakage current. Synchrotron radiation X-ray photoelectron spectroscopy revealed that the nitridation reduces the conduction band offset at the SiO2/SiC interface, corroborating the above finding. Furthermore, systematical positive and negative bias stress tests clearly indicated the enhancement of VFB instability of nitrided a-face MOS devices against electron and hole injection.

    DOI

    Scopus

    6
    Citation
    (Scopus)

  • Characterization of Electron Traps in Gate Oxide of m-plane SiC MOS Capacitors

    Yutaka Terao, Takuji Hosoi, Takuma Kobayashi, Takayoshi Shimura, Heiji Watanabe

    2022 IEEE International Reliability Physics Symposium (IRPS)     P66-1 - P66-4  2022.03  [Refereed]

    DOI

  • Investigation of reliability of NO nitrided SiC(1100) MOS devices

    Takato Nakanuma, Asato Suzuki, Yu Iwakata, Takuma Kobayashi, Mitsuru Sometani, Mitsuo Okamoto, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    2022 IEEE International Reliability Physics Symposium (IRPS)     3B.2-1 - 3B.2-5  2022.03  [Refereed]

    DOI

  • Insight into interface electrical properties of metal–oxide–semiconductor structures fabricated on Mg-implanted GaN activated by ultra-high-pressure annealing

    Yuhei Wada, Hidetoshi Mizobata, Mikito Nozaki, Takuma Kobayashi, Takuji Hosoi, Tetsu Kachi, Takayoshi Shimura, Heiji Watanabe

    Applied Physics Letters   120 ( 8 ) 082103 - 082103  2022.02  [Refereed]

    　View Summary

    GaN-based metal–oxide–semiconductor (MOS) devices, such as n- and p-type capacitors and inversion- and accumulation-type p-channel field effect transistors (MOSFETs), were fabricated by Mg-ion implantation and ultra-high-pressure annealing (UHPA) under 1-GPa nitrogen pressure. Even though UHPA was conducted at 1400 °C without protective layers on GaN surfaces, n-type MOS capacitors with SiO2 gate dielectrics formed on non-ion-implanted regions exhibited well-behaved capacitance–voltage characteristics with negligible hysteresis and frequency dispersion, indicating distinct impact of UHPA in suppressing surface degradation during high-temperature annealing. Efficient activation of the implanted Mg dopants and reasonable hole accumulation at the SiO2/GaN interfaces were also achieved for p-type capacitors by UHPA, but the fabricated inversion- and accumulation-type p-channel GaN MOSFETs were hardly turned on. The findings reveal extremely low hole mobility at GaN MOS interfaces and suggest an intrinsic obstacle for the development of GaN-based MOS devices.

    DOI

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    12
    Citation
    (Scopus)

  • 構造化X線光源による透過型X線イメージングの高感度化・高分解能化

    志村考功

    検査技術   27 ( 1 ) 49 - 55  2022.01

    Authorship：Lead author

  • High-temperature CO2 treatment for improving electrical characteristics of 4H-SiC(0001) metal-oxide-semiconductor devices

    Takuji Hosoi, Momoe Ohsako, Takayoshi Shimura, Heiji Watanabe

    Applied Physics Express   14 ( 10 ) 101001 - 101001  2021.10  [Refereed]

    DOI

    Scopus

    8
    Citation
    (Scopus)

  • Probing the surface potential of SiO2/4H-SiC(0001) by terahertz emission spectroscopy

    Hidetoshi Nakanishi, Tatsuhiko Nishimura, Iwao Kawayama, Masayoshi Tonouchi, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Journal of Applied Physics   130 ( 11 ) 115305-1 - 115305-7  2021.09  [Refereed]

    DOI

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    5
    Citation
    (Scopus)

  • Demonstration of 4H-SiC CMOS circuits consisting of well-balanced n- and p-channel MOSFETs fabricated by ultrahigh-temperature gate oxidation

    Kidist Moges, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Applied Physics Express   14 ( 9 ) 091006 - 091006  2021.09  [Refereed]

    DOI

    Scopus

    6
    Citation
    (Scopus)

  • Backscattering X-ray imaging using Fresnel zone aperture

    Takayoshi Shimura, Takuji Hosoi, Heiji Watanabe

    Applied Physics Express   14 ( 7 ) 072002 - 072002  2021.07  [Refereed]

    Authorship：Lead author

    DOI

    Scopus

    2
    Citation
    (Scopus)

  • Inhibition of Mg activation in p-type GaN caused by thin AlGaN capping layer and impact of designing hydrogen desorption pathway

    Yuhei Wada, Hidetoshi Mizobata, Mikito Nozaki, Takuji Hosoi, Tetsuo Narita, Tetsu Kachi, Takayoshi Shimura, Heiji Watanabe

    Applied Physics Express   14 ( 7 ) 071001 - 071001  2021.07  [Refereed]

    DOI

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    2
    Citation
    (Scopus)

  • A Pixel Design of a Branching Ultra-Highspeed Image Sensor

    Nguyen Hoai Ngo, Kazuhiro Shimonomura, Taeko Ando, Takayoshi Shimura, Heiji Watanabe, Kohsei Takehara, Anh Quang Nguyen, Edoardo Charbon, Takeharu Goji Etoh

    Sensors   21 ( 7 ) 2506 - 2506  2021.04  [Refereed]

    　View Summary

    A burst image sensor named Hanabi, meaning fireworks in Japanese, includes a branching CCD and multiple CMOS readout circuits. The sensor is backside-illuminated with a light/charge guide pipe to minimize the temporal resolution by suppressing the horizontal motion of signal carriers. On the front side, the pixel has a guide gate at the center, branching to six first-branching gates, each bifurcating to second-branching gates, and finally connected to 12 (=6×2) floating diffusions. The signals are either read out after an image capture operation to replay 12 to 48 consecutive images, or continuously transferred to a memory chip stacked on the front side of the sensor chip and converted to digital signals. A CCD burst image sensor enables a noiseless signal transfer from a photodiode to the in-situ storage even at very high frame rates. However, the pixel count conflicts with the frame count due to the large pixel size for the relatively large in-pixel CCD memory elements. A CMOS burst image sensor can use small trench-type capacitors for memory elements, instead of CCD channels. However, the transfer noise from a floating diffusion to the memory element increases in proportion to the square root of the frame rate. The Hanabi chip overcomes the compromise between these pros and cons.

    DOI

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    3
    Citation
    (Scopus)

  • Origin of Anomalous Fixed Charges at the SiO2/GaN Interface due to Forming Gas Annealing

        195 - 199  2021.01  [Refereed]

  • Physical Origins of Anomalous Fixed Charges at the SiO2/GaN Interface Generated by Forming Gas Annealing

       2020.12  [Refereed]

  • 4H-SiC CMOS inverters fabricated by ultrahigh-temperature gate oxidation and forming gas annealing

    Kidist Moges, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

       2020.12  [Refereed]

  • Toward the Super Temporal Resolution Image Sensor with a Germanium Photodiode for Visible Light

    Nguyen Hoai Ngo, Anh Quang Nguyen, Fabian M. Bufler, Yoshinari Kamakura, Hideki Mutoh, Takayoshi Shimura, Takuji Hosoi, Heiji Watanabe, Philippe Matagne, Kazuhiro Shimonomura, Kohsei Takehara, Edoardo Charbon, Takeharu Goji Etoh

    Sensors   20 ( 23 ) 6895 - 6895  2020.12  [Refereed]

    DOI

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    5
    Citation
    (Scopus)

  • 光の飛翔を捉えた超高速イメージセンサと今後の展開

    江藤 剛治, 下ノ村 和弘, 志村 考功, 渡部 平司

    映像情報メディア学会誌   74 ( 6 ) 936 - 941  2020.11

  • Gate Stack Technology for Advanced GaN-based MOS Devices

    Heiji Watanabe, Takuji Hosoi, Mikito Nozaki, Hidetoshi Mizobata, Takayoshi Shimura

       2020.09  [Refereed]  [Invited]

  • Anomalous interface fixed charge generated by forming gas annealing in SiO2/GaN MOS devices

    Hidetoshi Mizobata, Yuhei Wada, Mikito Nozaki, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Applied Physics Express   13 ( 8 ) 081001 - 081001  2020.08  [Refereed]

    DOI

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    9
    Citation
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  • Insight into Channel Conduction Mechanisms of 4H-SiC(0001) MOSFET Based on Temperature-Dependent Hall Effect Measurement

    Hironori Takeda, Mitsuru Sometani, Takuji Hosoi, Takayoshi Shimura, Hiroshi Yano, Heiji Watanabe

    Materials Science Forum   1004   620 - 626  2020.07  [Refereed]

    　View Summary

    Temperature-dependent Hall effect measurements were conducted to investigate the channel conduction mechanisms of 4H-SiC metal-oxide-semiconductor field-effect transistors (MOSFETs). This method allows us to discriminate the impact of the density of mobile (free) carriers in the inversion channels and their net mobility on the performance of SiC MOSFETs. It was found that, while the free carrier ratio of SiC MOSFETs with conventional gate oxides formed by dry oxidation is below 4% at 300 K, increasing the free carrier ratio due to thermal excitation of trapped electrons from SiO2/SiC interfaces leads to an unusual improvement in the field-effect mobility of SiC MOSFETs at elevated temperatures. Specifically, a significant increase in free carrier density surpasses the mobility degradation caused by phonon scattering for thermally grown SiO2/SiC interfaces. It was also found that, although nitrogen incorporation in SiO2/SiC interfaces increases the free carrier ratio typically up to around 30%, introduction of an additional scattering factor associated with interface nitridation compensates for the moderate amount of thermally generated mobile carriers at high temperatures, indicating a fundamental drawback of nitridation of SiO2/SiC interfaces. On the basis of these findings, we discuss the channel conduction mechanisms of SiC MOSFETs.

    DOI

  • Evaluation and mitigation of reactive ion etching-induced damage in AlGaN/GaN MOS structures fabricated by low-power inductively coupled plasma

    Mikito Nozaki, Daiki Terashima, Akitaka Yoshigoe, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Japanese Journal of Applied Physics   59 ( SM ) SMMA07 - SMMA07  2020.07  [Refereed]

    DOI

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    4
    Citation
    (Scopus)

  • Insight into gate dielectric reliability and stability of SiO2/GaN MOS devices

    Yuhei Wada, Mikito Nozaki, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Japanese Journal of Applied Physics   59 ( SM ) SMMA03 - SMMA03  2020.07  [Refereed]

    DOI

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    17
    Citation
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  • Highly Efficient Room Temperature Electroluminescence from GeSn Lateral PIN Diode Fabricated by Liquid-phase Crystallization

        65 - 68  2020.01  [Refereed]

  • Solid-phase Grown GeSn n-MOSFETs on GOI Wafer Fabricated by Flash Lamp Annealing

        121 - 124  2020.01  [Refereed]

  • Comprehensive and systematic design of metal/high-k gate stack for high-performance and highly reliable SiC power MOSFET

    Takuji Hosoi, Shuji Azumo, Yusaku Kashiwagi, Shigetoshi Hosaka, Kenji Yamamoto, Masatoshi Aketa, Hirokazu Asahara, Takashi Nakamura, Tsunenobu Kimoto, Takayoshi Shimura, Heiji Watanabe

    Japanese Journal of Applied Physics   59 ( 2 ) 021001-1 - 021001-8  2020.01  [Refereed]

    DOI

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    5
    Citation
    (Scopus)

  • The Role of Oxygen Ambient Anneal for Ba-incorporated SiO2/SiC Interface

    寺尾 豊, 辻 英徳, 細井 卓治, 張 旭芳, 矢野 裕司, 志村 考功, 渡部 平司

        137 - 139  2020.01  [Refereed]

  • Room Temperature Electroluminescence from Tensile-strained GeSn Lateral PIN Structures Fabricated by Nucleation-controlled Liquid-phase Crystallization

    Y. Wada, T. Hosoi, T. Shimura, H. Watanabe

       2019.12  [Refereed]

  • High-temperature CO2 Process for Improvement of SiC MOS Characteristics

    T. Hosoi, M. Ohsako, T. Shimura, H. Watanabe

       2019.12  [Refereed]

  • レーザーテラヘルツエミッション顕微鏡を用いたSiC MOS界面の表面ポテンシャル評価

    西村辰彦, 中西英俊, 川山巌, 斗内政吉, 細井卓治, 志村考功, 渡部平司

       2019.12  [Refereed]

  • SiO2中へのGa拡散がSiO2/GaN MOS特性に与える影響の評価

    和田悠平, 野崎幹人, 細井卓治, 志村考功, 渡部平司

       2019.12  [Refereed]

  • AlGaN/GaNヘテロ構造の低バイアス電力ICPエッチングによる低損傷加工

    野崎幹人, 寺島大貴, 吉越章隆, 細井卓治, 志村考功, 渡部平司

       2019.12  [Refereed]

  • CO2アニールによるSiO2/SiC界面窒素量制御とSiC MOSFET信頼性向上

    細井卓治, 大迫桃恵, 伊藤滉二, 志村考功, 木本恒暢, 渡部平司

       2019.12  [Refereed]

  • Evaluation of Reactive Ion Etching-induced Damage on 2DEG at AlGaN/GaN Interface

    Mikito Nozaki, Daiki Terashima, Akitaka Yoshigoe, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

       2019.11  [Refereed]

  • Thermal Oxidation of SiC: Kinetics and SiO2/SiC Interface Property

    Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

       2019.11  [Refereed]  [Invited]

  • Oxidation of SiGe Alloy: Residual Order in SiO2 and Self-limiting Oxidation

    Takayoshi Shimura, Takuji Hosoi, Heiji Watanabe

       2019.11  [Refereed]  [Invited]

  • Characterization of Surface Potential of Oxidized Silicon Carbide by a Laser Terahertz Emission Microscope

    Tatsuhiko Nishimura, Hidetoshi Nakanishi, Iwao Kawayama, Masayoshi Tonouchi, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

       2019.10  [Refereed]

  • Interface Engineering of SiC MOS Devices by High-temperature CO2 Treatment

    Takuji Hosoi, Momoe Ohsako, Takayoshi Shimura, Heiji Watanabe

       2019.10  [Refereed]

  • Ideal phonon-scattering-limited mobility in inversion channels of 4H-SiC(0001) MOSFETs with ultralow net doping concentrations

    Mitsuru Sometani, Takuji Hosoi, Hirohisa Hirai, Tetsuo Hatakeyama, Shinsuke Harada, Hiroshi Yano, Takayoshi Shimura, Heiji Watanabe, Yoshiyuki Yonezawa, Hajime Okumura

    APPLIED PHYSICS LETTERS   115 ( 13 ) 132102-1 - 132102-5  2019.09  [Refereed]

    　View Summary

    The phonon-limited mobility in 4H-silicon carbide (SiC) inversion channels was precisely evaluated by employing ultralow net doping concentrations. The measured mobility in the inversion channels of these samples was comparable to the electron mobility in bulk 4H-SiC, and the temperature dependence indicated that the mobility can be ascribed to phonon-scattering-limited mobility. The strong dependence of the mobility on the net doping concentration cannot be explained by Coulomb scattering by dopant impurities. This indicates the existence of scattering origins at the SiO2/SiC interface. Comparison of dry oxidized samples and samples subjected to postoxidation annealing in nitric oxide revealed that the scattering origins were not attributable to trapped electrons at the SiO2/SiC interface states, although the nature of the scattering origins remains unclear.

    DOI

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    23
    Citation
    (Scopus)

  • Gate stack engineering for GaN power MOSFETs

    T. Hosoi, M. Nozaki, T. Shimura, H. Watanabe

       2019.08  [Refereed]  [Invited]

  • Recent progress in understanding carbon-related interface defects and electrical properties in SiC-MOS devices

    T. Hosoi, K. Moges, T. Shimura, H. Watanabe

       2019.07  [Refereed]  [Invited]

  • Evaluation of the Impact of Al Atoms on SiO2/SiC Interface Property by Using 4H-SiC n+-Channel Junctionless MOSFET

    Hironori Takeda, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Materials Science Forum   963   171 - 174  2019.07  [Refereed]

    DOI

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    5
    Citation
    (Scopus)

  • Tensile-strained GeSn-on-SOI MSM Photodetector Fabricated by Solid-phase Epitaxy

    H. Oka, W. Mizubayashi, T. Hosoi, T. Shimura, H. Watanabe, T. Maeda, N. Uchida, K. Endo

       2019.06  [Refereed]

  • Characterization of nitrogen distribution near SiO2/SiC interfaces annealed in NO

      119 ( 96 ) 1 - 4  2019.06  [Refereed]

  • Comparative study on thermal robustness of GaN and AlGaN/GaN MOS devices with thin oxide interlayers

    Mikito Nozaki, Daiki Terashima, Takahiro Yamada, Akitaka Yoshigoe, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    JAPANESE JOURNAL OF APPLIED PHYSICS   58 ( SC ) SCCD08-1 - SCCD08-6  2019.05  [Refereed]

    　View Summary

    Similarities and differences in the design of the interfaces between gate dielectrics and GaN-based semiconductors were systematically investigated with a focus on the thermal stability of the interlayers. Although the excellent electrical properties of a SiO2/GaN interface with a thin Ga-oxide interlayer (SiO2/GaOx/GaN) were deteriorated by high-temperature treatment at around 1000 degrees C, the thin oxide on the AlGaN surface (SiO2/GaOx/AlGaN) exhibited superior thermal stability and interface quality even after treatment at 1000 degrees C. Physical characterizations showed that thermal decomposition of the thin GaOx layer on the GaN surface is promoted by oxygen transfer, which produces volatile products, leading to remarkable roughening of the GaN surface. In contrast, decomposition of the thin GaOx layer was suppressed on the AlGaN surface under the high temperatures, preserving a smooth oxide surface. The mechanisms behind both the improved and degraded electrical properties in these GaN-based MOS structures are discussed on the basis of these findings. (C) 2019 The Japan Society of Applied Physics

    DOI

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    3
    Citation
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  • Mobility enhancement in recessed-gate AlGaN/GaN MOS-HFETs using an AlON gate insulator

    Takuji Hosoi, Kenta Watanabe, Mikito Nozaki, Takahiro Yamada, Takayoshi Shimura, Heiji Watanabe

    Japanese Journal of Applied Physics   58 ( SC ) SCCD16-1 - SCCD16-6  2019.05  [Refereed]

    DOI

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    11
    Citation
    (Scopus)

  • Performance improvement in 4H-SiC(0001) p-channel metal-oxide-semiconductor field-effect transistors with a gate oxide grown at ultrahigh temperature

    Kidist Moges, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Applied Physics Express   12 ( 6 ) 061003-1 - 061003-4  2019.05  [Refereed]

    DOI

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    10
    Citation
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  • Controlled oxide interlayer for improving reliability of SiO2/GaN MOS devices

    Takahiro Yamada, Daiki Terashima, Mikito Nozaki, Hisashi Yamada, Tokio Takahashi, Mitsuaki Shimizu, Akitaka Yoshigoe, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    JAPANESE JOURNAL OF APPLIED PHYSICS   58 ( SC ) SCCD06-1 - SCCD06-5  2019.04  [Refereed]

    　View Summary

    The impact of controlling Ga-oxide (GaOx) interlayers in SiO2/GaOx/GaN gate stacks is investigated by means of physical and electrical characterizations. Direct deposition of SiO2 insulators produces thin GaOx interlayers, and subsequent oxidation treatment attains high-quality insulator/GaN interface. However, the Ga diffusion into the SiO2 layers severely degrades the breakdown characteristics of GaN-MOS devices. To improve reliability of such devices, we proposed a two-step procedure with the initial SiO2 deposition conducted under nitrogen-rich ambient, followed by thick SiO2 capping. We found that this two-step procedure enables nitrogen incorporation in the insulator/GaN interface to stabilize GaN surface. Consequently, the Ga diffusion into the SiO2 overlayer during the oxidation annealing is effectively suppressed. The proposed method allows us to achieve a SiO2/GaOx/GaN stacked structure of superior electrical property with improved Weibull distribution of an oxide breakdown field and with interface state density below 10(10) cm(-2) eV(-1). (C) 2019 The Japan Society of Applied Physics

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    28
    Citation
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  • Analysis of III–V oxides at high-k/InGaAs interfaces induced by metal electrodes

    Shinichi Yoshida, Dennis H L Lin, Rena Suzuki, Yuki Miyanami, Nadine Collaert, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Japanese Journal of Applied Physics   58 ( 5 ) 051010-1 - 051010-6  2019.04  [Refereed]

    DOI

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    1
    Citation
    (Scopus)

  • 近赤外イメージセンサーに向けた石英基板上裏面照射型GeSnフォトダイオードアレイの開発

    岡 博史, 井上 慶太郎, Thi Thuy Nguyen, 黒木 伸一郎, 細井 卓治, 志村 考功, 渡部 平司

       2019.03  [Refereed]  [Invited]

  • Interface property of thermally grown SiO2/SiC structures and MOS characteristics

       2019.02  [Refereed]  [Invited]

  • Demonstration of mm long nearly intrinsic GeSn single-crystalline wires on quartz substrate fabricated by nucleation-controlled liquid-phase crystallization

    Youki Wada, Keitaro Inoue, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Japanese Journal of Applied Physics   58 ( SB ) SBBK01-1 - SBBK01-6  2019.02  [Refereed]

    DOI

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    6
    Citation
    (Scopus)

  • Insight into Channel Conduction Mechanism of 4H-SiC(0001) MOSFET Based on Temperature-dependent Hall-effect Measurement

    Hironori Takeda, Mitsuru Sometani, Takuji Hosoi, Takayoshi Shimura, Hiroshi Yano, Heiji Watanabe

       2019.01  [Refereed]

  • Synchrotron-Radiation X-ray Photoelectron Spectroscopy Study of GaOx Interlayer Growth on GaN Substrate with Different Conduction Type

    Takahiro Yamada, Daiki Terashima, Mikito Nozaki, Hisashi Yamada, Tokio Takahashi, Mitsuaki Shimizu, Akitaka Yoshigoe, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

       2019.01  [Refereed]

  • 温度可変ホール効果測定による4H-SiC(0001) MOSFETチャネル内電子伝導機構の考察

    武田紘典, 染谷満, 細井卓治, 志村考功, 矢野, 裕司, 渡部平司

    電子デバイス界面テクノロジー研究会 －材料・プロセス・デバイス特性の物理－ 第24回研究会 予稿集     225 - 228  2019.01

  • High-mobility P- and N-channel GeSn Thin-film Transistors on Transparent Substrate Fabricated by Nucleation-controlled Liquid-phase Crystallization

    T. Hosoi, H. Oka, K. Inoue, Y. Wada, T. Shimura, H. Watanabe

       2018.12  [Refereed]

  • Improved reliability of SiO2/GaN MOS devices by controlling the oxide interlayer

    Takahiro Yamada, Daiki Terashima, Mikito Nozaki, Hisashi Yamada, Tokio Takahashi, Mitsuaki Shimizu, Akitaka Yoshigoe, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

       2018.11  [Refereed]

  • High-temperature CO2 treatment for improvement of SiC MOS interface properties

       2018.11  [Refereed]

  • Comparative study of thermal decomposition of thin Ga oxide layer on GaN and AlGaN surfaces

       2018.11  [Refereed]

  • Precise evaluation of N distribution near SiO2/SiC interface in NO-annealed SiC MOS structures

       2018.11  [Refereed]

  • Influence of GaN Conduction Type on Formation of GaOx Interlayer in SiO2/GaN Structure

       2018.11  [Refereed]

  • Insight into channel conduction mechanism based on temperature dependence of free channel electron density in 4H-SiC(0001) MOSFET

    武田紘典, 染谷満, 細井卓治, 志村考功, 矢野, 裕司, 渡部平司

    先進パワー半導体分科会 第5回講演会 予稿集     97 - 98  2018.11  [Refereed]

  • Optoelectronic Integration Based on High-quality GeSn Grown by Liquid Phase Crystallization

    T. Hosoi, H. Oka, T. Shimura, H. Watanabe

       2018.10  [Refereed]  [Invited]

  • Highly n-Type Doped Ge and Gesn Wires Fabricated By Lateral Liquid-Phase Epitaxy

    H. Watanabe, T. Tomita, H. Oka, K. Inoue, T. Hosoi, T. Shimura

       2018.10  [Refereed]

  • Gate Stack Technology for Advanced GaN-Based Mos Devices

    H. Watanabe, T. Yamada, M. Nozaki, T. Hosoi, T. Shimura

       2018.10  [Refereed]  [Invited]

  • Improved channel mobility of 4H-SiC n-MOSFETs by ultrahigh-temperature gate oxidation with low-oxygen partial-pressure cooling

    Mitsuru Sometani, Yoshihito Katsu, Daisuke Nagai, Hidenori Tsuji, Takuji Hosoi, Takayoshi Shimura, Yoshiyuki Yonezawa, Heiji Watanabe

    Japanese Journal of Applied Physics   57 ( 12 ) 120304-1 - 120304-4  2018.10  [Refereed]

    DOI

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    5
    Citation
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  • Sub-nanometer-scale depth profiling of nitrogen atoms in SiO2/4H-SIC structures treated with NO annealing

    Moges Kidist, Sometani Mitsuru, Hosoi Takuji, Shimura Takayoshi, Harada Shinsuke, Watanabe Heiji

    APPLIED PHYSICS EXPRESS   11 ( 10 ) 101303-1 - 101303-4  2018.09  [Refereed]

    　View Summary

    We developed a technique to probe, with sub-nanometer-scale resolution, depth profiles of nitrogen atoms in NO-treated SiO2/4H-SiC structures for Si- and C-face substrates. This technique revealed that preferential nitridation only at the SiO2/SiC interfaces proceeds in the initial stage of NO annealing. Then, for the Si-face, a longer NO treatment leads to a nitrogen distribution in SiO2 within a few nm of the interface. This result is in line with the mobility degradation in MOSFETs subjected to excessive NO annealing. For the C-face, a larger amount of nitrogen was introduced and the depth profile was unchanged after reaching a saturation level. (C) 2018 The Japan Society of Applied Physics

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    16
    Citation
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  • Sub-nm-scale depth profiling of nitrogen in NO- and N2-annealed SiO2/4H-SiC(0001) structures

    K. Moges, M. Sometani, T. Hosoi, T. Shimura, S. Harada, H. Watanabe

    Materials Science Forum   963   226 - 229  2018.09  [Refereed]

    DOI

    Scopus

    2
    Citation
    (Scopus)

  • Characterization of SiO2/SiC interface using a Laser Terahertz Emission Microscope

    Tatsuhiko Nishimura, Hidetoshi Nakanishi, Iwao Kawayama, Masayoshi Tonouchi, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

       2018.09  [Refereed]

  • Superiority of pure O2-based gate oxidation on Hall effect mobility of 4H-SiC (0001) MOSFET revealed by low-doped epitaxial wafers

    M. Sometani, T. Hosoi, T. Hatakeyama, S. Harada, H. Yano, T. Shimura, H. Watanabe, Y. Yonezawa, H. Okumura

       2018.09  [Refereed]

  • 低不純物濃度4H-SiC(0001)基板上に作製したMOSFETのホール効果移動度に対するNO-POAの影響

    染谷満, 細井卓治, 畠山哲夫, 原田信介, 矢野, 裕司, 志村考功, 渡部平司, 米澤喜幸, 奥村元

    第79回応用物理学会秋季学術講演会 講演予稿集     13-171  2018.09

  • Ba添加によるSiC MOSFET特性向上の起源の検討

    藤田栄悟, 細井卓治, 染谷満, 畠山哲夫, 原田信介, 矢野, 裕司, 志村考功, 渡部平司

    第79回応用物理学会秋季学術講演会 講演予稿集     13-172  2018.09

  • Passive-active oxidation boundary for thermal oxidation of 4H-SiC(0001) surface in O-2/Ar gas mixture and its impact on SiO2/SiC interface quality

    Hosoi Takuji, Katsu Yoshihito, Moges Kidist, Nagai Daisuke, Sometani Mitsuru, Tsuji Hidenori, Shimura Takayoshi, Watanabe Heiji

    APPLIED PHYSICS EXPRESS   11 ( 9 ) 091301-1 - 091301-4  2018.08  [Refereed]

    DOI

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    19
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  • Insight into enhanced field-effect mobility of 4H-SiC MOSFET with Ba incorporation studied by Hall effect measurements

    Fujita Eigo, Sometani Mitsuru, Hatakeyama Tetsuo, Harada Shinsuke, Yano Hiroshi, Hosoi Takuji, Shimura Takayoshi, Watanabe Heiji

    AIP ADVANCES   8 ( 8 ) 085305-1 - 085305-6  2018.08  [Refereed]

    　View Summary

    Improved performance in 4H-SiC metal-oxide-semiconductor field-effect transistors (MOSFETs) by incorporating Ba into insulator/SiC interfaces was investigated by using a combination of the Hall effect and split capacitance-voltage measurements. It was found that a moderate annealing temperature causes negligible metal-enhanced oxidation, which is rather beneficial for increments in field-effect mobility (mu(FE)) of the FETs together with suppressed surface roughness of the gate oxides. The combined method revealed that, while severe mu(FE) degradation in SiC-MOSFETs is caused by a reduction of effective mobile carriers due to carrier trapping at the SiO2/SiC interfaces, Ba incorporation into the interface significantly increases mobile carrier density with greater impact than the widely-used nitrided interfaces. (C) 2018 Author(s).

    DOI

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    16
    Citation
    (Scopus)

  • Advancement of X-ray radiography using microfocus X-ray source in conjunction with amplitude grating and SOI pixel detector, SOPHIAS

    Hosono Ryo, Kawabata Tomoki, Hayashida Kiyoshi, Kudo Togo, Ozaki Kyosuke, Teranishi Nobukazu, Hatsui Takaki, Hosoi Takuji, Watanabe Heiji, Shimura Takayoshi

    OPTICS EXPRESS   26 ( 16 ) 21044 - 21053  2018.08  [Refereed]

    DOI

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    4
    Citation
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  • Implementation of atomic layer deposition-based AlON gate dielectrics in AlGaN/GaN MOS structure and its physical and electrical properties

    Mikito Nozaki, Kenta Watanabe, Takahiro Yamada, Hong-An Shih, Satoshi Nakazawa, Yoshiharu Anda, Tetsuzo Ueda, Akitaka Yoshigoe, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Japanese Journal of Applied Physics   57 ( 6 ) 06KA02-1 - 06KA02-7  2018.06  [Refereed]

    　View Summary

    Alumina incorporating nitrogen (aluminum oxynitride
    AlON) for immunity against charge injection was grown on a AlGaN/GaN substrate through the repeated atomic layer deposition (ALD) of AlN layers and in situ oxidation in ozone (O3) ambient under optimized conditions. The nitrogen distribution was uniform in the depth direction, the composition was controllable over a wide range (0.5–32%), and the thickness could be precisely controlled. Physical analysis based on synchrotron radiation X-ray photoelectron spectroscopy (SR-XPS) revealed that harmful intermixing at the insulator/AlGaN interface causing Ga out-diffusion in the gate stack was effectively suppressed by this method. AlON/AlGaN/GaN MOS capacitors were fabricated, and they had excellent electrical properties and immunity against electrical stressing as a result of the improved interface stability.

    DOI

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    20
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  • SiO2/AlON stacked gate dielectrics for AlGaN/GaN MOS heterojunction field-effect transistors

    Kenta Watanabe, Daiki Terashima, Mikito Nozaki, Takahiro Yamada, Satoshi Nakazawa, Masahiro Ishida, Yoshiharu Anda, Tetsuzo Ueda, Akitaka Yoshigoe, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Japanese Journal of Applied Physics   57 ( 6 ) 06KA03-1 - 06KA03-6  2018.06  [Refereed]

    　View Summary

    Stacked gate dielectrics consisting of wide bandgap SiO2 insulators and thin aluminum oxynitride (AlON) interlayers were systematically investigated in order to improve the performance and reliability of AlGaN/GaN metal–oxide–semiconductor (MOS) devices. A significantly reduced gate leakage current compared with that in a single AlON layer was achieved with these structures, while maintaining the superior thermal stability and electrical properties of the oxynitride/AlGaN interface. Consequently, distinct advantages in terms of the reliability of the gate dielectrics, such as an improved immunity against electron injection and an increased dielectric breakdown field, were demonstrated for AlGaN/GaN MOS capacitors with optimized stacked structures having a 3.3-nm-thick AlON interlayer.

    DOI

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    10
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  • Physical and electrical characterizations of AlGaN/GaN MOS gate stacks with AlGaN surface oxidation treatment

    Takahiro Yamada, Kenta Watanabe, Mikito Nozaki, Hong-An Shih, Satoshi Nakazawa, Yoshiharu Anda, Tetsuzo Ueda, Akitaka Yoshigoe, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Japanese Journal of Applied Physics   57 ( 6 )  2018.06  [Refereed]

    　View Summary

    The impacts of inserting ultrathin oxides into insulator/AlGaN interfaces on their electrical properties were investigated to develop advanced AlGaN/GaN metal–oxide–semiconductor (MOS) gate stacks. For this purpose, the initial thermal oxidation of AlGaN surfaces in oxygen ambient was systematically studied by synchrotron radiation X-ray photoelectron spectroscopy (SR-XPS) and atomic force microscopy (AFM). Our physical characterizations revealed that, when compared with GaN surfaces, aluminum addition promotes the initial oxidation of AlGaN surfaces at temperatures of around 400 °C, followed by smaller grain growth above 850 °C. Electrical measurements of AlGaN/GaN MOS capacitors also showed that, although excessive oxidation treatment of AlGaN surfaces over around 700 °C has an adverse effect, interface passivation with the initial oxidation of the AlGaN surfaces at temperatures ranging from 400 to 500 °C was proven to be beneficial for fabricating high-quality AlGaN/GaN MOS gate stacks.

    DOI

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    5
    Citation
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  • GaN-based Metal-Insulator-Semiconductor Transistors on Si for Power Switching Applications

    Satoshi Nakazawa, Hong-An Shih, Naohiro Tsurumi, Yoshiharu Anda, Tsuguyasu Hatsuda, Tetsuzo Ueda, Mikito Nozaki, Takahiro Yamada, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe, Tamotsu Hashizume

       2018.06  [Refereed]  [Invited]

  • AlON/AlGaN/GaN MIS-HFETによる高速スイッチング動作

    中澤敏志, 施泓安, 鶴見直大, 按田義治, 初田次康, 上田哲三, 野﨑幹人, 山田高寛, 細井卓治, 志村考功, 渡部平司, 橋詰保

       2018.03  [Refereed]

  • 裏面照射型近赤外イメージセンサーに向けた基板上単結晶GeSnフォトダイオードアレイの開発

    岡博史, 井上慶太郎, Thi Thuy Nguyen, 黒木伸一郎, 細井卓治, 志村考功, 渡部平司

       2018.03  [Refereed]

  • Lightly doped n-type tensile-strained single-crystalline GeSn-on-insulator structures formed by lateral liquid-phase crystallization

    Hiroshi Oka, Takashi Tomita, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    APPLIED PHYSICS EXPRESS   11 ( 1 ) 011304-1 - 011304-4  2018.01  [Refereed]

    　View Summary

    A tensile-strained single-crystalline n-type GeSn-on-insulator structure was demonstrated by lateral liquid-phase crystallization of an Sb-doped GeSn layer, and the diffusion and activation behaviors of Sb atoms in a liquid-phase-grown GeSn wire were investigated. A photoluminescence-based study revealed that a substantial amount of Sb was swept out during the liquid-phase growth of the GeSn wire. A thin-film transistor based on an Sb-doped GeSn wire on a quartz substrate exhibited n-channel accumulation-mode operation, and the temperature dependence of field-effect mobility revealed that the single-crystalline GeSn wire is a lightly doped n-type (similar to 10(17)cm(-3)). The combination of Sb-doped n-type and undoped p-type GeSn wires would bean ideal platform for GeSn-based optoelectronic integration. (C) 2018 The Japan Society of Applied Physics

    DOI

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    8
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  • Control of Ga-oxide interlayer growth and Ga diffusion in SiO2/GaN stacks for high-quality GaN-based metal-oxide-semiconductor devices with improved gate dielectric reliability

    Takahiro Yamada, Kenta Watanabe, Mikito Nozaki, Hisashi Yamada, Tokio Takahashi, Mitsuaki Shimizu, Akitaka Yoshigoe, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Applied Physics Express   11 ( 1 ) 015701-1 - 015701-4  2018.01  [Refereed]

    　View Summary

    A simple and feasible method for fabricating high-quality and highly reliable GaN-based metal-oxide-semiconductor (MOS) devices was developed. The direct chemical vapor deposition of SiO2 films on GaN substrates forming Ga-oxide interlayers was carried out to fabricate SiO2/GaO x /GaN stacked structures. Although well-behaved hysteresis-free GaN-MOS capacitors with extremely low interface state densities below 1010 cm-2 eV-1 were obtained by postdeposition annealing, Ga diffusion into overlying SiO2 layers severely degraded the dielectric breakdown characteristics. However, this problem was found to be solved by rapid thermal processing, leading to the superior performance of the GaN-MOS devices in terms of interface quality, insulating property, and gate dielectric reliability.

    DOI

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    41
    Citation
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  • High-mobility TFT and Enhanced Luminescence Utilizing Nucleation-controlled GeSn Growth on Transparent substrate for Monolithic Optoelectronic Integration

    H. Oka, M. Koyama, T. Tomita, T. Amamoto, K. Tominaga, S. Tanaka, T. Hosoi, T. Shimura, H. Watanabe

    2016 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM)    2018.01  [Refereed]

    　View Summary

    Record-high mobility Ge-based TFT (mu(FE): 423 cm(2)/Vs) and significant enhancement of near-infrared (NIR) luminescence (x54 Ge bulk) were demonstrated with single crystalline GeSn layer on transparent substrate grown by a novel liquid-phase crystallization technique. Our GeSn growth scheme is fully compatible with the conventional CMOS process and can provide high-quality tensile-strained p- and n-type GeSn layers, thus paving the way for monolithic optoelectronic integration available not only for optical communications but also for NIR imaging and biochemical sensing with wide wavelength range.

  • Recent Advances in GaN MIS-HFETs on Si Substrate

        87 - 90  2018.01  [Refereed]  [Invited]

  • Low-Temperature Optical Property and Cavity Formation of Tensile-Strained Highly n-Doped Ge Wires Fabricated by Lateral Liquid-Phase Epitaxy

        9 - 12  2018.01  [Refereed]

  • Single-Crystalline GeSn Formation on Quartz Substrate and Its Optoelectronic Applications

        151 - 154  2018.01  [Refereed]

  • Improvement of SiO2/4H-SiC(0001) interface properties by H2 and Ar mixture gas treatment prior to SiO2 deposition

    Hidenori Tsuji, Takuji Hosoi, Yutaka Terao, Takayoshi Shimura, Heiji Watanabe

    Materials Science Forum   924   461 - 464  2018  [Refereed]

    　View Summary

    We investigated the impact of high-temperature H2/Ar mixture gas treatment of 4HSiC(0001) surfaces before SiO2 deposition on the electrical properties of SiO2/SiC interfaces. Physical characterizations revealed that the SiC surface treated by the H2/Ar mixture gas exhibited a (√3×√3)R30° structure composed of Si-O bonds, indicating that a well-ordered and stable silicate adlayer was formed by the treatment to passivate SiC(0001) surface. Electrical defects at the CVD-grown SiO2/SiC interface was significantly reduced by the treatment. Consequently, a peak electron mobility in SiC-MOSFETs with the deposited gate oxides was enhanced to 24.9 cm2/Vs.

    DOI

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    1
    Citation
    (Scopus)

  • Improvements of Grating-based X-ray Phase Contrast Imaging with a Microfocus X-ray Source by a SOI Pixel Detector, SOPHIAS

    R. Hosono, D. Tsukamoto, T. Kawabata, K. Hayashida, T. Kudo, K. Ozaki, T. Hatsui, N. Teranishi, T. Hosoi, H. Watanabe, T. Shimura

       2017.12  [Refereed]

  • AlGaN/GaN MOS-HFET with high-quality and robust N-incorporated aluminum oxide (AlON) gate insulator

    K. Watanabe, M. Nozaki, T. Yamada, S. Nakazawa, M. Ishida, Y. Anda, T. Ueda, A. Yoshigoe, T. Hosoi, T. Shimura, H. Watanabe

       2017.12  [Refereed]

  • 4H-SiC(0001) N- and P-channel MOSFETs with Pure SiO2 Gate Dielectrics Formed under Extreme Oxidation Conditions

    T. Hosoi, Y. Katsu, K. Moges, H. Tsuji, M. Sometani, T. Shimura, H. Watanabe

       2017.12  [Refereed]

  • Fast Switching Performance by 20 A / 730 V AlGaN/GaN MIS-HFET Using AlON Gate Insulator

    S. Nakazawa, H.-A. Shih, N. Tsurumi, Y. Anda, T. Hatsuda, T. Ueda, M. Nozaki, T. Yamada, T. Hosoi, T. Shimura, H. Watanabe, T. Hashizume

       2017.12  [Refereed]

  • Back-side Illuminated GeSn Photodiode Array on Quartz Substrate Fabricated by Laser-induced Liquid-phase Crystallization for Monolithically-integrated NIR Imager Chip

    H. Oka, K. Inoue, T. T. Nguyen, S. Kuroki, T. Hosoi, T. Shimura, H. Watanabe

       2017.12  [Refereed]

  • SiO2/AlON Stacked Gate Dielectrics for AlGaN/GaN MOS-HFET

    K. Watanabe, D. Terashima, M. Nozaki, T. Yamada, S. Nakazawa, M. Ishida, Y. Anda, T. Ueda, A. Yoshigoe, T. Hosoi, T. Shimura, H. Watanabe

       2017.11  [Refereed]

  • AlON Gate Dielectrics Formed by Repeating ALD-based Thin AlN Deposition and In situ Oxidation for AlGaN/GaN MOS-HFETs

    M. Nozaki, K. Watanabe, T. Yamada, H. Shih, S. Nakazawa, Y. Anda, T. Ueda, A. Yoshigoe, T. Hosoi, T. Shimura, H. Watanabe

       2017.11  [Refereed]

  • レーザーテラヘルツエミッション顕微鏡を用いた 4H-SiC ウエハ/熱酸化膜の特性評価

    西村辰彦, 中西英俊, 川山巌, 斗内政吉, 細井卓治, 志村考功, 渡部平司

       2017.11  [Refereed]

  • ジャンクションレス 4H-SiC(0001) MOSFET を用いた高濃度 n+層の電子移動度評価

    武田 紘典, 細井 卓治, 志村 考功, 渡部 平司

       2017.11  [Refereed]

  • AlGaN/GaN MOS デバイス向け ALD-AlON ゲート絶縁膜に対する窒素添加効果

    野崎 幹人, 渡邉 健太, 山田 高寛, 施 泓安, 中澤 敏志, 按田 義治, 上田 哲三, 吉越 章隆, 細井 卓治, 志村 考功, 渡部 平司

       2017.11  [Refereed]

  • Improved electrical properties of 4H-SiC MOS devices with high temperature oxidation

       2017.11  [Refereed]

  • マイクロフォーカスX線源と振幅格子を用いた多波長X線位相イメージング-SOI ピクセル検出器による高度化-

    細野凌, 塚本大裕, 川端智樹, 林田 清, 工藤統吾, 尾崎恭介, 初井宇記, 寺西信一, 細井卓治, 渡部平司, 志村考功

       2017.09  [Refereed]

  • La埋め込みターゲットを用いたTalbot-Lau干渉計によるX線位相イメージング

    塚本大裕, 山崎周, 細野凌, 細井卓治, 渡部平司, 志村考功

       2017.09  [Refereed]

  • Interface Property of SiO2/4H-SiC(0001) Structures Formed by Ultrahigh-Temperature Oxidation under Low Oxygen Partial Pressure

    T. Hosoi, Y. Katsu, D. Nagai, H. Tsuji, M. Sometani, T. Shimura, H. Watanabe

       2017.09  [Refereed]

  • Enhancement-mode n-channel TFT and room-temperature near-infrared emission based on n+/p junction in single-crystalline GeSn on transparent substrate

    H. Oka, M. Koyama, T. Hosoi, T. Shimura, H. Watanabe

    Digest of Technical Papers - Symposium on VLSI Technology     T58 - T59  2017.07  [Refereed]

    　View Summary

    We demonstrated an integration of enhancement-mode single-crystalline n-channel thin-film transistor (TFT) and n+/p diodes for light detection/emission based on the single-crystalline GeSn alloy grown on a transparent substrate. Owing to the excellent crystal quality of GeSn layer and a high-quality n+/p junction, a record-high electron mobility of 271 cm2/Vs and a room-temperature near-infrared electroluminescence (EL) were achieved. The present technology will offer an ideal platform for future GeSn-based optoelectronic integration.

    DOI

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    5
    Citation
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  • Design and control of interface reaction between Al-based dielectrics and AlGaN layer in AlGaN/GaN metal-oxide-semiconductor structures

    Kenta Watanabe, Mikito Nozaki, Takahiro Yamada, Satoshi Nakazawa, Yoshiharu Anda, Masahiro Ishida, Tetsuzo Ueda, Akitaka Yoshigoe, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    APPLIED PHYSICS LETTERS   111 ( 4 )  2017.07  [Refereed]

    　View Summary

    Important clues for achieving well-behaved AlGaN/GaN metal-oxide-semiconductor (MOS) devices with Al-based gate dielectrics were systematically investigated on the basis of electrical and physical characterizations. We found that low-temperature deposition of alumina insulators on AlGaN surfaces is crucial to improve the interface quality, thermal stability, and variability of MOS devices by suppressing Ga diffusion into the gate oxides. Moreover, aluminum oxynitride grown in a reactive nitric atmosphere was proven to expand the optimal process window that would improve the interface quality and to enhance immunity against charge injection into the gate dielectrics. The results constitute common guidelines for achieving high-performance and reliable AlGaN/GaN MOS devices. Published by AIP Publishing.

    DOI

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    16
    Citation
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  • MOS Interface Engineering for Advanced SiC and GaN Power Devices

    T. Hosoi, T. Shimura, H. Watanabe

       2017.07  [Refereed]  [Invited]

  • Improved interface properties of GaN-based metal-oxide-semiconductor devices with thin Ga-oxide interlayers

    Takahiro Yamada, Joyo Ito, Ryohei Asahara, Kenta Watanabe, Mikito Nozaki, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    APPLIED PHYSICS LETTERS   110 ( 26 )  2017.06  [Refereed]

    　View Summary

    The impact of thin Ga-oxide (GaOx) interlayers on the electrical properties of GaN-based metaloxide-semiconductor (MOS) devices was systematically investigated. Thin thermal oxides formed at around 900 degrees C were found to be beneficial for improving the electrical properties of insulator/GaN interfaces, despite the fact that thermal oxidation of GaN surfaces at high temperatures proceeds by means of grain growth. Consequently, well-behaved capacitance-voltage characteristics of SiO2/GaOx/n-GaN stacked MOS capacitors with an interface state density (Dit) as low as 1.7 x 10(11) cm (-2) eV(-1) were demonstrated. Moreover, the Dit value was further reduced for the SiO2/GaOx/GaN capacitor with a 2-nm-thick sputter-deposited GaOx interlayer. These results clearly indicate the intrinsically superior nature of the oxide/GaN interfaces and provide plausible guiding principles for fabricating high-performance GaN-MOS devices with thin GaOx interlayers. Published by AIP Publishing.

    DOI

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    54
    Citation
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  • Enhancement-Mode N-Channel TFT and Room-Temperature Near-Infrared Emission Based on n+/p Junction in Single-Crystalline GeSn on Transparent Substrate

    H. Oka, M. Koyama, T. Hosoi, T. Shimura, H. Watanabe

       2017.06  [Refereed]

  • Structure and Surface Morphology of Thermal SiO2 Grown on 4H-SiC by Metal-Enhanced Oxidation Using Barium

    Atthawut Chanthaphan, Yoshihito Katsu, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Materials Science Forum    2017.05  [Refereed]

    DOI

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    7
    Citation
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  • Ultrahigh Temperature Oxidation of 4H-SiC(0001) and an Impact of Cooling Process on SiO2/SiC Interface Properties

    Takuji Hosoi, Daisuke Nagai, Mitsuru Sometani, Takayoshi Shimura, Manabu Takei, Heiji Watanabe

       2017.05  [Refereed]

    DOI

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    3
    Citation
    (Scopus)

  • High-mobility TFT and enhanced luminescence utilizing nucleation-controlled GeSn growth on transparent substrate for monolithic optoelectronic integration

    H. Oka, M. Koyama, T. Tomita, T. Amamoto, K. Tominaga, S. Tanaka, T. Hosoi, T. Shimura, H. Watanabe

    Technical Digest - International Electron Devices Meeting, IEDM     22.1.1 - 22.1.4  2017.01  [Refereed]

    　View Summary

    Record-high mobility Ge-based TFT (μfe: 423 cm2/Vs) and significant enhancement of near-infrared (NIR) luminescence (×54 Ge bulk) were demonstrated with single-crystalline GeSn layer on transparent substrate grown by a novel liquid-phase crystallization technique. Our GeSn growth scheme is fully compatible with the conventional CMOS process and can provide high-quality tensile-strained p- and n-type GeSn layers, thus paving the way for monolithic optoelectronic integration available not only for optical communications but also for NIR imaging and biochemical sensing with wide wavelength range.

    DOI

    Scopus

    4
    Citation
    (Scopus)

  • Comprehensive study on initial thermal oxidation of GaN(0001) surface and subsequent oxide growth in dry oxygen ambient

    Takahiro Yamada, Joyo Ito, Ryohei Asahara, Kenta Watanabe, Mikito Nozaki, Satoshi Nakazawa, Yoshiharu Anda, Masahiro Ishida, Tetsuzo Ueda, Akitaka Yoshigoe, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    JOURNAL OF APPLIED PHYSICS   121 ( 3 )  2017.01  [Refereed]

    　View Summary

    Initial oxidation of gallium nitride (GaN) (0001) epilayers and subsequent growth of thermal oxides in dry oxygen ambient were investigated by means of x-ray photoelectron spectroscopy, spectroscopic ellipsometry, atomic force microscopy, and x-ray diffraction measurements. It was found that initial oxide formation tends to saturate at temperatures below 800 degrees C, whereas the selective growth of small oxide grains proceeds at dislocations in the epilayers, followed by noticeable grain growth, leading to a rough surface morphology at higher oxidation temperatures. This indicates that oxide growth and its morphology are crucially dependent on the defect density in the GaN epilayers. Structural characterizations also reveal that polycrystalline alpha- and beta-phase Ga2O3 grains in an epitaxial relation with the GaN substrate are formed from the initial stage of the oxide growth. We propose a comprehensive model for GaN oxidation mediated by nitrogen removal and mass transport and discuss the model on the basis of experimental findings. Published by AIP Publishing.

    DOI

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    73
    Citation
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  • Fabrication of tensile-strained single-crystalline GeSn on transparent substrate by nucleation-controlled liquid-phase crystallization

    Hiroshi Oka, Takashi Amamoto, Masahiro Koyama, Yasuhiko Imai, Shigeru Kimura, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    APPLIED PHYSICS LETTERS   110 ( 3 )  2017.01  [Refereed]

    　View Summary

    We developed a method of forming single-crystalline germanium-tin (GeSn) alloy on transparent substrates that is based on liquid-phase crystallization. By controlling and designing nucleation during the melting growth process, a highly tensile-strained single-crystalline GeSn layer was grown on a quartz substrate without using any crystal-seeds or catalysts. The peak field-effect hole mobility of 423 cm(2)/V s was obtained for a top-gate single-crystalline GeSn MOSFET on a quartz substrate with a Sn content of 2.6%, indicating excellent crystal quality and mobility enhancement due to Sn incorporation and tensile strain. Published by AIP Publishing.

    DOI

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    16
    Citation
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  • Ultrahigh-temperature oxidation of 4H-SiC(0001) and an impact of cooling process on SiO2/SiC interface properties

    Takuji Hosoi, Daisuke Nagai, Mitsuru Sometani, Takayoshi Shimura, Manabu Takei, Heiji Watanabe

    Materials Science Forum   897   323 - 326  2017  [Refereed]

    　View Summary

    This paper reviews our recent work on ultrahigh-temperature oxidation of 4H-SiC(0001) surfaces. Our rapid thermal oxidation experiments demonstrated the reaction-limited linear growth at temperatures ranging from 1200 to 1600°C. The Arrhenius plot of linear growth rate of thermal oxidation can be fitted by a linear line, and the activation energy of oxide growth in dry O2 oxidation was estimated to be 2.9 eV. We also found that unintentional oxidation during the cooling down process severely degrades SiO2/SiC interface properties, resulting in positive flatband voltage shift (VFB) and hysteresis in capacitance-voltage (C-V) characteristics regardless of oxidation temperature. By effectively suppressing oxide growth during the cooling process, we have clarified that SiO2/SiC interface properties depend on oxidation temperature and the lowest interface state density was obtained for the oxide formed at 1450°C.

    DOI

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    3
    Citation
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  • Structure and surface morphology of thermal SiO2 grown on 4H-SiC by metal-enhanced oxidation using barium

    Atthawut Chanthaphan, Yoshihito Katsu, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Materials Science Forum   897   340 - 343  2017  [Refereed]

    　View Summary

    Surface morphology and electrical properties of silicon dioxide (SiO2) on 4H-SiC substrates formed by metal-enhanced oxidation (MEO) using barium (Ba) atoms were systematically investigated. It was found that severe surface roughening caused by Ba-MEO can be suppressed by using SiO2 capping prior to MEO. The Ba atoms at the SiO2/SiC interface were found to diffuse to the oxide surface through the deposited SiO2 capping layer, and then the Ba density reduced to ~1014 cm-2 before stable MEO. The resulting SiO2/SiC interface showed the reduced interface state density but the insulating property of the oxides was significantly degraded.

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  • Reliability-aware design of metal/high-k gate stack for high-performance SiC power MOSFET

    Takuji Hosoi, Shuji Azumo, Yusaku Kashiwagi, Shigetoshi Hosaka, Kenji Yamamoto, Masatoshi Aketa, Hirokazu Asahara, Takashi Nakamura, Tsunenobu Kimoto, Takayoshi Shimura, Heiji Watanabe

    Proceedings of the International Symposium on Power Semiconductor Devices and ICs     247 - 250  2017  [Refereed]

    　View Summary

    Advanced metal/high-k gate stack technology for SiC-based power MOSFET was demonstrated. We found that the Hf incorporation into aluminum oxynitride (HfAlON gate insulator) combined with TIN electrode effectively improves the stability of threshold voltage under both negative and positive bias temperature stresses. Since the relative permittivity of HfAlON increases with increasing Hf content, peak transconductance enhancement up to 3.4 times with acceptable reliability margin was achieved in the state-of-the-art trench MOSFET by implementing TiN/HfA10N(Hf50%) gate stack.

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    14
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  • Insight into metal-enhanced oxidation using barium on 4H-SiC surfaces

    Atthawut Chanthaphan, Yoshihito Katsu, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    JAPANESE JOURNAL OF APPLIED PHYSICS   55 ( 12 )  2016.11  [Refereed]

    　View Summary

    Metal-enhanced oxidation (MEO) using ultrathin Ba layers on 4H-SiC surfaces was investigated by physical and electrical characterizations. We found that while comparable oxidation rates were enhanced for Si-and C-face surfaces even at a low temperature, significant surface and interface roughness were induced by initial MEO termed the incubation period. Depth profiling revealed that although most Ba atoms aggregated on the oxide surface, a tiny amount (similar to 10(14)cm(-2)) remaining at the oxide interface was responsible for the following stable MEO reaction and the reduced interface state density with the drawbacks of degraded leakage current and breakdown characteristics of SiC-MOS devices. (C) 2016 The Japan Society of Applied Physics

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    13
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  • Ultrahigh-temperature rapid thermal oxidation of 4H-SiC(0001) surfaces and oxidation temperature dependence of SiO2/SiC interface properties

    Takuji Hosoi, Daisuke Nagai, Mitsuru Sometani, Yoshihito Katsu, Hironori Takeda, Takayoshi Shimura, Manabu Takei, Heiji Watanabe

    APPLIED PHYSICS LETTERS   109 ( 18 )  2016.11  [Refereed]

    　View Summary

    Ultrahigh-temperature rapid thermal oxidation of 4H-SiC(0001) surfaces in dry O-2 ambient was performed at temperatures up to 1700 degrees C. The temperature dependence of the reaction-limited linear growth rate of a thermal SiO2 layer revealed that not active but passive oxidation is dominant even at 1600 degrees C, and its activation energy was estimated to be 2.9 eV. We also found that high-temperature oxidation is beneficial in improving SiO2/SiC interface properties, but unintentional oxidation during the cooling down process causes interface degradation. By effectively suppressing the oxide growth during the cooling process, the lowest interface state density was obtained for the oxide formed at 1450 degrees C. Published by AIP Publishing.

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  • Formation of thin GaOx Interlayer by thermal oxidation of SiO2/GaN and its effect on electrical properties

       2016.11  [Refereed]

  • Interface engineering of Al based gate insulators in AlGaN/GaN MOS-HFETs

       2016.11  [Refereed]

  • Hole trapping characteristics in SiC-MOS devices with nitrided SiO2/SiC interface

       2016.11  [Refereed]

  • Gate stack technology for advanced power semiconductor devices-Technological similarities and differences between SiC and GaNMOS development-

       2016.11  [Refereed]  [Invited]

  • Electrical characteristics of SiC MOSFET fabricated by ultra-high-temperature oxidation under low oxygen partial pressure

    染谷満, 細井卓治, 平井悠久, 畠山哲夫, 原田信介, 矢野, 裕司, 志村考功, 渡部平司, 米澤喜幸, 奥村元

    先進パワー半導体分科会 第5回講演会 予稿集     225 - 226  2016.11  [Refereed]

  • Synchrotron radiation X-ray photoelectron spectroscopy of Ti/Al ohmic contacts to n-type GaN: Key role of Al capping layers in interface scavenging reactions

    Mikito Nozaki, Joyo Ito, Ryohei Asahara, Satoshi Nakazawa, Masahiro Ishida, Tetsuzo Ueda, Akitaka Yoshigoe, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    APPLIED PHYSICS EXPRESS   9 ( 10 )  2016.09  [Refereed]

    　View Summary

    Interface reactions between Ti-based electrodes and n-type GaN epilayers were investigated by synchrotron radiation X-ray photoelectron spectroscopy. Metallic Ga and thin TiN alloys were formed at the interface by subsequently depositing Al capping layers on ultrathin Ti layers even at room temperature. By comparing results from stacked Ti/Al and single Ti electrodes, the essential role of Al capping layers serving as an oxygen-scavenging element to produce reactive Ti underlayers was demonstrated. Further growth of the metallic interlayer during annealing was observed. A strategy for achieving low-resistance ohmic contacts to n-GaN with low-thermal-budget processing is discussed. (C) 2016 The Japan Society of Applied Physics

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    6
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  • Effect of nitrogen incorporation into Al-based gate insulators in AlON/AlGaN/GaN metal-oxide-semiconductor structures

    Ryohei Asahara, Mikito Nozaki, Takahiro Yamada, Joyo Ito, Satoshi Nakazawa, Masahiro Ishida, Tetsuzo Ueda, Akitaka Yoshigoe, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    APPLIED PHYSICS EXPRESS   9 ( 10 )  2016.09  [Refereed]

    　View Summary

    The superior physical and electrical properties of aluminum oxynitride (AlON) gate dielectrics on AlGaN/GaN substrates in terms of thermal stability, reliability, and interface quality were demonstrated by direct AlON deposition and subsequent annealing. Nitrogen incorporation into alumina was proven to be beneficial both for suppressing intermixing at the insulator/AlGaN interface and reducing the number of electrical defects in Al2O3 films. Consequently, we achieved high-quality AlON/AlGaN/GaN metal-oxide-semiconductor capacitors with improved stability against charge injection and a reduced interface state density as low as 1.2 x 10(11) cm(-2) eV(-1). The impact of nitrogen incorporation into the insulator will be discussed on the basis of experimental findings. (C) 2016 The Japan Society of Applied Physics

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    45
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  • Impact of rapid cooling process in ultrahigh-temperature oxidation of 4H-SiC(0001)

    Mitsuru Sometani, Daisuke Nagai, Yoshihito Katsu, Takuji Hosoi, Takayoshi Shimura, Manabu Takei, Yoshiyuki Yonezawa, Heiji Watanabe

    JAPANESE JOURNAL OF APPLIED PHYSICS   56 ( 4 )  2016.09  [Refereed]

    　View Summary

    We conducted a rapid water-quenching procedure with ultrahigh-temperature oxidation to avoid degradation of the high-quality SiO2/SiC interface formed by ultrahigh-temperature oxidation during the cooling process. A reduction in the interface state density was observed for the SiO2/4H-SiC(0001) interface formed by ultrahigh-temperature oxidation in dry O-2 ambient using the water-quenching process, compared with other natural cooling processes. The oxidation temperature dependence of interface state density for the thermally grown SiO2/SiC structures formed using the water-quenching process revealed that degradation of the interface properties occurred not only during the cooling process but also during the continuous oxidation process at exceedingly high temperatures, above 1500 degrees C, in 100% dry O-2 ambient at 1 atm. (C) 2017 The Japan Society of Applied Physics

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    8
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  • Gate Stack Technology for Advanced AlGaN/GaN Mos-Hemt Power Devices

    H. Watanabe, R. Asahara, J. Ito, K. Watanabe, M. Nozaki, T. Yamada, S. Nakazawa, Y. Anda, M. Ishida, T. Ueda, A. Yoshigoe, T. Hosoi, T. Shimura

       2016.09  [Refereed]  [Invited]

  • SiO2/SiC界面への異種元素添加による界面準位低減とその留意点

    細井 卓治, A. Chanthaphan, 勝 義仁, 志村 孝功, 渡部 平司

       2016.08  [Refereed]

  • Analysis of X-ray diffraction curves of trapezoidal Si nanowires with a strain distribution

    Teruaki Takeuchi, Kosuke Tatsumura, Takayoshi Shimura, Iwao Ohdomari

    THIN SOLID FILMS   612   116 - 121  2016.06  [Refereed]

    　View Summary

    X-ray diffraction curves of oxidized Si nanowires with a strain distribution having a trapezoidal cross-section are analyzed using an X-ray kinematical treatment. The analysis is carried out assuming a strain distribution and cross-sectional shape to calculate a diffraction curve, followed by comparing it to the experimental one. The calculated diffraction curves reproduce the experimental ones over the whole measured range. Particularly, the calculated intensities as well as positions of fringe maxima and minima agree with the experimental curves. Also, the calculation indicates that the strain on a plane parallel to the bases becomes larger, as the plane becomes far from the longer base. This is demonstrated only by calculating X-ray diffraction curves assuming both strain distributions and cross-sectional shapes. (C) 2016 Elsevier B.V. All rights reserved.

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    1
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  • High-mobility GeSn p-MOSFETs on Transparent Substrate Utilizing Nucleation-controlled Liquid-phase Crystallization

    Hiroshi Oka, Takashi Amamoto, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    2016 IEEE SILICON NANOELECTRONICS WORKSHOP (SNW)     128 - 129  2016.06  [Refereed]

    　View Summary

    High-mobility GeSn p-MOSFETs on quartz substrate were demonstrated. We developed nucleation-controlled liquid-phase crystallization for obtaining high-quality tensile-strained single-crystalline GeSn layer. The peak field-effect hole mobility (mu(FE)) of 423 cm(2)/Vs was obtained with Sn content of 2 %, which indicates excellent crystalline quality of GeSn alloy formed by this technique.

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    1
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  • Development of a compact compression test stage for synchrotron radiation micro-Laue diffraction measurements of long-period stacking-ordered phases in Mg-Zn-Y alloys

    Shigeru Kimura, Kentaro Kajiwara, Takayoshi Shimura

    JAPANESE JOURNAL OF APPLIED PHYSICS   55 ( 3 ) 038002-1 - 038002-3  2016.01  [Refereed]

    　View Summary

    We have developed a compact compression test stage for synchrotron radiation (SR) micro-Laue diffraction (MLD) measurements to investigate the deformation behavior of Mg-Zn-Y alloys with long-period stacking-ordered (LPSO) structures. The stage can compress a small sample with a size of 0.3 x 0.3 x 1.0 mm(3). The loading can be changed from 0 to 100 N. Using this compression test stage, MLD experiments were performed on a directionally solidified Mg85Zn6Y9 alloy polycrystal with a single 18R-type LPSO phase. We succeeded in revealing the change in the grain boundaries with increasing compression loading. (C) 2016 The Japan Society of Applied Physics

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    2
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  • Band Gap Modulation of Tensile-Strained Ge by Top-Down Approach

       2016.01  [Refereed]

  • GaOx Formation Process in Thermal Oxidation of GaN

       2016.01  [Refereed]

  • Electrical Property of GeSn on Insulator Layer Fabricated by Lateral Liquid-Phase Epitaxy

       2016.01  [Refereed]

  • Self-Seeded Growth of Single-Crystal GeSn Alloys on Quartz Substrate by Rapid Thermal Annealing

       2016.01  [Refereed]

  • Improvement of SiO2/4H-SiC interface quality by post-oxidation annealing in N2 at high-temperatures

    Atthawut Chanthaphan, Yen Hung Cheng, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Materials Science Forum   858   627 - 630  2016  [Refereed]

    　View Summary

    The efficient and practical method for SiO2/4H-SiC interface improvement using post-oxidation annealing (POA) in pure N2 ambient was studied by means of x-ray photoelectron spectroscopy (XPS) analysis and electrical characterization. SiC-MOS capacitors with slope-shaped thermal oxides were used to investigate optimal conditions for interface nitridation. It was found that the amount of nitrogen atoms incorporated into the interfaces increased when raised the annealing temperature up to 1400�C, and thin oxide (&lt
    30 nm) was used. Furthermore, N2-POA at 1400�C was proven to be very promising as equivalent to NO-POA in terms of reduced interface state density of SiC-MOS devices.

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    3
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  • Cathodoluminescence study of SiO2/4H-SiC structures treated with high-temperature post-oxidation annealing

    Atthawut Chanthaphan, Yuta Fukushima, Kenji Yamamoto, Masatoshi Aketa, Hirokazu Asahara, Takashi Nakamura, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Materials Science Forum   858   445 - 448  2016  [Refereed]

    　View Summary

    The radiative defect centers in thermally-grown SiO2/4H-SiC structures with high-temperature post-oxidation annealing (POA) in various ambient gas, i.e. Ar, H2, and NOx, were examined using cathodoluminescence (CL) measurement. It was found that radiative centers with an extremely high luminescent efficiency were remained at the SiO2/SiC interfaces after Ar-POA and FGA. Thus, these defect centers are very stable against high-temperature annealing and reducing ambient. In contrast, NOx-POA significantly reduced amounts of the radiative defects that might be related to channel mobility improvement in SiC-MOSFETs.

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  • Impact of NO annealing on flatband voltage instability due to charge trapping in SiC MOS devices

    Yoshihito Katsu, Takuji Hosoi, Yuichiro Nanen, Tsunenobu Kimoto, Takayoshi Shimura, Heiji Watanabe

    Materials Science Forum   858   599 - 602  2016  [Refereed]

    　View Summary

    We evaluated the effect of NO annealing on hole trapping characteristic of SiC metal-oxide-semiconductor (MOS) capacitor by measuring flatband voltage (VFB) shifts during a constant negative gate voltage stress under UV illumination. Under low stress voltages, the VFB shift due to hole trapping was found to be suppressed by NO annealing. However, the VFB shift of the NO-annealed device increases significantly with stress time under high stress voltage conditions, while the device without NO annealing showed only a slight shift. This result implies that NO annealing enhances generation of hole traps, leading to the degradation of SiC-MOS devices in long-term reliability.

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    31
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  • Flatband voltage shift depending on SiO2/SiC interface charges in 4H-SiC MOS capacitors with ALON/SiO2 stacked gate dielectrics

    Takuji Hosoi, Shuji Azumo, Kenji Yamamoto, Masatoshi Aketa, Yusaku Kashiwagi, Shigetoshi Hosaka, Hirokazu Asahara, Takashi Nakamura, Takayoshi Shimura, Heiji Watanabe

    Materials Science Forum   858   681 - 684  2016  [Refereed]

    　View Summary

    The mechanism of flatband voltage shift in SiC metal-oxide-semiconductor (MOS) capacitors with stacked gate dielectrics consisting of aluminum oxynitride (AlON) layers and SiO2 underlayers was investigated by varying the AlON and SiO2 thicknesses. The flatband voltages of the fabricated capacitors with fixed SiO2 underlayer thicknesses were almost independent of the AlON thickness, indicating the negligible charges in AlON layer. On the other hand, when varying SiO2 underlayer thickness, the flatband voltage decreased with an increase in capacitance equivalent thickness (CET), and the slope of their linear fit was comparable to that for SiC MOS capacitors without AlON layer. These observations can be well explained by assuming interface charges at AlON/SiO2 interface with an amount comparable, but a polarity opposite, to those at SiO2/SiC interface.

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    2
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  • Enhancement of photoluminescence from n-type tensile-strained GeSn wires on an insulator fabricated by lateral liquid-phase epitaxy

    Takayoshi Shimura, Masahiro Matsue, Kohei Tominaga, Keiko Kajimura, Takashi Amamoto, Takuji Hosoi, Heiji Watanabe

    APPLIED PHYSICS LETTERS   107 ( 22 )  2015.12  [Refereed]

    　View Summary

    We investigated the optical properties of undoped and n-type GeSn wires fabricated by a lateral liquid-phase epitaxial method. The Sn concentration was approximately 0.5% in the region from the seed to near the wire end. Moreover, the Sn concentration increased to 6% at the wire end, whereas Si diffusion from the seed was enhanced and extended to 200 lm from the seed. Tensile strain gradually decreased from 0.5% close the seed to 0.25% at the wire end. The photoluminescence (PL) peak was red-shifted by Sn incorporation into the Ge wires, and a PL peak at 0.66 eV was observed from the wire end. Upon n-type doping, the PL intensity of the GeSn layers was significantly enhanced to approximately 10 times higher than that of the undoped GeSn wires. (C) 2015 AIP Publishing LLC.

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    15
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  • Insights into thermal diffusion of germanium and oxygen atoms in HfO2/GeO2/Ge gate stacks and their suppressed reaction with atomically thin AlOx interlayers

    Shingo Ogawa, Ryohei Asahara, Yuya Minoura, Hideki Sako, Naohiko Kawasaki, Ichiko Yamada, Takashi Miyamoto, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    JOURNAL OF APPLIED PHYSICS   118 ( 23 ) 23704-1 - 23704-5  2015.12  [Refereed]

    　View Summary

    The thermal diffusion of germanium and oxygen atoms in HfO2/GeO2/Ge gate stacks was comprehensively evaluated by x-ray photoelectron spectroscopy and secondary ion mass spectrometry combined with an isotopic labeling technique. It was found that O-18-tracers composing the GeO2 underlayers diffuse within the HfO2 overlayers based on Fick's law with the low activation energy of about 0.5 eV. Although out-diffusion of the germanium atoms through HfO2 also proceeded at the low temperatures of around 200 degrees C, the diffusing germanium atoms preferentially segregated on the HfO2 surfaces, and the reaction was further enhanced at high temperatures with the assistance of GeO desorption. A technique to insert atomically thin AlOx interlayers between the HfO2 and GeO2 layers was proven to effectively suppress both of these independent germanium and oxygen intermixing reactions in the gate stacks. (C) 2015 AIP Publishing LLC.

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    18
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  • Schottky source/drain germanium-based metal-oxide-semiconductor field-effect transistors with self-aligned NiGe/Ge junction and aggressively scaled high-k gate stack

    Takuji Hosoi, Yuya Minoura, Ryohei Asahara, Hiroshi Oka, Takayoshi Shimura, Heiji Watanabe

    APPLIED PHYSICS LETTERS   107 ( 25 ) 252104-1 - 252104-5  2015.12  [Refereed]

    　View Summary

    Schottky source/drain (S/D) Ge-based metal-oxide-semiconductor field-effect transistors (MOSFETs) were fabricated by combining high permittivity (high-k) gate stacks with ultrathin AlOx interlayers and Fermi level depinning process by means of phosphorous ion implantation into NiGe/Ge contacts. Improved thermal stability of the metal/high-k/Ge stacks enabled self-aligned integration scheme for Schottky S/D complementary MOS applications. Significantly reduced parasitic resistance and aggressively scaled high-k gate stacks with sub-1-nm equivalent oxide thickness were demonstrated for both p- and n-channel Schottky Ge-FETs with the proposed combined technology. (C) 2015 AIP Publishing LLC.

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    6
    Citation
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  • Effect of Nitrogen Incorporation into Al-based Gate Insulator in AlGaN/GaN MOS-HEMT

    R. Asahara, M. Nozaki, T. Yamada, J. Ito, S. Nakazawa, M. Ishida, T. Ueda, A. Yoshigoe, T. Hosoi, T. Shimura, H. Watanabe

       2015.12  [Refereed]

  • SiO2/SiC Interface Nitridation by High Temperature Pure Nitrogen Annealing

    T. Hosoi, A. Chanthaphan, T. Shimura, H. Watanabe

       2015.12  [Refereed]

  • Engineering of NiGe/Ge Junction by P Ion Implantation after Germanidation for Metal S/D Ge CMOS Technology

    H. Oka, Y. Minoura, R. Asahara, T. Hosoi, T. Shimura, H. Watanabe

    Abstracts, 45th IEEE Semiconductor Interface Specialists Conference    2015.12  [Refereed]  [Invited]

  • Design and demonstration of phase gratings for 2D single grating interferometer

    Naoki Morimoto, Sho Fujino, Yasuhiro Ito, Amane Yamazaki, Issei Sano, Takuji Hosoi, Heiji Watanabe, Takayoshi Shimura

    OPTICS EXPRESS   23 ( 23 ) 29399 - 29412  2015.11  [Refereed]

    　View Summary

    In this study, we examined five types of phase gratings in a two-dimensional (2D) single grating interferometer with multidot metal targets embedded in a diamond substrate. For a phase grating consisting of two stacked 1D pi/2-phase gratings and a checkerboard pi-phase grating the multidot-pattern self-images with high visibility (40%) were obtained as expected from simulations. In addition to an absorption image, differential phase contrast and dark-field images in both x and y directions were derived from a single image. We also examined face-centered-square multidot metal targets, which doubled the x-ray intensity, and obtained differential phase contrast images in both x and y directions. (C) 2015 Optical Society of America

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    14
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  • The Impact of Energy Barrier Height on Border Traps in III-V Gate Stacks

    S. Yoshida, S. Taniguchi, H. Minari, D. Lin, Ts. Ivanov, H. Watanabe, M. Nakazawa, N. Collaert, A. Thean

       2015.11  [Refereed]

  • Investigation of Initial Oxide Growth on GaN Epitaxial Films

    T. Yamada, J. Ito, R. Asahara, M. Nozaki, S. Nakazawa, M. Ishida, T. Ueda, A. Yoshigoe, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of 2015 International Workshop on Dielectric Thin Films for Future Electron Devices: Science and Technology (2015 IWDTF)    2015.11  [Refereed]

  • Study of SiO2/4H-SiC interface nitridation by post-oxidation annealing in pure nitrogen gas

    Atthawut Chanthaphan, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    AIP ADVANCES   5 ( 9 )  2015.09  [Refereed]

    　View Summary

    An alternative and effective method to perform interface nitridation for 4H-SiC metal-oxide-semiconductor (MOS) devices was developed. We found that the high-temperature post-oxidation annealing (POA) in N-2 ambient was beneficial to incorporate a sufficient amount of nitrogen atoms directly into thermal SiO2/SiC interfaces. Although N-2-POA was ineffective for samples with thick thermal oxide layers, interface nitridation using N-2-POA was achieved under certain conditions, i.e., thin SiO2 layers (&lt; 15 nm) and high annealing temperatures (&gt; 1350 degrees C). Electrical characterizations of SiC-MOS capacitors treated with high-temperature N-2-POA revealed the same evidence of slow trap passivation and fast trap generation that occurred in NO-treated devices fabricated with the optimized nitridation conditions. (C) 2015 Author(s). All article content, except where otherwise noted, is licensed under a Creative Commons Attribution 3.0 Unported License.

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    45
    Citation
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  • X-ray Talbot-Lau interferometer using lanthanum targets embedded in diamond substrates

    A. Yamazaki, N. Morimoto, S. Fujino, Y. Ito, I. Sano, T. Hosoi, H. Watanabe, T. Shimura

       2015.09  [Refereed]

  • 2D x-ray single grating interferometry with embedded metal targets

    N. Morimoto, S. Fujino, Y. Ito, A. Yamazaki, I. Sano, T. Hosoi, H. Watanabe, T. Shimura

       2015.09  [Refereed]

  • Development of single transmission grating Talbot-Lau interferometer with embedded tungsten targets for 30 keV x rays

    Y. Ito, N. Morimoto, S. Fujino, A. Yamazaki, I. Sano, T. Hosoi, H. Watanabe, T. Shimura

       2015.09  [Refereed]

  • Synchrotron Radiation X-Ray Photoelectron Spectroscopy Study of Interface Reactions in Al/Ti/GaN Ohmic Contacts

    M. Nozaki, J. Ito, R. Asahara, S. Nakazawa, M. Ishida, T. Ueda, A. Yoshigoe, Y. Teraoka, T. Hosoi, T. Shimura, H. Watanabe

       2015.09  [Refereed]

  • Exact evaluation of interface-reaction-limited growth in dry and wet thermal oxidation of 4H-SiC(0001) Si-face surfaces

    Takuji Hosoi, Daisuke Nagai, Takayoshi Shimura, Heiji Watanabe

    JAPANESE JOURNAL OF APPLIED PHYSICS   54 ( 9 )  2015.08  [Refereed]

    　View Summary

    The kinetics of dry and wet thermal oxidation of 4H-SiC(0001) Si-face surfaces were systematically examined to clarify the interface-reaction-limited growth depending on the oxidizing agent. A gradually retarded oxide growth in the early stage of oxidation (&lt;15 nm) and then a linear growth corresponding to a real interface-reaction-limited growth extending to 150 nm in oxide thickness were observed regardless of the oxidation ambient. It was also found that, unlike in the case of Si oxidation, water oxidants play no significant role in enhancing SiC oxidation. The initial retarded oxidation rate and characteristic linear regime are discussed on the basis of the SiO2/SiC interfacial structures. (C) 2015 The Japan Society of Applied Physics

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  • Comprehensive study and design of scaled metal/high-k/Ge gate stacks with ultrathin aluminum oxide interlayers

    Ryohei Asahara, Iori Hideshima, Hiroshi Oka, Yuya Minoura, Shingo Ogawa, Akitaka Yoshigoe, Yuden Teraoka, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    APPLIED PHYSICS LETTERS   106 ( 23 )  2015.06  [Refereed]

    　View Summary

    Advanced metal/high-k/Ge gate stacks with a sub-nm equivalent oxide thickness (EOT) and improved interface properties were demonstrated by controlling interface reactions using ultrathin aluminum oxide (AlOx) interlayers. A step-by-step in situ procedure by deposition of AlOx and hafnium oxide (HfOx) layers on Ge and subsequent plasma oxidation was conducted to fabricate Pt/HfO2/AlOx/GeOx/Ge stacked structures. Comprehensive study by means of physical and electrical characterizations revealed distinct impacts of AlOx interlayers, plasma oxidation, and metal electrodes serving as capping layers on EOT scaling, improved interface quality, and thermal stability of the stacks. Aggressive EOT scaling down to 0.56 nm and very low interface state density of 2.4 x 10(11) cm(-2) eV(-1) with a sub-nm EOT and sufficient thermal stability were achieved by systematic process optimization. (C) 2015 AIP Publishing LLC.

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  • Cathodoluminescence study of radiative interface defects in thermally grown SiO2/4H-SiC(0001) structures

    Yuta Fukushima, Atthawut Chanthaphan, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    APPLIED PHYSICS LETTERS   106 ( 26 )  2015.06  [Refereed]

    　View Summary

    Radiative defects in thermally grown SiO2/4H-SiC(0001) structures and their location in depth were investigated by means of cathodoluminescence spectroscopy. It was found that while luminescence peaks ascribed to oxygen vacancy and nonbridging oxygen hole centers were observed both from thermal oxides grown on (0001) Si-face and C-face surfaces as with thermal oxides on Si, intense yellow luminescence at a wavelength of around 600 nm was identified only from the oxide interface on the Si-face substrate regardless of the oxide thickness and dopant type. Possible physical origins of the radiative centers localized near an oxide interface of a few nm thick are discussed on the basis of visible light emission from Si backbone structures. (C) 2015 AIP Publishing LLC.

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    6
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  • Two dimensional x-ray phase imaging using single grating interferometer with embedded x-ray targets

    Naoki Morimoto, Sho Fujino, Amane Yamazaki, Yasuhiro Ito, Takuji Hosoi, Heiji Watanabe, Takayoshi Shimura

    OPTICS EXPRESS   23 ( 13 ) 16582 - 16588  2015.06  [Refereed]

    　View Summary

    Using multidot metal targets embedded in a diamond substrate, we created a single-grating Talbot-Lau interferometer and used it to capture two dimensional (2D) x-ray phase images. The ensemble of these targets constitutes a tiny virtual array of x-ray source and enables x-ray phase-contrast imaging with no source or absorption grating within a 1 m source-detector distance for 8 keV x-rays. We directly resolved a dot-pattern self-image of the phase grating with 6 mu m pitch by using an x-ray image detector with 24 mu m pixels and obtained 2D differential-phase and dark-field images from a single-exposure. Using the 2D differential-phase images, we also obtained a phase image with no streak artifacts. (C) 2015 Optical Society of America

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  • Schottky barrier height modulation at NiGe/Ge interface by phosphorous ion implantation and its application to Ge-based CMOS devices

    T. Hosoi, H. Oka, Y. Minoura, T. Shimura, H. Watanabe

    The 15th International Workshop on Junction Technology (IWJT2015)    2015.06  [Refereed]

  • 小型タルボ・ロー干渉計によるX線位相イメージング -埋め込みターゲットによる微細Ｘ線光源の適用-

    志村 考功

    検査技術   20 ( 2 ) 56 - 60  2015.02  [Refereed]

    CiNii

  • Selective detection and recovery of gold at tannin-immobilized non-conducting electrode

    Khaleda Banu, Takayoshi Shimura, Saman Sadeghi

    ANALYTICA CHIMICA ACTA   853   207 - 213  2015.01  [Refereed]

    　View Summary

    A tannin-immobilized glassy carbon electrode (TIGC) was prepared via electrochemical oxidation of the naturally occurring polyphenolic mimosa tannin, which generated a non-conducting polymeric film (NCPF) on the electrode surface. The fouling of the electrode surface by the electropolymerized film was evaluated by monitoring the electrode response of ferricyanide ions as a redox marker. The NCPF was permselective to HAuCl4, and the electrochemical reduction of HAuCl4 to metallic gold at the TIGC electrode was evaluated by recording the reduction current during cyclic voltammetry measurement. In the mixed electrolyte containing HAuCl4 along with FeCl3 and/or CuCl2, the NCPF remained selective toward the electrochemical reduction of HAuCl4 into the metallic state. The chemical reduction of HAuCl4 into metallic gold was also observed when the NCPF was inserted into an acidic gold solution overnight. The adsorption capacity of Au(III) on tannin-immobilized carbon fiber was 29 +/- 1.45 mg g(-1) at 60 degrees C. In the presence of excess Cu(II) and Fe(III), tannin-immobilized NCPF proved to be an excellent candidate for the selective detection and recovery of gold through both electrochemical and chemical processes. (C) 2014 Elsevier B.V. All rights reserved.

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    14
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  • Understanding of Bias-Temperature Instability due to Mobile Ions in SiC Metal-Oxide-Semiconductor Devices

    A. Chanthaphan, Y. Nakano, T. Nakamura, T. Hosoi, T. Shimura, H. Watanabe

    応用物理学会 薄膜・表面物理分科会/シリコンテクノロジー分科会共催特別研究会アブストラクト集「ゲートスタック研究会 ―材料・プロセス・評価の物理―」（第20回研究会）    2015.01  [Refereed]

  • Fabrication of high-quality Ge-on-insulator structures by lateral liquid phase epitaxy

    T. Shimura, Y. Suzuki, M. Matsue, K. Kajimura, K. Tominaga, T. Amamoto, T. Hosoi, H. Watanabe

    ECS Transactions   69 ( 5 ) 305 - 311  2015  [Refereed]  [Invited]

    　View Summary

    Back-gate Ge-on-insulator metal-oxide-semiconductor field-effect transistors were fabricated using Ge wires grown by lateral liquid phase epitaxy. They exhibited a very high peak hole mobility of 511 cm2/Vs and an on/off current ratio of 106 due to the superior crystalline quality of the Ge wires. The optical properties of the Ge wires were also investigated by micro-photoluminescence spectroscopy, and a direct band gap shrinkage of 45 meV was observed due to the introduction of 0.4% tensile strain.

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    1
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  • Photoluminescence Study of Band Gap Modulation of GeSn Wires Fabricated by Lateral Liquid-Phase Epitaxy

    T. Amamoto, K. Tominaga, K. Kajimura, M. Matsue, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of the 20th Workshop on Gate Stack Technology and Physics    2015.01  [Refereed]

  • Detection of structural defects in thermally-grown SiO2/SiC by cathodoluminescence

       2014.11  [Refereed]

  • Relationship between oxidizing species and oxide growth rate in thermal oxidation on 4H-SiC(0001)

       2014.11  [Refereed]

  • Mobility characterization of Ge-on-insulator metal-oxide-semiconductor field-effect transistors with striped Ge channels fabricated by lateral liquid-phase epitaxy

    Takuji Hosoi, Yuichiro Suzuki, Takayoshi Shimura, Heiji Watanabe

    APPLIED PHYSICS LETTERS   105 ( 17 ) 173502-1 - 173502-4  2014.10  [Refereed]

    　View Summary

    High-mobility metal-oxide-semiconductor field-effect transistors (MOSFETs) consisting of stripe-shaped local germanium-on-insulator (GOI) structures were fabricated by lateral liquid-phase epitaxy (LLPE). The effective hole mobility of back-gate LLPE-grown GOI MOSFETs was accurately and reliably evaluated with a split capacitance-voltage (C-V) method. The superior effective hole mobility of the GOI devices throughout a wide range of accumulated carrier densities over that for a reference silicon-on-insulator device was demonstrated. A very high peak hole mobility of 511 cm(2)/Vs and an on/off current ratio of 10(6), together with phonon scattering limited carrier mobility at high temperatures, indicated not only the excellent crystalline quality of LLPE-grown GOI but also surprisingly good interface quality between Ge and the buried oxide. (C) 2014 AIP Publishing LLC.

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  • Synchrotron radiation photoemission spectroscopy study of SiO2/4H-SiC(0001) interfaces with NO annealing

    T. Hosoi, Y. Nanen, T. Kimoto, A. Yoshigoe, Y. Teraoka, T. Shimura, H. Watanabe

    10th European Conference on Silicon Carbide & Related Materials (ECSCRM-2014)    2014.09  [Refereed]

  • Understanding and engineering of NiGe/Ge junction formed by phosphorous ion implantation after germanidation

    Hiroshi Oka, Yuya Minoura, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    APPLIED PHYSICS LETTERS   105 ( 6 ) 062107-1 - 062107-4  2014.08  [Refereed]

    　View Summary

    Modulation of the effective electron Schottky barrier height (eSBH) of NiGe/Ge contacts induced by phosphorous ion implantation after germanide formation was investigated by considering local inhomogeneity in the eSBH. Systematic studies of NiGe/Ge contact devices having various germanide thicknesses and ion implantation areas indicated the threshold dopant concentration at the NiGe/Ge interface required for eSBH modulation and negligible dopant diffusion even at NiGe/Ge interface during drive-in annealing, leading to variation in the eSBH between the bottom and sidewall portions of the NiGe regions. Consequently, this method makes it possible to design source/drain contacts with low-resistivity Ohmic and ideal rectifying characteristics for future Ge-based transistors. (C) 2014 AIP Publishing LLC.

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    5
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  • X-ray Phase Contrast Imaging with a Single Grating Talbot-Lau Interferometer

    N. Morimoto, S. Fujino, K. Ohshima, J. Harada, T. Hosoi, H. Watanabe, T. Shimura

    International Union of Materials Research Societies- The 15th IUMRS International Conference in Asia 2014（IUMRS-ICA 2014)    2014.08  [Refereed]

  • X-ray phase contrast imaging by compact Talbot-Lau interferometer with a single transmission grating

    Naoki Morimoto, Sho Fujino, Ken-ichi Ohshima, Jimpei Harada, Takuji Hosoi, Heiji Watanabe, Takayoshi Shimura

    OPTICS LETTERS   39 ( 15 ) 4297 - 4300  2014.07  [Refereed]

    　View Summary

    We performed x-ray phase contrast imaging (XPCI) by Talbot-Lau interferometer using only a single transmission grating. Multiline metal targets embedded in a diamond substrate were irradiated with electrons to generate an array of x-ray lines of 1 mu m width, which allowed XPCI within a 1 m source-detector distance in a configuration without a source or absorption grating. We directly resolved the self-image of the phase grating of 3 mu m pitch using an x-ray image detector of 24 mu m pixel size and successfully obtained absorption, differential phase, and dark-field images for 8 keV x rays. (C) 2014 Optical Society of America

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  • Schottky Barrier Height Reduction of NiGe/Ge Junction by P Ion Implantation for Metal Source/Drain Ge CMOS Devices

    Hiroshi Oka, Yuya Minoura, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    2014 IEEE INTERNATIONAL MEETING FOR FUTURE OF ELECTRON DEVICES, KANSAI (IMFEDK)    2014.06  [Refereed]

    　View Summary

    We have demonstrated effective electron Schottky barrier height (eSBH) reduction of NiGe/Ge contacts using phosphorus ion implantation after germanidation. The eSBH was drastically reduced from 0.62 eV to 0.09 eV under optimum implantation and subsequent annealing conditions. Moreover, systematic studies of NiGe/Ge contacts with various P ion profiles indicated the variation in the eSBH at NiGe/Ge interface. This method allows us to design and control junction characteristics for future Ge-based devices.

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    1
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  • Sub-1-nm EOT Schottky Source/Drain Germanium CMOS Technology with Low-temperature Self-aligned NiGe/Ge Junctions

    Takuji Hosoi, Yuya Minoura, Ryohei Asahara, Hiroshi Oka, Takayoshi Shimura, Heiji Watanabe

    2014 IEEE SILICON NANOELECTRONICS WORKSHOP (SNW)    2014.06  [Refereed]

    　View Summary

    Schottky source/drain Ge-based n- and p-MOSFETs with sub-1-nm EOT and significantly reduced parasitic resistance were demonstrated for the first time. This technology involves two key processes: thermally stable high-quality metal/high-k/Ge gate stack and self-aligned formation of Fermi level pinned and unpinned NiGe/Ge junctions. The P+ implantation into embedded NiGe S/D and subsequent low-temperature annealing were effective in reducing effective electron Schottky barrier height (eSBH) at NiGe/Ge interfaces.

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  • 極薄EOT high-k/Geゲートスタックの熱安定性及び界面特性改善に向けたプロセス設計

    淺原 亮平, 細井 卓治, 志村 考功, 渡部 平司

    電子情報通信学会 シリコン材料・デバイス(SDM)研究会, 信学技報   114 ( 88 ) 1 - 5  2014.06  [Refereed]

  • Improved bias-temperature instability characteristics in SiC metal-oxide-semiconductor devices with aluminum oxynitride dielectrics

    Atthawut Chanthaphan, Takuji Hosoi, Yuki Nakano, Takashi Nakamura, Takayoshi Shimura, Heiji Watanabe

    APPLIED PHYSICS LETTERS   104 ( 12 ) 122105-1 - 122105-5  2014.03  [Refereed]

    　View Summary

    Significant improvement of bias-temperature instability characteristics in SiC-based metal-oxide-semiconductor (MOS) devices was demonstrated with high-permittivity aluminum oxynitride (AlON) dielectrics deposited on thin thermal oxides. AlON/SiO2 stacked dielectrics were found to be beneficial not only for reducing gate leakage current but also for suppressing diffusion of positively charged ions, leading to stable SiC-MOS characteristics even under strong electric fields and high temperatures. Unlike the prompt electric-field-induced ion migration in thermally grown and sputter-deposited SiO2 dielectrics, the ion drift for the stacked gate dielectrics was confined within the thin SiO2 underlayers owing to low ion diffusivity in AlON layers. Impacts of mobile ions on interface properties of SiC-MOS devices and effects of intentional ion trapping within the AlON layers were also systematically investigated. (C) 2014 AIP Publishing LLC.

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    19
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  • Development of Multiline Embedded X-ray Targets for Compact Talbot-Lau X-ray Interferometer

    N. Morimoto, S. Fujino, K. Ohshima, J. Harada, T. Hosoi, H. Watanabe, T. Shimura

    Program & Abstracts of International Workshop on Atomically Controlled Fabrication Technology    2014.02  [Refereed]

  • Bias-temperature instability of SiC-MOS devices induced by unusual generation of mobile ions in thermal oxides

    A. Chanthaphan, Y. Nakano, T. Nakamura, T. Hosoi, T. Shimura, H. Watanabe

    Program & Abstracts of International Workshop on Atomically Controlled Fabrication Technology    2014.02  [Refereed]

  • Insights into ultraviolet-induced electrical degradation of thermally grown SiO2/4H-SiC(0001) interface

    Daisuke Ikeguchi, Takuji Hosoi, Yuki Nakano, Takashi Nakamura, Takayoshi Shimura, Heiji Watanabe

    APPLIED PHYSICS LETTERS   104 ( 1 ) 012107-1 - 012107-4  2014.01  [Refereed]

    　View Summary

    The harmful impact of ultraviolet (UV) light irradiation on thermally grown SiO2/4H-SiC structures was investigated by means of electrical measurements of metal-oxide-semiconductor (MOS) capacitors. Unlike Si-based MOS devices, significant electrical degradation, such as positive flatband voltage (V-FB) shift and hysteresis in the capacitance-voltage (C-V) curves of SiC-MOS capacitors was induced by UV irradiation with a low-pressure mercury lamp. The interfacial fixed charge density increased with UV-irradiation (22.6 mW/cm(2) for 16 h) to 1.7 x 10(12) cm(-2), which was an order of magnitude larger than that of the as-grown SiO2/SiC interface. A detailed study based on single wavelength solid-state UV lasers revealed that there was a threshold photon energy at around 5 eV and a moderate dependence of UV-induced degradation on temperature. These experimental findings imply that pre-existing inactive defects accumulated at the thermally grown SiO2/SiC interface were transformed to active carrier traps with high-energy UV irradiation through transparent SiO2 layers. (C) 2014 AIP Publishing LLC.

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    15
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  • Strain-induced direct band gap shrinkage in local Ge-on-insulator structures fabricated by lateral liquid-phase epitaxy

    Masahiro Matsue, Yuhsuke Yasutake, Susumu Fukatsu, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    APPLIED PHYSICS LETTERS   104 ( 3 ) 031106-1 - 031106-4  2014.01  [Refereed]

    　View Summary

    Direct band gap shrinkage in Ge-on-insulator (GOI) structures fabricated by lateral liquid-phase epitaxy (LLPE) was investigated by means of micro(mu)-photoluminescence and mu-Raman spectroscopy. The LLPE method, based on the rapid thermal process, was found to be an effective and feasible way to produce highly strained local GOI structures. We observed a significant redshift of direct gap emission amounting to 45meV from the tensile-strained GOI layer. Strain analysis and temperature dependent PL spectra indicated that a direct band gap shrinkage was mainly due to a tensile strain of about 0.4% induced by rapid crystallization from the Ge melting point during the LLPE process. The local optical properties along the LLPE-grown GOI wire were examined and discussed on the basis of mu-PL mapping images. (C) 2014 AIP Publishing LLC.

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    20
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  • X-ray phase contrast imaging by compact Talbot-Lau interferometer without absorption grating

    N. Morimoto, S. Fujino, K. Ohshima, J. Harada, T. Hosoi, H. Watanabe, T. Shimura

    International Workshop on X-ray and Neutron Phase Imaging with Gratings (XNPIG2014)    2014.01  [Refereed]

  • Ohmic Contact Formation on n-Ge by P Ion Implantation into NiGe/Ge Junction

    H. Oka, Y. Minoura, T. Hosoi, J. Matsugaki, S. Kuroki, T. Shimura, H. Watanabe

    Extended Abstracts of the 19th Workshop on Gate Stack Technology and Physics    2014.01  [Refereed]

  • High-k/Ge Gate Stack with an Extremely Thin-EOT by Controlling Interface Reaction Using Ultrathin AlOx Interlayer

    R. Tanaka, I. Hideshima, Y. Minoura, A. Yoshigoe, Y. Teraoka, T. Hosoi, T. Shimura, H. Watanebe

    Extended Abstracts of the 19th Workshop on Gate Stack Technology and Physics    2014.01  [Refereed]

  • Compact X-ray Talbot-Lau interferometer with multiline embedded X-ray targets

    N. Morimoto, S. Fujino, T. Nagatomi, K. Ohshima, J. Harada, K. Omote, N. Osaka, T. Hosoi, T. Shimura, H. Watanabe

    Program of International Workshop on X-ray and Neutron Phase Imaging with Gratings    2014.01  [Refereed]

  • Interface engineering SiC-MOS devices using HfO2 interfacial layer

       2013.12  [Refereed]

  • Improved BTI characteristics of SiC MOS devices by using AlON/thermal SiO2 dielectrics

       2013.12  [Refereed]

  • Enhanced direct bandgap photoluminescence from local Ge-on-insulator structures fabricated by lateral liquid-phase epitaxy –Material and strain engineering toward CMOS compatible group-Ⅳ photonics-

    M. Matsue, Y. Yasutake, S. Fukatsu, T. Hosoi, T. Shimura, H. Watanabe

    Abstracts, 44th IEEE Semiconductor Interface Specialists Conference    2013.12  [Refereed]

  • Electrical and physical properties of SiO2 gate dielectrics grown on 4H-SiC (Invited)

    T. Hosoi, Y. Uenishi, A. Chanthaphan, D. Ikeguchi, Y. Nakano, T. Nakamura, T. Shimura, H. Watanabe

    The 8th international conference on advanced materials upon the proven concept and continues the tradition of its seven predecessors (THERMEC2013)    2013.12  [Refereed]  [Invited]

  • Phosphorous ion implantation into NiGe layer for Ohmic contact formation on n-type Ge

    Yuya Minoura, Hiroshi Oka, Takuji Hosoi, Jin Matsugaki, Shin-Ichiro Kuroki, Takayoshi Shimura, Heiji Watanabe

    JAPANESE JOURNAL OF APPLIED PHYSICS   53 ( 8 ) 55 - 59  2013.11  [Refereed]

    　View Summary

    Low-resistivity Ohmic contacts on n-type germanium (Ge) together with ideal rectifying characteristics for p-type Ge were achieved using phosphorous-ion-implanted nickel germanide (NiGe). A pre-germanidation process prior to ion implantation was employed, and subsequent drive-in annealing at low temperature was used to precisely control the phosphorous profile and optimize the process conditions. Very low contact resistance on n-type Ge was demonstrated by using low-temperature drive-in annealing at 300 degrees C. Further process optimization (ion dose of 2 x 10(15)cm(-2); drive-in annealing at 400 degrees C for 30 min) resulted in an effective electron Schottky barrier height as low as 0.09 eV for n-type Ge and an on/off current ratio of five orders of magnitude for p-type Ge. The proposed low-temperature contact formation process offers a significant advantage in source/drain contact formation for Ge-based high mobility n-channel transistors. (C) 2014 The Japan Society of Applied Physics

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  • Effective Hole Mobility of GOI MOSFET Fabricated by Lateral Liquid-Phase Epitaxiay

    T. Hosoi, Y. Suzuki, H. Nishikawa, M. Matsue, T. Shimura, H. Watanabe

    Extended Abstracts of 2013 International Workshop on Dielectric Thin Films for Future Electron Devices: Science and Technology (IWDTF2013)    2013.11  [Refereed]

  • Degradation of SiO2/SiC interface properties due to mobile ions intrinsically generated by high-temperature hydrogen annealing

    Atthawut Chanthaphan, Takuji Hosoi, Yuki Nakano, Takashi Nakamura, Takayoshi Shimura, Heiji Watanabe

    SILICON CARBIDE AND RELATED MATERIALS 2013, PTS 1 AND 2   778-780   541 - +  2013.10  [Refereed]

    　View Summary

    The impact of mobile ions intrinsically generated in thermally gown SiO2 by high-temperature forming gas annealing (FGA) on the SiO2/4H-SiC interface properties was studied by means of electrical characterization of SiC metal-oxide-semiconductor (MOS) capacitors. Unlike Si devices, mobile ions located at the interfaces were found to cause a remarkable stretch-out of capacitance-voltage (C-V) curve near the accumulation condition, and the degree of stretch-out was more pronounced with increasing probe frequency. This suggests that the interface states with a long emission time constant are formed near the conduction band edge due to the mobile ions. To clarify this unusual phenomenon, several characterization techniques to evaluate interface state densities (D-it), including Terman, conductance, and C-psi(s) methods, were employed. The D-it values estimated for SiO2/SiC interfaces with mobile ions were a few times as large as those without mobile ions.

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  • Retarded Oxide Growth on 4H-SiC(0001) Substrates due to Sacrificial Oxidation

    Takuji Hosoi, Yusuke Uenishi, Yuki Nakano, Takashi Nakamura, Takayoshi Shimura, Heiji Watanabe

    SILICON CARBIDE AND RELATED MATERIALS 2013, PTS 1 AND 2   778-780   562 - +  2013.10  [Refereed]

    　View Summary

    The impact of a sacrificial oxidation treatment on subsequent gate oxide formation on 4H-SiC(0001) substrates was investigated. Although x-ray photoelectron spectroscopy (XPS) analysis revealed that the SiC surface after removing a 40-nm-thick sacrificial oxide by diluted HF solution was almost identical to that of an as-grown epilayer, the subsequent dry O-2 oxidation resulted in a thinner SiO2 layer for the sample with the sacrificial oxidation in the ultrathin film regime (similar to 3 nm). The metal-oxide-semiconductor (MOS) capacitor with sacrificial oxidation also exhibited a larger frequency dispersion in capacitance-voltage (C-V) characteristics, indicating that interface property had been degraded. However, when the oxide thickness reached about 10 nm, there was no difference in frequency dispersion with and without sacrificial oxidation. This means that the SiO2 growth in the initial stage of oxidation was significantly affected by the sacrificial oxidation treatment.

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  • Suppression of Mobile Ion Diffusion with AlON/SiO2 Stacked Gate Dielectrics for Improving Bias-Temperature Instability in SiC-MOS Devices

    A. Chanthaphan, T. Hosoi, Y. Nakano, T. Nakamura, T. Shimura, H. Watanabe

    International Conference on Silicon Carbide and Related Materials 2013 (ICSCRM2013)    2013.10  [Refereed]

  • Design and control of Ge-based metal-oxide-semiconductor interfaces for high-mobility field-effect transistors with ultrathin oxynitride gate dielectrics

    Yuya Minoura, Atsushi Kasuya, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    APPLIED PHYSICS LETTERS   103 ( 3 )  2013.07  [Refereed]

    　View Summary

    High-quality Ge-based metal-oxide-semiconductor (MOS) stacks were achieved with ultrathin oxynitride (GeON) gate dielectrics. An in situ process based on plasma nitridation of the base germanium oxide (GeO2) surface and subsequent metal electrode deposition was proven to be effective for suppressing electrical deterioration induced by the reaction at the metal/insulator interface. The electrical properties of the bottom GeON/Ge interface were further improved by both low-temperature oxidation for base GeO2 formation and high-temperature in situ vacuum annealing after plasma nitridation of the base oxide. Based on the optimized in situ gate stack fabrication process, very high inversion carrier mobility (mu(hole): 445cm(2)/Vs, mu(electron): 1114 cm(2)/Vs) was demonstrated for p- and n-channel Ge MOSFETs with Al/GeON/Ge gate stacks at scaled equivalent oxide thickness down to 1.4 nm. (C) 2013 AIP Publishing LLC.

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  • T. Yamamoto, S. Ogawa, T. Hosoi, T. Shimura, and H. Watanabe

    Characterization of, Interface Structure of, Metal Gate, High-k Gate Dielectric

    The 77th Symposium on Semiconductors and Integrated Circuits Technology    2013.07  [Refereed]

  • Implementation of High-k Gate Dielectrics in SiC Power MOSFET (Invited)

    T. Hosoi, S. Azumo, Y. Kashiwagi, S. Hosaka, R. Nakamura, Y. Nakano, H. Asahara, T. Nakamura, T. Kimoto, T. Shimura, H. Watanabe

    IEICE Technical Committee on Silicon Device and Materials (SDM)    2013.06  [Refereed]  [Invited]

  • Unusual Generation and Elimination of Mobile Ions in Thermally Grown Oxides in SiC-MOS Devices (Invited)

    H. Watanabe, A. Chanthaphan, Y. Nakano, T. Nakamura, T. Hosoi, T. Shimura

    IEICE Technical Committee on Silicon Device and Materials (SDM)    2013.06  [Refereed]  [Invited]

  • Germanide Formation in Metal/High-k/Ge Gate Stacks

    T. Hosoi, I. Hideshima, Y. Minoura, R. Tanaka, A. Yoshigoe, Y. Teraoka, T. Shimura, H. Watanabe

    IEICE Technical Committee on Silicon Device and Materials (SDM)   113 ( 87 ) 19 - 23  2013.06  [Refereed]

  • Understanding and controlling bias-temperature instability in SiC metal-oxide-semiconductor devices induced by unusual generation of mobile ions

    Atthawut Chanthaphan, Takuji Hosoi, Yuki Nakano, Takashi Nakamura, Takayoshi Shimura, Heiji Watanabe

    APPLIED PHYSICS LETTERS   102 ( 9 )  2013.03  [Refereed]

    　View Summary

    Unusual behavior of bias-temperature instabilities in SiC metal-oxide-semiconductor (MOS) devices is studied. Electrical measurements of SiC-MOS capacitors are used to investigate details of self-generated mobile ions in thermal oxides on 4H-SiC(0001) substrates, such as their polarity, density, distribution, and impact on interface properties. It is found that positive bias-temperature stress (BTS) accumulates self-generated positive mobile ions at the bottom SiO2/SiC interface with an areal density of several 10(12) cm(-2), and that they induce additional electron trap formation at the interface. Using this knowledge, we demonstrate effective removal of the positive mobile ions with a combination of negative BTS and subsequent etching of the oxide surface. (C) 2013 American Institute of Physics. [http://dx.doi.org/10.1063/1.4794942]

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  • Ge diffusion and bonding state change in metal/high-k/Ge gate stacks and its impact on electrical properties

    Takuji Hosoi, Iori Hideshima, Ryohei Tanaka, Yuya Minoura, Akitaka Yoshigoe, Yuden Teraoka, Takayoshi Shimura, Heiji Watanabe

    MICROELECTRONIC ENGINEERING   109   137 - 141  2013.03  [Refereed]

    　View Summary

    We systematically investigated Ge diffusion and chemical bonding states in metal/high-k/Ge gate stacks by synchrotron radiation photoemission spectroscopy (SR-PES) to understand their impact on electrical properties. Although Hf germanide was found in both Ge 3s and Hf 4f spectra for HfO2/GeOx/Ge gate stacks formed by ultrathin metal Hf deposition and subsequent in situ low-pressure thermal oxidation, such germanide could be fully oxidized when using plasma-assisted oxidation. However, Al electrode deposition on HfO2/GeOx/Ge stacks was found to reduce interfacial GeOx layer, resulting in the formation of Al germanide at the Al/HfO2 interface even at room temperature. No germanide was formed in the stacks with inert Pt electrode. This indicates that the Al layer may promote upward diffusion of GeO molecules through the HfO2 layer. The thermal stability of metal/HfO2/GeOx/Ge gate stacks was also evaluated by in situ SR-PES. Hf germanide was observed to form near the HfO2/GeOx interface probably due to Ge atoms intermixing in the HfO2 layer in the Pt-gate stacks, in contrast to the enhanced formation of Al germanide in Al-gate stacks. Electrical characterization revealed that the formation of metal germanide led to severe degradation of insulating properties in metal/high-k/Ge stacks. (C) 2013 Elsevier B.V. All rights reserved.

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  • Electrical detection of surface plasmon resonance phenomena by a photoelectronic device integrated with gold nanoparticle plasmon antenna

    Tatsuya Hashimoto, Yurie Fukunishi, Bin Zheng, Yukiharu Uraoka, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Applied Physics Letters   102 ( 8 )  2013.02  [Refereed]

    　View Summary

    We have proposed a concept of a photoelectronic hybrid device utilizing gold nanoparticles (GNPs), which are supposed to function not only as the plasmon antenna but also as the sensing part. The photocurrent in the fabricated device, consisting of a transparent Nb-doped TiO2 channel and Au electrodes, was enhanced more than eight times at a specific wavelength with GNP arrays located between the electrodes, indicating that surface plasmon resonance was electrically detected with the hybrid device. This result will open new doors for ultra-small biosensor chips integrated with multi-functional solid-state devices. © 2013 American Institute of Physics.

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  • Hard x-ray phase contrast imaging using a tabletop Talbot-Lau interferometer with multiline embedded x-ray targets

    Takayoshi Shimura, Naoki Morimoto, Sho Fujino, Takaharu Nagatomi, Keni-Chi Oshima, Jimpei Harada, Kazuhiko Omote, Naohisa Osaka, Takuji Hosoi, Heiji Watanabe

    Optics Letters   38 ( 2 ) 157 - 159  2013.01  [Refereed]

    　View Summary

    We demonstrate hard x-ray phase contrast imaging (XPCI) using a tabletop Talbot-Lau interferometer in which the x-ray source and source grating are replaced with an x-ray source with multiline metal targets embedded in a diamond substrate. This source realizes an array of linear x-ray sources of a few micrometers width without fabrication difficulty because of the shallow penetration depth of electrons irradiated to the metal targets. This enhances the coherence of x rays from each linear source and allows XPCI within 45 cm source-detector distance under 1.2W input power for 8 keV x rays. © 2013 Optical Society of America.

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  • Dielectric properties of thermally grown SiO2 on 4H-SiC(0001) substrates

    Takuji Hosoi, Yusuke Uenishi, Shuhei Mitani, Yuki Nakano, Takashi Nakamura, Takayoshi Shimura, Heiji Watanabe

    Materials Science Forum   740-742   605 - 608  2013  [Refereed]

    　View Summary

    The bulk properties of thermally grown SiO2 on 4H-SiC(0001) substrates were thoroughly investigated by capacitance-voltage (C-V) measurement, atomic force microscopy (AFM), spectroscopic ellipsometry (SE), x-ray photoelectron spectroscopy (XPS), and secondary ion mass spectrometry (SIMS). The equivalent oxide thickness (EOT) extracted from the capacitance-voltage (C-V) characteristics of TiN/SiO2 capacitors was proportional to the physical thickness (Tphys), but the slope of the linear fit was found to be 1.11, indicating that the permittivity of SiO2 on 4H-SiC formed by thermal oxidation is only about 3.5, which is lower than the commonly accepted value of 3.9. Since XPS analysis revealed that the oxide of SiC was stoichiometric and the atomic concentration of residual carbons in the oxide measured by SIMS was sufficiently low (1017 cm-3), the low permittivity of thermal oxides of 4H-SiC may originate from the reduced bulk density, which can be predicted by the Clausius-Mossotti relation. © (2013) Trans Tech Publications, Switzerland.

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    5
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  • AlONゲート絶縁膜導入によるSiCパワーMOSFETの高性能化及び信頼性向上

    細井 卓治, 東雲 秀司, 柏木 勇作, 保坂 重敏, 中村 亮太, 箕谷 周平, 中野 佑紀, 浅原 浩和, 中村 孝, 木本 恒暢, 志村 考功, 渡部 平司

    電子情報通信学会 シリコン材料・デバイス研究会（SDM）    2013.01  [Refereed]  [Invited]

  • Unusual Generation and Elimination of Mobile Ions in Thermally Grown SiO2 on 4H-SiC(0001)

    A. Chanthaphan, S. Mitani, Y. Nakano, T. Nakamura, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of the 18th Workshop on Gate Stack Technology and Physics    2013.01  [Refereed]

  • Gate Stack Technology for High Performance Ge MOSFETs with Ultrathin GeON Gate Dielectrics

    Y. Minoura, A. Kasuya, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of the 18th Workshop on Gate Stack Technology and Physics    2013.01

  • Evaluation of the Carrier Mobility of Ge-on-Insulator MOSFET Formed by Lateral Liquid-Phase Epitaxy

    M. Matsue, Y. Suzuki, H. Nishikawa, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of the 18th Workshop on Gate Stack Technology and Physics    2013.01  [Refereed]

  • Gate stack technology for advanced high-mobility Ge-channel metal-oxide-semiconductor devices - Fundamental aspects of germanium oxides and application of plasma nitridation technique for fabrication of scalable oxynitride dielectrics

    Heiji Watanabe, Katsuhiro Kutsuki, Atsushi Kasuya, Iori Hideshima, Gaku Okamoto, Shoichiro Saito, Tomoya Ono, Takuji Hosoi, Takayoshi Shimura

    CURRENT APPLIED PHYSICS   12   S10 - S19  2012.12  [Refereed]

    　View Summary

    Germanium (Ge)-based high-mobility metal-oxide-semiconductor field-effect transistors (MOSFETs) have gained considerable attention because they perform better than common Si-based devices. Although degraded electrical property of germanium oxide (GeO2) gate insulators is considered the most serious obstacle for implementing Ge-channel for future MOSFETs, remarkable progress has been made recently. This article overviews both fundamental and technological aspects of thermally grown GeO2, and discusses strategies for achieving ultrathin gate insulators for high-performance Ge-based MOSFETs. Our experimental and theoretical studies revealed that, despite excellent electrical property of GeO2/Ge interface, its poor stability is a big concern, especially for ultrathin dielectrics. To overcome this problem, we investigated the impact of plasma nitridation of Ge and GeO2 surfaces, in terms of surface cleaning, stability, and electrical properties of the nitrides. On the basis of the experimental findings, we have proposed high-quality Ge oxynitride (GeON) gate dielectrics, which consist of stable nitrogen-rich capping layers on ultrathin oxides. We implemented the GeON gate dielectrics into Ge-channel pMOSFETs and successfully demonstrated hole mobility that was 2.4 times higher than Si universal mobility. (c) 2012 Elsevier B.V. All rights reserved.

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    11
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  • Effective work function control of metal inserted poly-Si electrodes on HfSiO dielectrics by in-situ oxygen treatment of metal surface

    Naomu Kitano, Keisuke Chikaraishi, Hiroaki Arimura, Takuji Hosoi, Takayoshi Shimura, Takashi Nakagawa, Heiji Watanabe

    CURRENT APPLIED PHYSICS   12   S83 - S86  2012.12  [Refereed]

    　View Summary

    We fabricated novel poly-Si/TiN/HfSiO/SiO2 gate stacks by using an in-situ oxygen treatment process of a TiN electrode surface in order to suppress Si diffusion from poly-Si upper layer during post deposition annealing (PDA). The Si depth profile after PDA showed that no Si diffused into oxidized stacks due to the formation of TiON layers as a Si diffusion barrier. Furthermore, a high effective work function (EWF) of 4.94 eV was obtained from the oxidized stack even after PDA at 1000 degrees C. This high EWF is due not only to Si diffusion barrier formation but also to oxygen vacancy compensation by diffused-oxygen from the TiON layer. However, we observed significant growth of interfacial SiO2 after high temperature annealing. These results indicate a trade-off relationship between EWF control and equivalent oxide thickness (EOT) scaling, and imply that an additional method for EWF modulation is required for scaled high-k devices. (c) 2012 Elsevier B.V. All rights reserved.

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  • Relationship between interface property and energy band alignment of thermally grown SiO2 on 4H-SiC(0001)

    Takuji Hosoi, Takashi Kirino, Shuhei Mitani, Yuki Nakano, Takashi Nakamura, Takayoshi Shimura, Heiji Watanabe

    CURRENT APPLIED PHYSICS   12   S79 - S82  2012.12  [Refereed]

    　View Summary

    Conduction band offset (Delta E-c) at SiO2/4H-SiC(0001) interface formed by thermal oxidation in dry oxygen ambient and its modulation due to post-oxidation annealing (POA) in Ar ambient were investigated by x-ray photoelectron spectroscopy (XPS) and by electrical characterization. Valence band spectra and O 1s energy loss spectra taken from SiO2/SiC structures revealed that the Delta E-c reduces with increasing POA temperature while no change in SiO2 band gap. Capacitance-voltage (C-V) characteristics for metal-oxide-semiconductor (MOS) capacitors with as-oxidized SiO2 gate dielectrics exhibited positive flatband voltage (V-FB) shift of about 2 V, hysteresis of about 1 V, and large amount of interface states (D-it) of the order of 10(12) cm(-2) eV(-1). High-temperature POA can improve the electrical property of SiO2/SiC capacitors, but at the same time a reduction of Delta E-c is found in Fowler-Nordheim plots of current-voltage characteristics, which agrees with XPS analysis. V-FB values plotted against oxide thicknesses exhibited a linear relationship with the positive slope for both as-oxidized and 1100 degrees C annealed samples, indicating that negative fixed charges (Q(it)) exist at the SiO2/SiC interfaces. The areal densities of Q(it) are estimated from the slopes are 1.0 x 10(12) and 1.6 x 10(11) cm(-2) for as-oxidized and 1100 degrees C annealed samples, respectively. These results suggest that the conduction band offset at thermally grown SiO2/SiC interface is extrinsically increased by large amount of interface charges. (c) 2012 Elsevier B.V. All rights reserved.

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    23
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  • Performance and Reliability Improvement in SiC Power MOSFETs by Implementing AlON High-k Gate Dielectrics

    Takuji Hosoi, Shuji Azumo, Yusaku Kashiwagi, Shigetoshi Hosaka, Ryota Nakamura, Shuhei Mitani, Yuki Nakano, Hirokazu Asahara, Takashi Nakamura, Tsunenobu Kimoto, Takayoshi Shimura, Heiji Watanabe

    2012 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM)    2012.12  [Refereed]

    　View Summary

    We have developed AlON high-k gate dielectric technology that can be easily implemented into both planar and trench SiC-based MOSFETs. On the basis of electrical characterization and numerical simulation, the thickness ratio of the AlON layer to the SiO2 interlayer and nitrogen content in AlON film were carefully optimized to enhance device performance and reliability.

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    28
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  • Improvement of Ultrathin GeON/Ge Interface Properties for High-mobility Ge MOSFETs

    I. Hideshima, Y. Minoura, A. Kasuya, T. Hosoi, T. Shimura, H. Watanabe

    8th Handai Nanoscience and nanotechnology International Symposium    2012.12  [Refereed]

  • Mobile Ions Generated in Thermal SiO2 on SiC by Hydrogen Passivation and Its Impact on Interface Property

    T. Hosoi, A. Chanthaphan, S. Mitani, Y. Nakano, T. Nakamura, T. Shimura, H. Watanabe

    The 43rd IEEE Semiconductor Interface Specialists Conference    2012.12  [Refereed]

  • Implementation of GeON Gate Dielectrics for Dual-Channel Ge CMOS Technology

    Y. Minoura, A. Kasuya, T. Hosoi, T. Shimura, H. Watanabe

    The 43rd IEEE Semiconductor Interface Specialists Conference    2012.12  [Refereed]

  • Al-inserted TiN Gate Electrodes with Low-Pressure Oxidation for Effective Work Function Control of Gate-First Poly-Si/TiN/HfSiO Stacks

    K. Chikaraishi, T. Minami, N. Kitano, T. Seino, N. Yamaguchi, T. Nakagawa, T. Hosoi, T. Shimura, H. Watanabe

    The 43rd IEEE Semiconductor Interface Specialists Conference    2012.12  [Refereed]

  • Synchrotron X-ray topography of supercritical-thickness strained silicon-on-insulator wafers for crystalline quality evaluation and electrical characterization using back-gate transistors

    T. Shimura, D. Shimokawa, T. Matsumiya, N. Morimoto, A. Ogura, S. Iida, T. Hosoi, H. Watanabe

    CURRENT APPLIED PHYSICS   12   S69 - S74  2012.12  [Refereed]

    　View Summary

    We investigated the crystalline quality of supercritical-thickness strained silicon-on-insulator (SC-sSOI) wafers by synchrotron X-ray topography and its correlation with electrical characteristics by use of back-gate transistors. Several types of contrast showing crystalline imperfections were observed over the entirety of the wafers, such as macule and crosshatch patterns in X-ray topographs. From the analysis of a series of X-ray topographs obtained by changing the angle of incidence relative to the sample surface, we obtained two-dimensional distributions of lattice inclination and strain, indicating that the crosshatch patterns observed in the X-ray topographs were caused by fluctuation of the lattice inclination. Transistors located in an area of large lattice inclination deviated from the average drain current-gate voltage curves, showing a correlation between lattice inclination and electrical properties. (c) 2012 Elsevier B.V. All rights reserved.

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    7
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  • High-mobility p-channel metal-oxide-semiconductor field-effect transistors on Ge-on-insulator structures formed by lateral liquid-phase epitaxy

    Yuichiro Suzuki, Shimpei Ogiwara, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    APPLIED PHYSICS LETTERS   101 ( 20 )  2012.11  [Refereed]

    　View Summary

    NHigh-mobility p-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) were fabricated on germanium-on-insulator (GOI) structures formed by lateral liquid-phase epitaxy (LLPE) from the Si seed areas. It was found that appropriate rapid annealing conditions for LLPE effectively suppress intermixing at the Si seed regions and produce tensile strained single-crystalline Ge layers surrounded by SiO2 microcrucibles. We examined the electrical properties of the thin Ge layers using GOI MOSFETs with back-gate control in the p-type accumulation mode. Excellent transistor performance, such as a low off-leakage current of 1 X 10(-7) mu A/mu m, a high on/off current ratio of 10(6), and high low-field hole mobility of 480 cm(2)/Vs, which is 2.8 times higher than that of the reference silicon-on-insulator device, was demonstrated, indicating that the LLPE method provides high-quality local GOI structures and that it is a feasible way to fabricate the next-generation Ge-based devices. (C) 2012 American Institute of Physics. [http://dx.doi.org/10.1063/1.4766917]

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    17
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  • Fabrication of Ge-on-insulator structure by lateral liquid-phase epitaxy and its electrical characterization using back-gate transistors

    T. Shimura, Y. Suzuki, S. Ogiwara, T. Hosoi, H. Watanabe

    The 6th International Symposium on Advanced Science and Technology of Silicon Materials    2012.11  [Refereed]

  • Mechanism of UV-induced defect generation in thermally grown SiO2/SiC structures

       2012.11  [Refereed]

  • Investigation of relative permittivity of thermal oxides on 4H-SiC

       2012.11  [Refereed]

  • Elimination of mobile ions in thermal oxide grown on 4H-SiC by utilizing bias-temperature stress

       2012.11  [Refereed]

  • Fabricatrion of High-quality SiGe-on-insulator Structures by Rapid Melt Growth

    S. Ogiwara, C. Yoshimoto, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of Third International Symposium on Atomiscally Controlled Fabrication Technology    2012.11  [Refereed]  [Invited]

  • Interface engineering between metal electrode and GeO2 dielectric for future Ge-based metal-oxide-semiconductor technologies

    Shingo Ogawa, Iori Hideshima, Yuya Minoura, Takashi Yamamoto, Asami Yasui, Hiroaki Miyata, Kosuke Kimura, Toshihiko Ito, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    APPLIED PHYSICS LETTERS   101 ( 20 )  2012.10  [Refereed]

    　View Summary

    Interfacial reactions between a metal-gate electrode and GeO2 dielectric in Ge-based metal-oxide-semiconductor (MOS) devices have been investigated by several analytical techniques, and we have demonstrated a method to suppress the interfacial reactions. Although no reaction occurs at the Au/GeO2 interface, a significant reaction was observed at the Al/GeO2 interface, which leads to increases in the leakage current and defect states in an MOS capacitor. While Al is oxidized at the Al/GeO2 interface, GeO2 is reduced to form Ge-Ge and Ge-Al bonding units during the early stage of the Al deposition. Moreover, the Ge-Al alloy segregates to the Al-electrode surface during the sequent Al deposition. These interfacial reactions are dramatically suppressed by insertion of ultrathin Al2O3 into the Al/GeO2 interface. (C) 2012 American Institute of Physics. [http://dx.doi.org/10.1063/1.4766745]

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    9
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  • Fabrication of High-quality GOI and SGOI Structures by Rapid Melt Growth Method - Novel Platform for High-mobility Transistors and Photonic Devices

    Heiji Watanabe, Yuichiro Suzuki, Shimpei Ogiwara, Nobuaki Kataoka, Tatsuya Hashimoto, Takuji Hosoi, Takayoshi Shimura

    DIELECTRIC MATERIALS AND METALS FOR NANOELECTRONICS AND PHOTONICS 10   50 ( 4 ) 261 - 266  2012.10  [Refereed]  [Invited]

    　View Summary

    High-quality germanium-on-insulator (GOI) and fully relaxed silicon germanium(SiGe)-on-insulator (SGOI) structures have been demonstrated by the rapid melt growth method. We successfully fabricated single-crystalline local GOI structures, that is, Ge wires over 100 mu m long within microcrucibles of a few mu m wide by means of lateral liquid phase epitaxy (lateral LPE). GOI MOSFETs produced by lateral LPE exhibited superior carrier mobility and on/off current ratio to those of conventional SOI devices, indicating excellent electrical properties of Ge-channel and MOS interface formed by LPE. Moreover, dislocation-free fully relaxed SiGe layers on SOI substrates were demonstrated by vertical LPE, in which crystallographic defects were found to be confined within the compositionally graded SiGe interlayer between the epitaxcially grown relaxed SiGe and SOI layers. These novel methods based on the rapid metal growth will open up a new pathway to realize platform for next-generation Ge-based high-mobility transistors and photonic devices.

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    2
    Citation
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  • Germanium Nitride Interface Layer for High-k/Ge Gate Stacks

    T. Hosoi, G. Okamoto, K. Kutsuki, I. Hideshima, A. Yoshigoe, Y. Teraoka, T. Shimura, H. Watanabe

    Extended Abstracts of Fifth International Symposium on Atomically Controlled Fabrication Technology    2012.10  [Refereed]

  • Evaluation of Carrier Mobility in Local GOI Structures Formed by Lateral Liquid-Phase Epitaxy

    Y. Suzuki, S. Ogiwara, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of Fifth International Symposium on Atomically Controlled Fabrication Technology    2012.10  [Refereed]

  • Application of Multiline Embedded X-ray Targets to X-ray Talbot-Lau Interferometer

    N. Morimoto, S. Fujino, T. Nagatomi, K. Ohshima, J. Harada, K. Omote, N. Osaka, T. Hosoi, H. Watanabe, T. Shimura

    Extended Abstracts of Fifth International Symposium on Atomically Controlled Fabrication Technology    2012.10  [Refereed]

  • High-quality Fully Relaxed SiGe Layers Fabricated on Silicon-on-Insulator Wafers by Rapid Melt Growth

    T. Shimura, S. Ogiwara, C. Yoshimoto, T. Hosoi, H. Watanabe

    Extended Abstracts of Fifth International Symposium on Atomically Controlled Fabrication Technology    2012.10  [Refereed]

  • Improvement of Thermal SiO2/4H-SiC Interface by UV Irradiation and Subsequent High Temperature Annealing

    D. Ikeguchi, S. Mitani, Y. Nakano, T. Nakamura, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of Fifth International Symposium on Atomically Controlled Fabrication Technology    2012.10  [Refereed]

  • Process Optimization of GeON/Ge Gate Stacks for High-mobility Ge-based CMOS Devices

    Y. Minoura, A. Kasuya, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of Fifth International Symposium on Atomically Controlled Fabrication Technology    2012.10  [Refereed]

  • Advanced Poly-Si/TiN Gate Electrode for Gate-first Metal/high-k PMOSFET

    K. Chikaraishi, T. Minami, N. Kitano, T. Seino, N. Yamaguchi, T. Nakagawa, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of Fifth International Symposium on Atomically Controlled Fabrication Technology    2012.10  [Refereed]

  • Gate Stack Technology for Next-Generation Green Electronics

    H. Watanabe, T. Shimura, T. Hosoi

    Extended Abstracts of Fifth International Symposium on Atomically Controlled Fabrication Technology    2012.10  [Refereed]

  • Elimination of Mobile Ions in Thermal Oxide of SiC MOS Devices

    A. Chanthaphan, S. Mitani, Y. Nakano, T. Nakamura, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of Fifth International Symposium on Atomically Controlled Fabrication Technology    2012.10  [Refereed]

  • Fabrication and Evaluation of Photoelectronic Devices Integrated with Gold Nanoparticle Plasmon Antenna

    T. Hashimoto, Y. Fukunishi, Z. Bin, Y. Uraoka, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of Fifth International Symposium on Atomically Controlled Fabrication Technology    2012.10  [Refereed]

  • Novel Approach for Improving Interface Quality of 4H-SiC MOS Devices with UV Irradiation and Subsequent Thermal Annealing

    Heiji Watanabe, Daisuke Ikeguchi, Takashi Kirino, Shuhei Mitani, Yuki Nakano, Takashi Nakamura, Takuji Hosoi, Takayoshi Shimura

    SILICON CARBIDE AND RELATED MATERIALS 2012   740-742   741 - +  2012.09  [Refereed]

    　View Summary

    We report on the harmful impact of ultraviolet (UV) light irradiation on thermally grown SiO2/4H-SiC(0001) structures and its use in subsequent thermal annealing for improving electrical properties of SiC-MOS devices. Significant UV-induced damage, such as positive flatband voltage shift and hysteresis in capacitance-voltage curves as well as increased interface state density, was observed for SiC-MOS devices with thermally grown oxides. Interestingly, the subsequent annealing of damaged SiO2/SiC samples resulted in superior electrical properties to those for untreated (fresh) devices. These findings imply that UV irradiation of the SiO2/SiC structure is effective for eliciting pre-existing carbon-related defects and transforming them into a simple configuration that can be easily passivated by thermal treatment.

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    14
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  • Characterization of multicrystalline Si in solar modules by synchrotron white x-ray microbeam diffraction

    T. Shimura, T. Matsumiya, N. Morimoto, S. Fujino, T. Hosoi, K. Kajiwara, J. Chen, T. Sekiguchi, H. Watanabe

    Abstracts of 11th Biennial Conference on High Resolution X-Ray Diffraction and Imaging (XTOP 2012)    2012.09  [Refereed]

  • Effective Work Function Control of MIPS/High-k Gate Stacks by Al-Incorporation and in situ Low-Pressure Oxidation of TiN Surface

    K. Chikaraishi, T. Minami, N. Kitano, T. Seino, N. Yamaguchi, T. Nakagawa, T. Hosoi, T. Shimura, H. Watanabe

    Program and Abstrats of Plenary, Forums, Somiya Award and Special Lecture, IUMRS-ICEM 2012    2012.09  [Refereed]

  • Rapid Melt Growth of Fully Relaxed SiGe Layers with High Ge Concentration on Silicon-on-Insulator Substrates

    T. Shimura, S. Ogiwara, Y. Suzuki, C. Yoshimoto, T. Hosoi, H. Watanabe

    Program and Abstrats of Plenary, Forums, Somiya Award and Special Lecture, IUMRS-ICEM 2012    2012.09  [Refereed]

  • Development of multiline embedded X-ray targets for X-ray phase contrast imaging

    N. Morimoto, S. Fujino, T. Nagatomi, K. Ohshima, J. Harada, K. Omote, N. Osaka, T. Hosoi, H. Watanabe, T. Shimura

    Abstracts of 11th Biennial Conference on High Resolution X-Ray Diffraction and Imaging (XTOP 2012)    2012.09  [Refereed]

  • Synthesis of large-scale transparent gold nanosheets sandwiched between stabilizers at a solid-liquid interface

    Khaleda Banu, Takayoshi Shimura

    NEW JOURNAL OF CHEMISTRY   36 ( 10 ) 2112 - 2120  2012.07  [Refereed]

    　View Summary

    Micrometer-sized gold nanosheets (Au-NSs) were directly deposited on a large-scale at a solid-liquid interface using a modified solid matrix (SM) method. The reducing agent and the stabilizer were in the solid phase, and the oxidizing agent (HAuCl4) with an acetate ion as an additional stabilizer was in the aqueous phase. The deposited Au-NSs had either a definite geometric shape or a highly branched 2D dendritic nanosheet-like (Au-DS) morphology. Au-NSs of definite shape were formed on the solid surface from solutions of pH 4 or less. The formation of Au-DSs were observed in solutions of higher pH (5 to 8.4) because of rapid reactions. The deposited Au-NSs were optically transparent and exhibited preferential growth along the {111} crystal facet. The acetate ion acted as a stabilizer and selectively adsorbed onto the Au{111} crystal facet limiting the growth of the Au-NSs in the {111} direction. Hence, the formed Au-NSs were sandwiched between stabilizers in the solid and liquid phases in the presence of acetate ions in the solution phase. However, in the absence of acetate ions, a rapid reaction generates highly branched 3D gold microcrystals with a dendritic morphology. Nano/microcrystals with a highly branched morphology were deposited on a large scale onto the SM without introducing any template or surfactant into the solution phase. A thiol-based epoxy resin immobilized with natural or synthetic tannin was used as the SM.

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    18
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  • Investigation of unusual mobile ion effects in thermally grown SiO2 on 4H-SiC(0001) at high temperatures

    Atthawut Chanthaphan, Takuji Hosoi, Shuhei Mitani, Yuki Nakano, Takashi Nakamura, Takayoshi Shimura, Heiji Watanabe

    APPLIED PHYSICS LETTERS   100 ( 25 )  2012.06  [Refereed]

    　View Summary

    Generation and elimination of mobile ions in thermally grown SiO2 on 4H-SiC(0001) were systematically investigated by electrical measurements of MOS capacitors. In contrast to a SiO2/Si system, intrinsic positive mobile ions were found to exist in as-oxidized SiO2/SiC structures, leading to significant instability of SiC-MOS devices. Post-oxidation annealing in Ar ambient mostly eliminates the mobile ions, but they are generated again by subsequent high-temperature hydrogen annealing despite the improved interface quality. The density of the mobile ions was estimated to be several 10(12) cm(-2). Possible physical origins of the mobile ions are discussed on the basis of the experimental findings. (C) 2012 American Institute of Physics. [http:// dx. doi. org/ 10.1063/ 1.4729780]

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    49
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  • Gate Stack Technologies for Silicon Carbide Power MOS Devices (Invited)

    T. Hosoi, T. Kirino, Y. Uenishi, D. Ikeguchi, A. Chanthaphan, A. Yoshigoe, Y. Teraoka, S. Mitani, Y. Nakano, T. Nakamura, T. Shimura, H. Watanabe

    2012 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD2012)    2012.06  [Refereed]  [Invited]

  • Oxygen-induced high-k dielectric degradation in TiN/Hf-based high-k gate stacks

    T. Hosoi, Y. Odake, H. Arimura, K. Chikaraishi, N. Kitano, T. Shimura, H. Watanabe

    IEICE Technical Committee on Silicon Device and Materials (SDM)   112 ( 92 ) 43 - 46  2012.06  [Refereed]

    　View Summary

    Effective work function control and equivalent oxide thickness (EOT) scaling are the major concerns for implementing metal/high-k gate stacks with gate-first process. In addition to interfacial SiO_2 growth, it has been reported that metal elements such as Hf and La atoms in high-k layers diffuse into gate electrode after high-temperature activation annealing. In this work, we have investigated the Hf diffusion kinetics in TiN/HfSiO gate stacks. The Hf upward diffusion is found to be independent of interfacial SiO_2 growth, but depends on the amount of oxygen in the gate stacks. It is also revealed that, when the TiN electrode contains a certain amount of oxygen, Hf diffusion into TiN occurs at above 650℃ and leads to high-k degradation.

    CiNii

  • High-mobility Ge MOSFETs with ultrathin GeON gate dielectrics

    Y. Minoura, A. Kasuya, T. Hosoi, T. Shimura, H. Watanabe

    IEICE Technical Committee on Silicon Device and Materials (SDM)    2012.06  [Refereed]

  • Impact of Si duffusion barrier layer formed on TiN surface by in-situ oxygen treatment process for advanced gate-first metal/high-k stacks

    N. Kitano, K.Chikaraishi, H. Arimura, T. Hosoi, T. Shimura, T. Seino, H. Watanabe, T. Nakagawa

    221st ECS Meeting - Seattle, WA   45 ( 3 ) 145 - 149  2012.05  [Refereed]

    　View Summary

    We investigated the formation of Si barrier layer by an in-situ oxygen treatment process of TiN electrode surface before poly-Si deposition. The Si depth profile after post deposition annealing (PDA) showed that no Si diffused into oxidized stacks due to the formation of TiON layers as a Si-diffusion barrier. Moreover, a high effective work function (EWF) of 4.94 eV was obtained from the oxidized stack even after PDA at 1000 degrees C. However, we observed significant growth of interfacial SiO2 after high temperature annealing. These results indicate a trade-off relationship between EWF control and equivalent oxide thickness (EOT) scaling, and imply that an additional method for EWF modulation is required for scaled high-k devices.

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  • Comprehensive Study of the X-Ray Photoelectron Spectroscopy Peak Shift of La-Incorporated Hf Oxide for Gate Dielectrics

    Takashi Yamamoto, Shingo Ogawa, Jun-ichi Tsuji, Koji Kita, Katsunori Tagami, Tsuyoshi Uda, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Jpn. J. Appl. Phys.   51 ( 4 )  2012.04  [Refereed]

    　View Summary

    We measured the X-ray photoelectron spectroscopy spectra of the La-incorporated Hf oxide and observed the apparent Hf 4f peak shift toward a lower energy as La concentration increased. To investigate the origin of these peak shifts, we performed first-principles calculations, in which the degree and direction of the obtained peak shifts agreed well with the above-mentioned experimentally observed spectra. Also, we found that the main reason for these peak shifts was the charge-transfer effect. Estimation of the degree of the interface dipole was made possible by a comparison between the experimental values and the theoretical values of the peak shifts. (c) 2012 The Japan Society of Applied Physics

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  • Insight into Bias-temperature Instability of 4H-SiC MOS Devices with Thermally Grown SiO2 Dielectrics

    Atthawut Chanthaphan, Takashi Kirino, Yusuke Uenishi, Daisuke Ikeguchi, Shuhei Mitani, Yuki Nakano, Takashi Nakamura, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    2012 MRS Spring Meeting    2012.04  [Refereed]

    　View Summary

    2012 MRS Spring Meeting Program and Exhibit Guide, P.138

  • 放射光X 線トポグラフィによる極薄ひずみSi 層の結晶性評価

    志村考功, 細井卓治, 渡部平司

    日本結晶学会誌    2012.03  [Refereed]

  • Oxygen-induced high-k degradation in TiN/HfSiO gate stacks

    Takuji Hosoi, Yuki Odake, Keisuke Chikaraishi, Hiroaki Arimura, Naomu Kitano, Takayoshi Shimura, Heiji Watanabe

    2012 IEEE Silicon Nanoelectronics Workshop, SNW 2012    2012  [Refereed]

    　View Summary

    We have investigated the diffusion kinetics of Hf in TiN/HfSiO gate stacks. The Hf upward diffusion is found to be independent of interfacial SiO 2 growth, but depends on the amount of oxygen in the gate stacks. It is also revealed that Hf diffusion into TiN electrode occurs at above 650°C and leads to high-k degradation. © 2012 IEEE.

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    2
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  • Evaluation of the Electrical Properties of Single-Crystalline Ge-on-Insulator Structures Formed by Lateral Liquid-Phase Epitaxy

    Yuichiro Suzuki, Shimpei Ogiwara, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Extended Abstracts of the 17th Workshop on Gate Stack Technology and Physics    2012.01  [Refereed]

  • Residual Order in the Thermally Oxidized Thin Film on Ge Substrates

    Takayoshi Shimura, Daisuke Shimokawa, Takuya Matsumiya, Takuji Hosoi, Heiji Watanabe

    Extended Abstracts of the 17th Workshop on Gate Stack Technology and Physics    2012.01  [Refereed]

  • Effective Work Function Control of Poly-Si/TiN/HfSiO/SiO2 Gate Stacks by in situ Low-pressure Oxidation of TiN Electrode Surface

    Keisuke Chikaraishi, Naomu Kitano, Hiroaki Arimura, Takuji Hosoi, Takayoshi Shimura, Takashi Nakagawa, Heiji Watanabe

    Extended Abstracts of the 17th Workshop on Gate Stack Technology and Physics    2012.01  [Refereed]

  • Investigation of UV-induced electrical defects in thermally grown SiO2/SiC structures

    D.Ikebuchi, T. Kirino, S. Mitani, Y. Nakano, T. Nakamura, T. Hosoi, T. Shimura, H. Watanabe

       2011.12  [Refereed]

  • Bias temperatude instability in 4H-SiC metal-oxide-semiconductor devices

    A. Chanthaphan, T. Kirino, Y. Uenishi, D. Ikeguchi, S. Mitani, Y. Nakano, T. Nakamura, T. Hosoi, T. Shimura, H. Watanabe

       2011.12  [Refereed]

  • High-mobility Ge-on-insulator p-channel MOSFETs fabricated by lateral liquid-phase epitaxy

    Y. Suzuki, S. Ogiwara, T. Hosoi, T. Shimura, H. Watanabe

    Abstracts, 42nd IEEE Semiconductor Interface Specialists Conference    2011.12  [Refereed]

  • Drastic degradation in dielectric properties of TiN/HfSiO/SiO2 gate stacks due to Hf uptake property of TiN electrodes

    T. Hosoi, H. Arimura, Y. Odake, N. Kitano, T. Shimura, H. Watanabe

    Abstracts, 42nd IEEE Semiconductor Interface Specialists Conference    2011.12  [Refereed]

  • High-Quality Al2O3/GeO2 Gate Dielectrics Formed by Post-Deposition Oxidation of Ultrathin Metal Al Layer on Ge Substrates

    Iori Hideshima, Atsushi Kasuya, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Abstracts of 15th International Conference on Thin Films (ICTF-15)   12   S75 - S78  2011.11  [Refereed]

    　View Summary

    simple and effective method for fabricating high-quality Al2O3/GeO2 gate dielectrics is proposed. Direct deposition of ultrathin Al layers several angstroms thick on cleaned Ge surfaces followed by conventional dry oxidation was shown to form Al2O3/GeO2 stacked structures. Precise control of interface GeO2 growth was achieved due to low oxygen diffusivity in the Al2O3 layer. Experimental results demonstrated that, in addition to post-oxidation conditions, Al thickness is a crucial parameter for creating high-quality Ge-MOS interfaces and equivalent oxide thickness (EOT) scaling of the gate dielectrics. A correlation between electrical properties and atomic bonding features at the oxide interface was identified by multi-frequency capacitance-voltage (C-V) measurements and x-ray photoelectron spectroscopy observation. An EOT scaled down to 1.2 nm and an interface state density (D-it) in the lower half of the 10(11) cm(-2) eV(-1) were achieved under the optimized fabrication conditions. (c) 2012 Elsevier B.V. All rights reserved.

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    11
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  • Characterization of Grain Boundaries and Lattice Strain in Multicrystalline Si for Solar Cells by Synchrotron White X-ray Micro-beam Diffraction Method

    T. Matsumiya, N. Morimoto, S. Fujino, T. Hosoi, T. Shimura, K. Kajiwara, J. Chen, T. Sekiguchi, H. Watanabe

    Program and Abstracts of 7th Handai Nanoscience and nanotechnology International Symposium    2011.11  [Refereed]

  • Investigation of Mobile Ion Generation in Thermal Oxide of 4H-SiC(0001) MOS Devices with High-Temperature Hydrogen Annealing

    Atthawut Chanthaphan, Takashi Kirino, Yusuke Uenishi, Daisuke Ikeguchi, Shuhei Mitani, Yuki Nakano, Takashi Nakamura, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Abstracts of 15th International Conference on Thin Films (ICTF-15)    2011.11  [Refereed]

  • Modulation of Conduction Band Offset at SiO2/4H-SiC Interface Depending on Interface Defect Passivation Treatment

    T. Hosoi, T. Kitano, A. Chanthaphan, Y. Uenishi, D. Ikeguchi, A. Yoshigoe, Y. Teraoka, S. Mitani, Y. Nakano, T. Nakamura, T. Shimura, H. Watanabe

    Extended Abstracts of Fourth International Symposium on Atomically Controlled Fabrication Technology    2011.11  [Refereed]

  • Two-Dimensional Strain Measurement of Strained Silicon Wafer by Synchrotron X-ray Topography and its Electrical Characterization Using Back-Gate Transistors

    T. Shimura, D. Shimokawa, T. Matsumiya, N. Morimoto, A. Ogura, T. Hosoi, H. Watanabe

    Extended Abstracts of Fourth International Symposium on Atomically Controlled Fabrication Technology    2011.11  [Refereed]

  • Effective Work Function Control of Metal Inserted Poly-Si Electroodes on HfSiO Dielectrics by In-situ Oxygen Treatment Process

    N. Kitano, K. Chikaraishi, H. Arimura, T. Hosoi, T. Shimura, T. Nakagawa, H. Watanabe

    Extended Abstracts of Fourth International Symposium on Atomically Controlled Fabrication Technology    2011.11  [Refereed]

  • Al-based High-k/Ge Gate Stacks Fabricated by Post-Deposition Oxidation of Ultrathin Al Layer on Ge Substrates

    I. Hideshima, A. Kasuya, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of Fourth International Symposium on Atomically Controlled Fabrication Technology    2011.11  [Refereed]

  • Investigation of UV-Induced Electrical Defects in Thermally Grown 4H-SiC MOS Devices

    D. Ikeguchi, T. Kirino, S. Mitani, Y. Nakano, T. Nakamura, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of Fourth International Symposium on Atomically Controlled Fabrication Technology    2011.11  [Refereed]

  • Flatband Voltage Instability Due to Mobile Ions in 4H-SiC Metal-Oxide-Semiconductor Devices

    A. Chanthaphan, T. Kirino, Y. Uenishi, D. Ikeguchi, S. Mitani, Y. Nakano, T. Nakamura, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of Fourth International Symposium on Atomically Controlled Fabrication Technology    2011.11  [Refereed]

  • High-Quality Single-Crystalline Ge-on-Insulator P-Channel MOSFETs Formed by Lateral Liquid-Phase Epitaxy

    T. Suzuki, S. Ogiwara, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of Fourth International Symposium on Atomically Controlled Fabrication Technology    2011.11  [Refereed]

  • High-mobility Ge MOSFETs with GeON gate dielectrics formed by plasma nitridation of ultrathin GeO2

    A. Kasuya, K. Kutsuki, I. Hideshima, Y. Minoura, T. Hosoi, T. Shimura, H. Watanabe

    Program and Abstracts of 7th Handai Nanoscience and nanotechnology International Symposium    2011.11  [Refereed]

  • Fabrication of High-quality GOI and SGOI Structures by Rapid Melt Growth Method

    H. Watanabe, C. Yoshimoto, T. Hashimoto, S. Ogiwara, Y. Suzuki, T. Hosoi, T. Shimura

    Extended Abstracts of Fourth International Symposium on Atomically Controlled Fabrication Technology    2011.11  [Refereed]

  • Insight into unusual impurity absorbability of GeO2 in GeO2/Ge stacks

    Shingo Ogawa, Taichi Suda, Takashi Yamamoto, Katsuhiro Kutsuki, Iori Hideshima, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Appl. Phys. Lett.   99 ( 14 )  2011.10  [Refereed]

    　View Summary

    Adsorbed species and its diffusion behaviors in GeO2/Ge stacks, which are future alternative metal-oxide-semiconductor (MOS) materials, have been investigated using various physical analyses. We clarified that GeO2 rapidly absorbs moisture in air just after its exposure. After the absorbed moisture in GeO2 reaches a certain limit, the GeO2 starts to absorb some organic molecules, which is accompanied by a structural change in GeO2 to form a partial carbonate or hydroxide. We also found that the hydrogen distribution in GeO2 shows intrinsic characteristics, indicative of different diffusion behaviors at the surface and at the GeO2/Ge interface. Because the impurity absorbability of GeO2 has a great influence on the electrical properties in Ge-MOS devices, these results provide valuable information in realizing high quality GeO2/Ge stacks for the actual use of Ge-MOS technologies. (C) 2011 American Institute of Physics. [doi: 10.1063/1.3644393]

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  • Detrimental Hf penetration into TiN gate electrode and subsequent degradation in dielectric properties of HfSiO high-k film

    Hiroaki Arimura, Yuki Odake, Naomu Kitano, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Appl. Phys. Lett.   99 ( 14 )  2011.10  [Refereed]

    　View Summary

    Hafnium penetration through the TiN gate electrode as thick as 10 nm is detected in the TiN/HfSiO/SiO2 gate stacks after high-temperature annealing by using x-ray photoelectron spectroscopy. The Hf outdiffusion, showing TiN thickness dependence, is revealed to cause permittivity lowering of the pristine HfSiO high-k layer, which accelerates the equivalent oxide thickness increase and degrades the dielectric properties. In contrast, such diffusion is suppressed by adopting metal inserted polycrystalline silicon stack (MIPS) structure. Our further experiments indicate that the SiO2 regrowth during high-temperature annealing, which is hampered in MIPS structure, triggers the adverse Hf diffusion. (C) 2011 American Institute of Physics. [doi:10.1063/1.3646378]

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    3
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  • Passivation of High-k Bulk and Interface Defects by Incorporating La into Hf-silicate and its Impact on Carrier Mobility [SISC] (Invited)

    M. Saeki, H. Arimura, N. Kitano, T. Hosoi, T. Shimura, H. Watanabe

    IEEE 11th Kansai Colloquium, Electron Devices Workshop    2011.10  [Refereed]  [Invited]

  • Analysis of Grain Orientation and Lattice Strain in Multicrystalline Silicon for Photovoltaic Cells by Synchrotron White X-ray Micro-beam Diffraction Method

    T. Shimura, T. Matsumiya, N. Morimoto, T. Hosoi, K. Kajiwara, J. Chen, T. Sekiguchi, H. Watanabe

    Abstracts of 14the International Conference on Defects-Recognition, Imaging and Physics in Semiconductors (DRIP-XIV)   725   153 - +  2011.09  [Refereed]

    　View Summary

    A synchrotron white x-ray microbeam diffraction method was employed to investigate lattice distortion in multicrystalline silicon for photovoltaic cells. The measurements were carried out by scanning the sample, and transmission Laue patterns were observed at each position on the sample. Intensity and position maps of the Laue spots showed the distribution of the crystalline quality of the grains and the bending of the lattice planes. Strain and bending distributions were extracted from an analysis of Laue spots at diagonal positions, and these were compared with those obtained by other techniques.

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    1
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  • Synchrotron Radiation Photoelectron Spectroscopy Study of Thermally Grown Oxides on 4H-SiC(0001) Si-face and (000-1) C-face Substrates (Invited)

    Heiji Watanabe, Takuji Hosoi, Takashi Kirino, Yusuke Uenishi, Atthawut Chanthaphan, Akitaka Yoshigoe, Yuden Teraoka, Suhei Mitani, Yuki Nakano, Takashi Nakamura, Takayoshi Shimura

    2011 International Conference on Silicon Carbide and Related Materials Abstract Book   717-720   697 - +  2011.09  [Refereed]  [Invited]

    　View Summary

    The fundamental aspects of thermal oxidation and oxide interface grown on 4H-SiC(0001) Si-face and (000-1) C-face substrates were investigated by means of high-resolution x-ray photoelectron spectroscopy (XPS) using synchrotron radiation together with electrical measurements of SiC-MOS capacitors. We found that, for both cases, there existed no distinct C-rich transition layer despite the literature. In contrast, atomic scale roughness causing degradation of SiC-MOS devices, such as negative fixed charge and electrical defects just at the oxide interface, was found to be introduced as thermal oxidation progressed, especially for the (000-1) C-face substrate.

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    2
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  • Impact of Interface Defect Passivation on Conduction Band Offset at SiO2/4H-SiC Interface

    Takuji Hosoi, Takashi Kirino, Atthawut Chanthaphan, Yusuke Uenishi, Daisuke Ikeguchi, Akitaka Yoshigoe, Yuden Teraoka, Shuhei Mitani, Yuki Nakano, Takashi Nakamura, Takayoshi Shimura, Heiji Watanabe

    2011 International Conference on Silicon Carbide and Related Materials Abstract Book   717-720   721 - +  2011.09  [Refereed]

    　View Summary

    The change in energy band alignment of thermally grown SiO2/4H-SiC(0001) structures due to an interface defect passivation treatment was investigated by means of synchrotron radiation photoelectron spectroscopy (SR-PES) and electrical characterization. Although both negative fixed charge and interface state density in SiO2/SiC structures were effectively reduced by high-temparature hydrogen gas annealing (FGA), the conduction band offset (Delta E-c) at the SiO2/SiC interface was found to be decreased by about 0.1 eV after FGA. In addition, a subsequent vacuum annealing to induce hydrogen desorption from the interface resulted in not only a slight degradation in interface property but also a partial recovery of Delta E-c value. These results indicate that the hydrogen passivation of negatively charged defects near the thermally grown SiO2/SiC interface causes the reduction in conduction band offset. Therefore, the tradeoff between interface quality and conduction band offset for thermally grown SiO2/SiC MOS structure needs to be considered for developing SiC MOS devices.

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    8
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  • Impact of UV Irradiation on Thermally Grown 4H-SiC MOS Devices

    Daisuke Ikeguchi, Takashi Kirino, Shuhei Mitani, Yuki Nakano, Takashi Nakamura, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    2011 International Conference on Silicon Carbide and Related Materials Abstract Book   717-720   765 - +  2011.09  [Refereed]

    　View Summary

    The impact of ultraviolet (UV) light irradiation on thermally grown SiO2/4H-SiC structures was investigated by characterizing the 4H-SiC metal-oxide-semiconductor (MOS) capacitors fabricated with and without UV irradiation onto the oxide layers. The UV irradiation was found to significantly increase a hysteresis in capacitance-voltage (C-V) characteristics and cause a positive flatband voltage (V-FB) shift, suggesting the generation of oxide charges and traps. Since the values of C-V hysteresis and V-FB shift depend on the UV irradiation time, the electrical defects were considered to be induced during UV irradiation. In contrast, UV irradiation caused no marked change for the reference Si-MOS capacitors, indicating that the generation of UV-induced electrical defects was an intrinsic property of thermally grown SiO2/SiC structures. A detailed characterization of SiC-MOS capacitors with terraced SiO2 layers revealed that the UV-induced defects were located near the SiO2/SiC interface. The interfacial fixed charge density (Q(ox)) was estimated to be 1.7x10(12) cm(-2) for the sample with UV irradiation, while that of the sample without UV irradiation was 1.0x10(12) cm(-2). Also, a slight increase was found in interface state density (D-it) due to UV irradiation. These results imply that the UV-induced defect generation correlates with residual carbon impurities at the SiO2/SiC interface.

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    9
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  • X-ray diffraction profiles of Si nanowires with trapezoidal cross-sections

    Teruaki Takeuchi, Kosuke Tatsumura, Iwao Ohdomari, Takayoshi Shimura, Masao Nagase

    Physica B   406 ( 13 ) 2559 - 2564  2011.07  [Refereed]

    　View Summary

    Comparisons of the experimental and calculated X-ray diffraction profiles have been made for Si nanowires with trapezoidal cross-sections. Examined samples are periodically arranged nanowires prepared on a silicon-on-insulator wafer by electron-beam lithography, so that they are isolated from Si substrate. The nanowire periodicity gives rise to diffractions at additional reciprocal lattice points, which we employ to avoid the mixture of the diffraction from the Si substrate. The experimental diffraction profiles are found to be in good agreement with the square modulus of the Fourier transform of the trapezoidal cross-sections determined from transmission electron micrographs. (C) 2011 Elsevier B.V. All rights reserved.

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    1
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  • A novel electroless method for the deposition of single-crystalline platinum nanoparticle films on an organic solid matrix in the presence of gold single crystals

    Khaleda Banu, Takayoshi Shimura

    New J. Chem   35 ( 7 ) 1503 - 1514  2011.07  [Refereed]

    　View Summary

    Single-crystalline platinum nanoparticles (Pt-NPs) were directly deposited on and inside an organic solid matrix by a novel electroless galvanic method. The reducing agent was a solid phase confined with both a reducing agent and a stabilizer combined with initially deposited minute gold single crystals (Au-SCs) on the surface (Au-SM). The oxidizing agent (K(2)PtCl(4)) was in the aqueous solution phase. The reaction was carried out at the solid-liquid interface system at 80 degrees C and pH 1. The deposited Pt-NPs formed a uniform silver-grey conductive coating on the top of the Au-SM when the concentration of K(2)PtCl(4) in the solution was 50 mM. The film consisted of single-crystalline Pt-NPs nearly identical in shape and size (similar to 250 nm). The initially deposited minute Au-SCs by the electroless deposition process were found to catalyze the formation of Pt-NPs having fcc crystal structures with dominating {111} crystal facets. The formation of Pt-NPs was not observed in the absence of initially deposited Au-SCs on the solid matrix. This method was also applicable for the deposition of deep ruby-red, optically transparent and mechanically stable Pt-NPs on and inside the Au-SM for lower concentrations of K(2)PtCl(4) (1 to 5 mM) in the solution phase. This characteristic color was due to the strong surface plasmon absorption of Pt-NPs in the visible range. The Pt atoms initially deposited on the surface and diffused through the entire Au-SM to the opposite side that was not in contact with the oxidizing agent during the period of the reaction. The Pt-NPs on the solution-side of the Au-SM were partially naked and stabilized only from the bottom side, i.e., the upper sides of these nanocrystals were free from the stabilizer coating. The Au-SCs immobilized thiol-based epoxy resin was used as the Au-SM. The proposed Au-SM method was also applicable for the formation of ruby-red iron, palladium and beautiful, rainbow-like colorful silver nanoparticles on the Au-SM surface.

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    4
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  • Synchrotron x-ray photoelectron spectroscopy study on thermally grown SiO2/4H-SiC(0001) interface and its correlation with electrical properties

    Heiji Watanabe, Takuji Hosoi, Takashi Kirino, Yusuke Kagei, Yusuke Uenishi, Atthawut Chanthaphan, Akitaka Yoshigoe, Yuden Teraoka, Takayoshi Shimura

    Appl. Phys. Lett.   99 ( 2 )  2011.07  [Refereed]

    　View Summary

    The correlation between atomic structure and the electrical properties of thermally grown SiO2/4HSiC(0001) interfaces was investigated by synchrotron x-ray photoelectron spectroscopy together with electrical measurements of SiC-MOS capacitors. We found that the oxide interface was dominated by Si-O bonds and that there existed no distinct C-rich layer beneath the SiC substrate despite literature. In contrast, intermediate oxide states in Si core-level spectra attributable to atomic scale roughness and imperfection just at the oxide interface increased as thermal oxidation progressed. Electrical characterization of corresponding SiC-MOS capacitors also indicated an accumulation of both negative fixed charges and interface defects, which correlates well with the structural change in the oxide interface and provides insight into the electrical degradation of thermally grown SiC-MOS devices. (C) 2011 American Institute of Physics. [doi:10.1063/1.3610487]

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  • 高温熱処理によるTiN/HfLaSiO/SiO2ゲートスタック中Hf及びLa原子のTiN電極中への拡散とMIPS構造による抑制

    大嶽祐輝, 有村拓晃, 佐伯雅之, 力石薫介, 北野尚武, 細井卓治, 志村考功, 渡部平司

    電子情報通信学会 シリコン材料・デバイス(SDM)研究会誌    2011.07  [Refereed]

  • A novel electroless method for the deposition of single-crystalline gold nanocrystals on and inside an organic solid-matrix

    Khaleda Banu, Takayoshi Shimura

    New J. Chem.   35 ( 5 ) 1031 - 1041  2011.05  [Refereed]

    　View Summary

    Single-crystalline gold nanocrystals were directly deposited by a novel electroless galvanic method on and inside an organic solid matrix (SM) confined with both a reducing agent and a stabilizer. The reducing agent and stabilizer were in the solid phase, and the oxidizing agent (HAuCl(4)) was in the aqueous solution phase. The reaction was carried out at the solid-liquid interface at 60 degrees C and pH 1. This method differs from the classical electroless galvanic displacement deposition process in several ways. (1) The deposited gold atoms penetrate and form nanoparticles, Au-NPs, through aggregation inside the SM. (2) The galvanic process occurs at the organic polymer matrix/metal ion solution interface instead of at the inorganic material/metal ion solution interface. (3) The entire SM participates in the deposition of gold nanocrystals on and inside the organic SM. (4) Proton transfer is accompanied by gold deposition from the solid to the solution phase to maintain the overall electrical neutrality of the system. (5) Single-crystalline gold nanocrystals are deposited on and inside the SM. The proposed method is applicable to the deposition of large gold nanosheets, Au-NSs (up to 50 mm in diameter), together with Au-NPs on the top of the SM. The Au-NPs inside the SM are three-dimensionally stabilized. The nanocrystals on the solution-side of the SM are partially naked and stabilized only from the bottom side, i.e., the upper sides of these nanocrystals are free from stabilizer coating. Both thiol-and amine-based epoxy resins were used as solid matrices. This method is applicable to direct deposition of optically transparent and mechanically stable Au-NPs on and inside a SM with a lower concentration of HAuCl(4) (0.1 to 0.3 mM) in the solution phase. The formation of platinum and palladium nanoparticles was only possible with this SM method when the reaction was carried out in the presence of a few gold nanocrystals on the surface of the SM.

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    7
    Citation
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  • Advantage of high-density plasma nitridation for improving thermal stability of ultrathin GeO2 on Ge(100)

    A. Kasuya, K. Kutsuki, I. Hideshima, T. Hosoi, T. Shimura, H. Watanabe

    Technical Digest of 2011 International Meeting for Future of Electron Devices, Kansai    2011.05  [Refereed]

  • Surface Cleaning and Etching of 4H-SiC(0001) Using High-Density Atmospheric Pressure Hydrogen Plasma

    Watanabe, Heiji, Ohmi, Hiromasa, Kakiuchi, Hiroaki, Hosoi, Takuji, Shimura, Takayoshi, Yasutake, Kiyoshi

    Journal of Nanoscience and Nanotechnology   11 ( 4 ) 2802 - 2808  2011.04  [Refereed]

    　View Summary

    We propose low-damage and high-efficiency treatment of 4H-S1C(0001) surfaces using atmospheric pressure (AP) hydrogen plasma. Hydrogen radicals generated by the AP plasma was found to effectively remove damaged layers on SiC wafers and improve surface morphology by isotropic etching. Localized high-density AP plasma generated with a cylindrical rotary electrode provides a high etching rate of 1.6 mu m/min and yields smooth morphology by eliminating surface corrugation and scratches introduced by wafer slicing and lapping procedures. However, high-rate etching with localized plasma was found to cause an inhomogeneous etching profile depending on the plasma density and re-growth of the poly-Si layer at the downstream due to the decomposition of the vaporized SiHx products. On the other hand, for the purpose of achieving moderate etching and ideal cleaning of SiC surfaces, we demonstrated the application of a novel porous carbon electrode to form delocalized and uniform AP plasma over 4 inches in diameter. We obtained a reasonably moderate etching rate of 0.1 mu m/min and succeeded in fabricating damage-free SiC surfaces.

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    6
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  • Electronic Structure Characterization of La Incorporated Hf-Based High-k Gate Dielectrics by NEXAFS

    Yamamoto, Takashi, Ogawa, Singo, Kunisu, Masahiro, Tsuji, Junichi, Kita, Koji, Saeki, Masayuki, Oku, Yudai, Arimura, Hiroaki, Kitano, Naomu, Hosoi, Takuji, Shimura, Takayoshi, Watanabe, Heiji

    Journal of Nanoscience and Nanotechnology   11 ( 4 ) 2823 - 2828  2011.04  [Refereed]

    　View Summary

    The electronic structures of lanthunum (La) incorporated hafnium (Hf)-based oxides (HfLaO) and their silicate (HfLaSiO) films were investigated by the Near Edge X-ray Absorption Fine Structure (NEXAFS) technique. The oxygen (O) K-edge spectra, which reflected the hybridized Hf 5d state with the O 2p orbital, were found to reveal features of the unoccupied state of the metal oxides, as well as the conduction-band edge. We also found that, while La incorporation into the Hf-based oxides simply changed the features of the conduction-band structure, subsequent thermal annealing of the La-incorporated films led to a conduction-band edge shift due to an interface silicate reaction and/or local bond rearrangement depending on the La concentration and annealing temperature. The impact of La incorporation into the Hf-based high-k materials on the electronic structure is discussed by taking into account the intrinsic nature of these metal oxides.

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    5
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  • Electrical Characteristics of Ge-Based Metal-Insulator-Semiconductor Devices with Ge3N4 Dielectrics Formed by Plasma Nitridation

    Okamoto, Gaku, Kutsuki, Katsuhiro, Hosoi, Takuji, Shimura, Takayoshi, Watanabe, Heiji

    Journal of Nanoscience and Nanotechnology   11 ( 4 ) 2856 - 2860  2011.04  [Refereed]

    　View Summary

    We have fabricated pure germanium nitrides (Ge3N4) using high-density plasma nitridation and investigated electrical properties of Au/Ge3N4/Ge capacitors. We achieved equivalent oxide thickness (EOT) of 1.4 nm, and dielectric constant of Ge3N4 was estimated to be 9.7. The gate leakage current density of 4.3 A/cm(2) in the accumulation condition at V-fb-1 V, where V-fb is the flatband voltage, was one order of magnitude lower than that of conventional poly-Si/SiO2/Si stacks. The interface state density (D-it) of Ge3N4/Ge interfaces evaluated by a low-temperature conductance method exhibited a minimum value of 9.4 x 10(11) cm(-2)eV(-1) at E - E-v = 0.27 eV. Furthermore, the insulating property and interface quality of Ge3N4/Ge system was found to be thermally stable up to 650 degrees C. These results indicate that Ge3N4 is a promising candidate for either a gate insulator or an interfacial layer under high-k dielectrics for Ge-MIS devices.

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  • Initial Stages of High-Temperature CaF2/Si(001) Epitaxial Growth Studied by Surface X-Ray Diffraction

    Suturin, Sergey M, Sokolov, Nikolai S, Banshchikov, Aleksander G, Kyutt, Reginald N, Sakata, Osami, Shimura, Takayoshi, Harada, Jimpei, Tabuchi, Masao, Takeda, Yoshikazu

    Journal of Nanoscience and Nanotechnology   11 ( 4 ) 2990 - 2996  2011.04  [Refereed]

    　View Summary

    Surface X-ray diffraction was applied to study structure of the fluorite-silicon interface forming upon epitaxial growth of CaF2 on Si(001) surface kept at 750 degrees C. Samples with CaF2 coverage of 1.5-4 (110)-monolayers were grown and in-situ characterized using synchrotron radiation. The 3 x 1-like surface reconstruction was observed in agreement with the previous studies by electron diffraction. Interestingly, a well pronounced splitting of the fractional x1/3 reflections was revealed. This splitting was ascribed to the effect of antiphase domain boundaries in the row-like structure of the interface layer. The in-plane integrated intensities were used to reconstruct two-dimensional atomic structure of the high-temperature CaF2/Si(001) interface.

    DOI

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    2
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  • Fundamental Aspects and Interface Engineering of Ge-MOS Devices

    Heiji Watanabe, Katsuhiro Kutsuki, Iori Hideshima, Gaku Okamoto, Shoichiro Saito, Tomoya Ono, Takuji Hosoi, Takayoshi Shimura

    2011 MRS Spring Meeting Program and Exhibit Guide    2011.04  [Refereed]

  • (Invited) Understanding and Control of Metal-Oxide-Semiconductor Interfaces for Advanced Nanoelectronics

    Heiji Watanabe, Takuji Hosoi, Takayoshi Shimura, Kenji Shiraishi, Keisaku Yamada

    Abstracts of The 3rd Working Group Meeting of Asia Consortium on Computational Materials Science on "Advances in Nano Device Simulation" (accms WGM3)    2011.04  [Refereed]  [Invited]

  • Improved Electrocal Properties and Thermal Stability of GeON Gate Dielectrics formed by Plasma Nitridation of Ultrathin Oxides on Ge(100)

    Heiji Watanabe, Katsuhiro Kutsuki, Iori Hideshima, Gaku Okamoto, Takuji Hosoi, Takayoshi Shimura

    Key Engineering Materials   470   152 - 157  2011.02  [Refereed]

    　View Summary

    We demonstrated the impact of plasma nitridation on thermally grown GeO2 for the purposes of obtaining high-quality germanium oxynitride (GeON) gate dielectrics. Physical characterizations revealed the formation of a nitrogen-rich surface layer on the ultrathin oxide, while keeping an abrupt GeO2/Ge interface without a transition layer. The thermal stability of the GeON layer was significantly improved over that of the pure oxide. We also found that although the GeO2 layer is vulnerable to air exposure, a nitrogen-rich layer suppresses electrical degradation and provides excellent insulating properties. Consequently, we were able to obtain Ge-MOS capacitors with GeON dielectrics of an equivalent oxide thickness (EOT) as small as 1.7 nm. Minimum interface state density (D-it) values of GeON/Ge structures, i.e., as low as 3 x 10(11) cm(-2)eV(-1), were successfully obtained for both the lower and upper halves of the bandgap.

    DOI

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  • Characterization of SiGe Layer during Ge Condensation Process by X-ray Diffration Methods

    Takayoshi Shimura, Tomoyuki Inoue, Daisuke Shimokawa, Takuji Hosoi, Yasuhiko Imai, Osami Sakata, Shigeru Kimura, Heiji Watanabe

    Jpn. J. Appl. Phys.   50 ( 1 )  2011.01  [Refereed]

    　View Summary

    We fabricated a Ge-on-insulator (GOI) structure by the Ge condensation method and characterized the SiGe layer during the condensation process by X-ray reciprocal space mapping and synchrotron microbeam X-ray diffraction. The crystalline quality of the SiGe layer degraded during the initial 1 h of oxidation at 1050 degrees C and it also rapidly degraded during 1 h of oxidation at 900 degrees C immediately before the formation of GOI structures. The slight degradation was caused by annealing in Ar, indicating that the degradation during the initial 1-h condensation is accelerated by Ge atoms being ejected from the oxidized interface. (c) 2011 The Japan Society of Applied Physics

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  • Impact of Thermally Induced Structural Changes on the Electrical Properties of TiN/HfLaSiO Gate Stacks

    Takashi Yamamoto, Shingo Ogawa, Hiroaki Arimura, Masayuki Saeki, Naomu Kitano, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Extended Abstracts of 2011 International Workshop on Dielectric Thin Films for Future Electron Devices: Science and Technology (IWDTF2011)   50 ( 10 )  2011.01  [Refereed]

    　View Summary

    Thermally induced structural changes in TiN/Hf(La) SiO gate stacks were investigated by back-side X-ray photoelectron spectroscopy (XPS) and near edge X-ray absorption fine structure (NEXAFS). A distinct correlation between bottom oxide growth and an increase in equivalent oxide thickness (EOT) was confirmed under high-temperature annealing at over 850 degrees C regardless of La content. Back-side XPS also revealed that oxygen and nitrogen diffusion occurs, forming partially oxidized TiON layers at a metal/high-k interface under moderate annealing temperatures of approximately 600 degrees C, and that annealing at over 750 degrees C leads to the reduction of the oxide phase and produces a thinner inter-layer with a clear Ti-N bond feature. Moreover, with an increase in annealing temperature, a change in the local atomic configuration in the HfLaSiO dielectric layer was identified from oxygen K-edge spectra. This structural change induced by thermal reaction can be considered as a possible cause of the V-th instability of La-incorporated high-k gate stacks. On the basis of these findings on structural changes, the physical origins of the effective work function modulation of the gate stacks are discussed in detail. (C) 2011 The Japan Society of Applied Physics

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  • La Induced Passivation of High-k Bulk and Interface Defects in Poly-Si/TiN/HfLaSiO/SiO2 Stacks

    Masayuki Saeki, Hiroaki Arimura, Naomu Kitano, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Extended Abstracts of 2011 International Workshop on Dielectric Thin Films for Future Electron Devices: Science and Technology (IWDTF2011)   50 ( 10 )  2011.01  [Refereed]

    　View Summary

    La incorporation into Hf-based gate dielectrics is a promising methodology for achieving low threshold voltage (V-th) metal/high-k n-channel metal-oxide-semiconductor field-effect transistors (nMOSFETs) with the gate-first process. To clarify the impact of the Hf/La ratio in high-k dielectrics on device performance, we investigated high-k bulk and interface traps of polycrystalline silicon (poly-Si)/TiN/HfLaSiO/SiO2 stacks with various Hf/La ratios. We found that La incorporation is effective for improving electron mobility; however, in a pure LaSiO device, the mobility is degraded. Our charge-pumping (CP) measurements revealed that both high-k bulk traps and near-interface traps (N-it) near the conduction band, which cause mobility degradation, can be effectively passivated by La incorporation. These results imply that an optimized La ratio will lead to superior nMOSFET performance, while an appropriate V-th can be tuned. (C) 2011 The Japan Society of Applied Physics

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  • In situ Synchrotron Radiation Photoemission Study of Ge3N4/Ge Structures Formed by Plasma Nitridation

    Takuji Hosoi, Katsuhiro Kutsuki, Gaku Okamoto, Akitaka Yoshigoe, Yuden Teraoka, Takayoshi Shimura, Heiji Watanabe

    Extended Abstracts of 2011 International Workshop on Dielectric Thin Films for Future Electron Devices: Science and Technology (IWDTF2011)   50 ( 10 )  2011.01  [Refereed]

    　View Summary

    Chemical bonding states and energy band alignment of pure germanium nitride (Ge3N4) layers formed on Ge(100) surfaces by high-density plasma nitridation were characterized by synchrotron radiation photoemission spectroscopy (SR-PES). The core-level shift of 2.31 eV originating from Ge-N bonds (Ge4+) with respect to the bulk Ge 3d(5/2) peak position (Ge0+) was determined by peak deconvolution of Ge 3d core-level spectra. In situ SR-PES study on changes in Ge 3d, N 1s, and O 1s core-level spectra during thermal annealing under ultrahigh vacuum (UHV) conditions revealed that oxidized surface layer on Ge3N4 film could be selectively removed at around 500 degrees C, which was 50 degrees C lower than the decomposition temperature of Ge3N4. Ge3+ component was found to increase with decreasing Ge4+ component during thermal decomposition of Ge3N4 while no significant change in Ge1+ and Ge2+ components. The Ge3N4 energy bandgap of 3.68 eV was experimentally determined from energy loss spectra of N 1s photoelectrons. The valence band offset at Ge3N4/Ge(100) interfaces were also estimated to be 1.65 eV from valence band spectra, and thus, the energy band alignment between Ge3N4 dielectrics and Ge substrate was determined. (C) 2011 The Japan Society of Applied Physics

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  • Correlation between surface morphology and breakdown characteristics of thermally grown SiO2 dielectrics in 4H-SiC MOS devices

    Yusuke Uenishi, Kohei Kozono, Shuhei Mitani, Yuki Nakano, Takashi Nakamura, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    IMFEDK 2011 - 2011 International Meeting for Future of Electron Devices, Kansai     76 - 77  2011  [Refereed]

    　View Summary

    We have investigated the surface and interface morphology of a thermally grown SiO2/4H-SiC(0001) structure by atomic force microscopy and transmission electron microscopy. It was found that the surface roughness results in thickness fluctuation of thermal SiO2 due to the pronounced oxidation near the steps. Thus, the localized high elevated electric field near the steps accelerates dielectric degradation and hence results in poor gate oxide reliability. © 2011 IEEE.

    DOI

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    2
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  • High-quality single-crystal SiGe layers on insulator formed by rapid melt growth

    S. Ogiwara, Y. Suzuki, C. Yoshimoto, T. Hosoi, T. Shimura, H. Watanabe

    IMFEDK 2011 - 2011 International Meeting for Future of Electron Devices, Kansai     70 - 71  2011  [Refereed]

    　View Summary

    We demonstrate the fabrication of high-quality fully relaxed SiGe layers on a silicon-on-insulator (SOI) substrate by rapid melt growth. A compositional gradient and crystallographic defects are confined to a region between the relaxed SiGe and residual SOI layers. The degradation of surface roughness during rapid thermal annealing is suppressed by the capping SiO2 layer. © 2011 IEEE.

    DOI

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  • Fabrication of SGOI Structure with High Ge Concentration by Rapid Melt Growth

    Shimpei Ogiwara, Yuichiro Suzuki, Chiaki Yoshimoto, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Extended Abstracts of the 16th Workshop on Gate Stack Technology and Physics    2011.01  [Refereed]

  • (Invited)Formation Kinetics of Oxygen Vacancy and Effective Work Function Modulation in High-k/metal Gate Stacks

    Takuji Hosoi, Masayuki Saeki, Yudai Oku, Naomu Kitano, Hiroaki Arimura, Yuki Odake, Kenji Shiraishi, Keisaku Yamada, Takayoshi Shimura, Heiji Watanabe

    Extended Abstracts of the 16th Workshop on Gate Stack Technology and Physics    2011.01  [Refereed]  [Invited]

  • Thermal Stability of GeON Gate Dielectrics Fabricated by High-density Plasma Nitridation of Ultrathin Thermal GeO2 on Ge (100)

    Atsushi Kasuya, Katsuhiro Kutsuki, Iori Hideshima, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Extended Abstracts of the 16th Workshop on Gate Stack Technology and Physics    2011.01  [Refereed]

  • (依頼講演)ゲルマニウムMOSデバイスにおける界面設計と高移動度FETへの応用

    渡部平司, 朽木克博, 糟谷篤志, 秀島伊織, 斉藤正一朗, 小野倫也, 細井卓治, 志村考功

    応用物理学会 北海道支部講演会    2010.12  [Refereed]  [Invited]

  • Interfacial Design of High-k/Ge Gate Stacks with ZrO2 Dielectrics for Scaled Ge-based MOS devices

    Takuji Hosoi, Gaku Okamoto, Iori Hideshima, Atsushi Kasuya, Katsuhiro Kutsuki, James Harries, Akitaka Yoshigoe, Yuden Teraoka, Takayoshi Shimura, Heiji Watanabe

    Abstracts, 41st IEEE Semiconductor Interface Specialists Conference    2010.12  [Refereed]

  • Impact of Plasma Nitridation On Electrical properties and Thermal Stability of Ultrathin Thermal GeO2 on Ge(100)

    Katsuhiro Kutsuki, Atsushi Kasuya, Iori Hideshima, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Abstracts, 41st IEEE Semiconductor Interface Specialists Conference    2010.12  [Refereed]

  • Energy Band Structure of Thermally Grown SiO2/4H-SiC Interfaces and its Modulation Induced by Post-oxidation Treatments

    Takashi Kirino, Yusuke Kagei, Akitaka Yoshigoe, Yuden Teraoka, Syuhei Mitani, Yuki Nakano, Takashi Nakamura, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Abstracts, 41st IEEE Semiconductor Interface Specialists Conference    2010.12  [Refereed]

  • Thermal Robustness and Improved Electrical Properties of Ultrathin Germanium Oxynitride Gate Dielectric

    K. Kutuki, I. Hideshima, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of Third International Symposium on Atomiscally Controlled Fabrication Technology   50 ( 1 ) 10106  2010.11  [Refereed]

    　View Summary

    Robustness of ultrathin germanium oxynitrides (GeON) formed by plasma nitridation of thermal oxides (GeO2) on Ge(100) substrates [K. Kutsuki et al.: Appl. Phys. Lett. 95 (2009) 022102] was investigated by means of physical and electrical measurements. The decomposition temperature of a 3.7-nm-thick GeON layer was found to increase up to 550 degrees C by plasma nitridation, which was about 100 degrees C higher than that of pure GeO2. While the insulating property of GeON dielectrics begins to degrade just below the decomposition temperature, i.e., at around 540 degrees C, thermal treatment up to 520 degrees C effectively improves the electrical properties of the ultrathin GeON dielectrics, such as recovery of bulk defects and quite low interface state density (D-it) even for the ultrathin gate dielectrics. The advantage of GeON dielectrics in designing a fabrication process for Ge-based devices and the physical origins of the improved properties will be discussed. (c) 2011 The Japan Society of Applied Physics

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  • Impact of Nitrogen Incorporation into A12O3 Gate Dielectrics on Flatband Voltage Stability in 4H-SiC MIS Devices

    T. Hosoi, Y. Kagei, T. Kirino, S. Mitani, Y. Nakano, T. Nakamura, T. Shimura, H. Watanabe

    Extended Abstracts of Third International Symposium on Atomiscally Controlled Fabrication Technology    2010.11  [Refereed]

  • Excellent Electrical Property of Ge-MIS Devices with ZrO2 High-k Gate Dielectrics

    T. Hosoi, G. Okamoto, K. Kutsuki, J. Harries, A. Yoshigoe, Y. Teraoka, T. Shimura, H. Watanabe

    Extended Abstracts of Third International Symposium on Atomiscally Controlled Fabrication Technology    2010.11  [Refereed]

  • Residual Order and Rate Enhancement of SiGe Thermal Oxidation

    T. Shimura, Y. Okamoto, D. Shimokawa, T. Inoue, T. Hosoi, H. Watanabe

    Extended Abstracts of Third International Symposium on Atomiscally Controlled Fabrication Technology    2010.11  [Refereed]

  • Investigation of Correlation between Thermally Grown SiO2 Thickness Fluctuation and Local Dielectric Breakdown in 4H-SiC MOS Devices

    Y. Uenishi, K. Kozono, S. Mitani, Y. Nakano, T. Nakamura, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of Third International Symposium on Atomiscally Controlled Fabrication Technology    2010.11  [Refereed]

  • Modulation on Thermally Grown SiO2/4H-SiC Energy Band Structure Depending on Surface Orientation

    T. Kirino, Y. Kagei, A. Yoshigoe, Y. Teraoka, S. Mitani, Y. Nakano, T. Nakamura, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of Third International Symposium on Atomiscally Controlled Fabrication Technology    2010.11  [Refereed]

  • Investigation of High-k Bulk and Interface Defects in Poly-Si/TiN/HfLaSiO/SiO2 Stacks using Charge Pumping Technique

    M. Saeki, H. Arimura, N. Kitano, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of Third International Symposium on Atomiscally Controlled Fabrication Technology    2010.11  [Refereed]

  • Investigation of Structural Change in TiN/HfLaSiO Gate Stack Induced by High-temperature Annealing

    T. Yamamoto, S. Ogawa, H. Arimura, M. Saeki, N. Kitano, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of Third International Symposium on Atomiscally Controlled Fabrication Technology    2010.11  [Refereed]

  • Comprehensive Understanding of Oxygen Vacancy Induced Effective Work Function Modulation in High-k/Metal Gate Stacks

    HOSOI Takuji, SAEKI Masayuki, KITA Yuki, OKU Yudai, ARIMURA Hiroaki, KITANO Naomu, SHIRAISHI Kenji, YAMADA Keisaku, SHIMURA Takayoshi, WATANABE Heiji

    IEICE technical report   110 ( 274 ) 23 - 28  2010.11  [Refereed]  [Invited]

    　View Summary

    Effective work function of p-type gate electrodes on Hf-based high-k dielectrics is known to decrease after high temperature source/drain activation annealing for either poly-Si or metal gate. This effective work function change, called Fermi level pinning, is considered to be due to an interface dipole formation at high-k/ electrode interface originating from oxygen vacancy (V_O) generated in high-k layer. In this work, we experimentally verified that an energy gain of electron transfer from (V_O) defect level in high-k to electrode and reductant elements in high-k/metal gate stacks such as carbon an silicon atoms dominate (V_O) formation kinetics, and developed a guiding principle for gate-first high-k/metal gate stacks to control the effective work function.

    CiNii

  • Fabrication of Fully Relaxed SiGe Layers with High Ge Concentration on Silicon-on-Insulator Wafers by Rapid Melt Growth

    Takayoshi Shimura, Shimpei Ogiwara, Chiaki Yoshimoto, Takuji Hosoi, Heiji Watanabe

    Appl. Phys. Express   3 ( 10 ) 105501  2010.10  [Refereed]

    　View Summary

    We demonstrate the fabrication of high-quality fully relaxed SiGe layers on a silicon-on-insulator (SOI) substrate by rapid melt growth. A compositional gradient and crystallographic defects are confined to a region between the relaxed SiGe and residual SOI layers. The degradation of surface roughness during rapid thermal annealing is suppressed by the capping SiO2 layer. The growth mechanism is discussed based on the phase diagram of the Si-Ge system and the depth profile of the Ge concentration. (C) 2010 The Japan Society of Applied Physics

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  • Interface Reaction and Rate Enhancement of SiGe Thermal Oxidation

    Takayoshi Shimura, Yuki Okamoto, Daisuke Shimokawa, Tomoyuki Inoue, Takuji Hosoi, Heiji Watanabe

    ECS Trans   33 ( 6 ) 893 - 899  2010.10  [Refereed]

    　View Summary

    We investigated the dependences of oxidation reaction on the initial Ge concentration of SiGe substrates under dry oxidation conditions and on the oxidation time under wet oxidation conditions. Based on these results, we discuss the validity of the rate-limiting model proposed for the different oxidation rates of SiGe substrates for dry and wet oxidation.

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  • Cross-sectional TEM study on SiO2/4H-SiC (0001) structure and its impact on reliability degradation of SiC MOS devices

       2010.10  [Refereed]

  • Effect of SiO2/4H-SiC interface passivation on energy band alignment between SiO2 and 4H-SiC

       2010.10  [Refereed]

  • Energy Band Structure of SiO2/4H-SiC Interfaces and its Modulation Induced by Intrinsic and Extrinsic Interface Charge Transfer

    H. Watanabe, T. Kirino, Y. Kagei, J. Harries, A. Yoshigoe, Y. Teraoka, S. Mitani, Y. Nakano, T. Nakamura, T. Hosoi, T. Shimura

    Abstract Booklet of the 8th European Conference on Silicon Carbide and Related Materials   679-680   386 - +  2010.09  [Refereed]

    　View Summary

    The energy band structure of SiO2/4H-SiC fabricated on (0001) Si- and (000-1) C-face substrates was investigated by means of synchrotron radiation x-ray photoelectron spectroscopy (SR-XPS). The band structure was found to be dependent on substrate orientation and oxide thickness due to both intrinsic and extrinsic effects that cause charge transfer at the SiO2/SiC interface. Our SR-XPS analysis revealed that the intrinsic conduction band offset of the SiO2/SiC for the C-face substrate is smaller than that for the Si-face. This means that, whereas C-face substrates exhibit high carrier mobility, a problem that is crucial to gate oxide reliability remains for SiC-based metal-oxide-semiconductor (MOS) devices owing to increased leakage current.

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  • Thermal Stability and Electron Irradiation Damage of Ordered Structure in the Thermal Oxide Layer on Si

    Takayoshi Shimura, Daisuke Shimokawa, Tomoyuki Inoue, Takuji Hosoi, Heiji Watanabe, Osami Sakata, Masataka Umeno

    J. Electrochem. Soc.   157 ( 10 ) H977 - H981  2010.08  [Refereed]

    　View Summary

    We investigated the thermal stability and the electron irradiation damage of the ordered structure in the thermal oxide layer on Si substrates. The diffraction peak from the ordered SiO(2) shifted to the lower angle side, and the intensity decreased after thermal annealing above 950 degrees C, indicating the decrease in density and the disordering of the structure. The least-squares fitting analysis assuming the quasi-amorphous structure showed that the ordered SiO(2) was relatively stable at the SiO(2)/Si interface and the root-mean-square displacement of the atoms at the interface was 0.22 nm. The ordered structure was also degraded by electron irradiation at a dose of less than 6.6 C/cm(2). (C) 2010 The Electrochemical Society. [DOI: 10.1149/1.3476310] All rights reserved.

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  • Investigation of surface and interface morphology of thermally grown SiO2 Dielectrics on 4H-SiC(0001) substrates

    Takuji Hosoi, Kohei Kozono, Yusuke Uenishi, Shuhei Mitani, Yuki Nakano, Takashi Nakamura, Takayoshi Shimura, Heiji Watanabe

    Abstract Booklet of the 8th European Conference on Silicon Carbide and Related Materials   679-680   342 - +  2010.08  [Refereed]

    　View Summary

    Surface and interface morphology of thermal oxides grown on 4 degrees-off (0001) oriented 4H-SiC substrates by dry O-2 oxidation was investigated using atomic force microscopy (AFM) and transmission electron microscopy (TEM). When step bunching was present on a starting wafer, oxide surface roughness was much larger than that of the starting 4H-SiC surface. This is attributed to the difference in oxidation rate between the terrace and the step face. A step-terrace structure on 4H-SiC(0001) was mostly preserved on the oxide surface, but pronounced oxidation occurred around the step bunching. Cross-sectional TEM observation showed that the SiO2/4H-SiC interface became smoother than the initial surface and the thickness of the SiO2 layer fluctuated. Such SiO2 thickness fluctuation may cause a local electric field concentration when a voltage was applied to the oxide, thus degrading the dielectric breakdown characteristics of 4H-SiC metal-oxide-semiconductor (MOS) devices.

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  • Reduction of Charge Trapping Sites in Al2O3/SiO2 Stacked Gate Dielectrics by Incorporating Nitrogen for Highly Reliable 4H-SiC MIS Devices diodes

    Takuji Hosoi, Yusuke Kagei, Takashi Kirino, Shuhei Mitani, Yuki Nakano, Takashi Nakamura, Takayoshi Shimura, Heiji Watanabe

    Abstract Booklet of the 8th European Conference on Silicon Carbide and Related Materials   679-680   496 - +  2010.08  [Refereed]

    　View Summary

    Superior flatband voltage (V-fb) stability of SiC-based metal-insulator-semiconductor (MIS) devices with aluminum oxynitride (AlON) gate dielectrics was demonstrated. MIS capacitors with gate insulators consisting of a thick pure aluminum oxide (Al2O3) and a thin underlying SiO2 layer fabricated on n-type 4H-SiC substrates showed a positive Vfb shift due to substrate electron injection depending on the applied gate bias and the thickness of the SiO2 interlayer. This large Vfb shift was greatly suppressed for devices with AlON/SiO2 stacked gate dielectrics, suggesting that electron trapping sites in Al2O3 film were mostly compensated for by nitrogen incorporation. This finding is helpful in realizing highly reliable SiC-based MIS field-effect-transistors (MISFETs) in terms of threshold voltage stability.

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    9
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  • ゲートファーストHigh-k MIPS構造の実効仕事関数制御に向けた指針

    細井卓治, 佐伯雅之, 奥雄大, 有村拓晃, 北野尚武, 白石賢二, 山田啓作, 志村考功, 渡部平司

    応用物理学会シリコンテクノロジー分科会第127回研究集会予稿集    2010.07  [Refereed]  [Invited]

  • Comprehensive Study and Control of Oxygen Vacancy Induced Effective Work Function Modulation in Gate-First High-k/Metal Inserted Poly-Si Stacks

    T. Hosoi, M. Saeki, Y. Oku, H. Arimura, N. Kitano, K. Shiraishi, K. Yamada, T. Shimura, H. Watanabe

    2010 Symposium on VLSI Technology Digest of Technical Papers     179 - +  2010.06  [Refereed]

    　View Summary

    We report the crucial impact of "Reductant Controlled MIPS (RC-MIPS) process" to obtain a sufficiently high effective work function (EWF) of poly-Si/TiN/HfSiON stacks in the gate-first process. It was found that carbon impurity, the strongest reductant element in the gate stack, dominates oxygen vacancy (V-O) formation kinetics and markedly enhances Fermi level pinning (FLP) phenomenon. We designed a high EWF gate-first RC-MIPS technology that uses both in situ metal/high-k fabrication and reduction suppressing processes, which leads to improved EOT-J(g) characteristics and EWF stability.

  • Interface Engineering of ZrO2/Ge Gate Stacks by Post-deposition Annealing and Al2O3 Capping Layers

    H. Watanabe, G. Okamoto, K. Kutsuki, J. Harries, A. Yoshigoe, Y. Teraoka, T. Hosoi, T. Shimura

    Extended Abstracts of International Symposium on Technology Evolution for Silicon Nano-Electronics    2010.06  [Refereed]

  • Superior electrical properties and thermal stability of ultrathin GeON dielectrics formed by plasma nitridation of thermal oxides on Ge(100)

    K. Kutsuki, I. Hideshima, G. Okamoto, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of International Symposium on Technology Evolution for Silicon Nano-Electronics    2010.06  [Refereed]

  • Synchrotron X-ray Diffraction Study of Lattice Inclination and Strain in Strained Si Wafers

    D. Shimokawa, T. Inoue, A. Ogura, M. Umeno, T. Hosoi, T. Shimura, H. Watanabe

    Abstract Notebook of International Conference on Core Research and Engineering Science of Advanced Materials    2010.06  [Refereed]

  • Conductive AFM study on local dielectric degradation of thermal oxides in 4H-SiC MOS devices

    Y. Uenishi, K. Kozono, S. Mitani, Y. Nakano, T. Nakamura, T. Hosoi, T. Shimura, H. Watanabe

    Abstract Notebook of International Conference on Core Research and Engineering Science of Advanced Materials    2010.06  [Refereed]

  • Control of Thermally Grown GeO2/Ge MOS Characteristics - Effects of Vanuum Annealing, Capping Layers and Electrode Material -

    I. Hideshima, K. Kutsuki, G. Okamoto, T. Hosoi, T. Shimura, H. Watanabe

    Abstract Notebook of International Conference on Core Research and Engineering Science of Advanced Materials    2010.06  [Refereed]

  • Investigation of the Physical Origin of the Improved Electrical Properties of GeO2 Dielectric by Vacuum Annealing.

    Shingo Ogawa, Takashi Yamamoto, Gaku Okamoto, Katsuhiro Kutsuki, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Program and Exhibit Guide of 2010 MRS spring meeting    2010.04  [Refereed]

  • Fabrication of advanced La-incorporated Hf-silicate gate dielectrics using physical-vapor-deposition-based in situ method and its effective work function modulation of metal/high-k stacks

    Hiroaki Arimura, Yudai Oku, Masayuki Saeki, Naomu Kitano, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    J. Appl. Phys.   107 ( 3 )  2010.02  [Refereed]

    　View Summary

    Lanthanum (La) incorporation into Hf-silicate high-permittivity (high-k) gate dielectrics was conducted using a physical-vapor-deposition (PVD)-based in situ method. PVD-grown metal Hf, La, and Hf-La alloys on base SiO(2) oxides received in situ annealing to form high-quality HfLaSiO dielectrics, and subsequent deposition of metal gate electrodes was carried out to fabricate advanced metal/high-k gate stacks without breaking vacuum. The in situ method was found to precisely control La content and its depth profile and to tune the effective work function of metal/high-k stacks. Remarkable leakage current reduction of almost seven orders of magnitude compared with conventional poly-Si/SiO(2) stacks and excellent interface properties comparable to an ideal SiO(2)/Si interface were also achieved at an equivalent oxide thickness of around 1.0 nm. Our x-ray photoelectron spectroscopy analysis revealed that, as previously suggested, effective work function modulation due to La incorporation is attributed to the interface dipole (or localized sheet charge) at the bottom high-k/SiO(2) interface, which is crucially dependent on the La content at the interface. Moreover, it was found that high-temperature annealing causing interface oxide growth leads to redistribution of La atoms and forms the uppermost La-silicate layer at the metal/high-k interface by releasing the dipole moment at the bottom high-k/SiO(2) interface. Based on these physical and electrical characterizations, the advantages and process guidelines for La-incorporated dielectrics were discussed in detail.

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  • Improved electrical properties of SiC-MOS interfaces by thermal oxidation of plasma nitrided 4H-SiC(0001) surfaces

    Yusuke Kagei, Takashi Kirino, Yuu Watanabe, Shuhei Mitani, Yuki Nakano, Takashi Nakamura, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Materials Science Forum   645-648   507 - 511  2010  [Refereed]

    　View Summary

    We propose a treatment of nitrogen radical irradiation to 4H-SiC surfaces for improving thermally grown SiO2/SiC interfaces. X-ray photoelectron spectroscopy (XPS) analyses revealed that a 1.7-nm-thick nitride film was formed by nitrogen radical exposure for 30 min and that Si-N bonds were retained after subsequent 10 min oxidation. It was also confirmed by secondary ion mass spectrometry (SIMS) that nitrogen atoms were piled up at the SiO 2/SiC interface for the samples fabricated by thermal oxidation for 3 min with nitrogen plasma exposure. The metal-oxide-semiconductor (MOS) capacitors with a thin oxynitride layer formed by nitrogen radical exposure to the SiC surface and subsequent thermal oxidation exhibited excellent capacitance-voltage (C-V) characteristics. The interface state density (D it) was significantly reduced by nitrogen radical exposure even at the shallow energy level near the conduction band edge. A minimum Dit value of 1.4 × 1011 cm-2eV-1 at Ec - E = 0.44 eV was achieved. Therefore, we can conclude that the treatment of nitrogen radical irradiation to the SiC surface prior to thermal oxidation is a promising method for improving SiC-MOS characteristics. © (2010) Trans Tech Publications.

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    5
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  • High-quality GeON gate dielectrics formed by plasma nitridation of ultrathin thermal oxides on Ge(100)

    Heiji Watanabe, Katsuhiro Kutsuki, Iori Hideshima, Gaku Okamoto, Takuji Hosoi, Takayoshi Shimura

    ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings     867 - 870  2010  [Refereed]  [Invited]

    　View Summary

    High-quality germanium oxynitride (GeON) gate dielectrics for Ge-based metal-oxide-semiconductor (MOS) devices were fabricated by plasma nitridation of ultrathin thermal oxides on Ge(100) substrates. Although ultrathin oxides with abrupt GeO2/Ge interfaces can be formed by conventional dry oxidation, air exposure results in serious electrical degradation. It was found that plasma nitridation forms a nitrogen-rich capping layer on the ultrathin oxide and significantly improves thermal stability of the GeON layer. The nitrogen-rich layer effectively suppresses electrical degradation during air exposure and provides excellent insulating properties. Consequently, we were able to achieve Ge-MOS capacitors with GeON dielectrics of an equivalent oxide thickness (EOT) as small as 1.7 nm. Minimum interface state density (D it) values of GeON/Ge structures, i.e., as low as 3 × 10 11 cm-2eV-1, were successfully obtained for both the lower and upper halves of the bandgap. ©2010 IEEE.

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    4
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  • Improvement of the Electrical Properties of Ge-MOS Capacitors Degraded by Air Exposure

    Iori Hideshima, Gaku Okamoto, Katsuhiro Kutsuki, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Extended Abstracts of the 15th Workshop on Gate Stack Technology and Physics    2010.01  [Refereed]

  • Interface Engineering of Ge MOS Devices with ZrO2 Gate Dielectrics

    Takuji Hosoi, Gaku Okamoto, Katsuhiro Kutsuki, Yusuke Kagei, James Harries, Akitaka Yoshigoe, Yuden Teraoka, Takayoshi Shimura, Heiji Watanabe

    Extended Abstracts of the 15th Workshop on Gate Stack Technology and Physics    2010.01  [Refereed]

  • Systematic Investigation of Carbon Impurity Induced Electrical Degradation of TiN/HfSiON Gate Stacks

    Masayuki Saeki, Hiroaki Arimura, Yudai Oku, Naomu Kitano, Motomu Kosuda, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Extended Abstracts of the 15th Workshop on Gate Stack Technology and Physics    2010.01  [Refereed]

  • Characterization of GeON Dielectrics Fabricated by High-Density Plasma Nitridation of Ultrathin Thermal GeO2

    Katsuhiro Kutsuki, Iori Hideshima, Gaku Okamoto, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Extended Abstracts of the 15th Workshop on Gate Stack Technology and Physics    2010.01  [Refereed]

  • Impact of plasma nitridation of 4H-SiC surfaces and high-temperature hydrogenannealing on interface properties of thermally grown SiC-MOS devices

    Y. Kagei, T. Kirino, K. Kozono, S. Mitani, Y. Nakano, T. Nakamura, A. Yoshigoe, Y. Teraoka, T. Hosoi, T. Shimura, H. Watanabe

       2009.12  [Refereed]

  • Observation of the Local Dielectric Degradation Phenomenon in Thermal Oxides on4H-SiC(0001) Using Conductive Atomic Force Microscopy

    K. Kozono, Y. Kagei, T. Kirino, S. Mitani, Y. Nakano, T. Nakamura, T. Hosoi, T. Shimura, H. Watanabe

       2009.12  [Refereed]

  • SR-XPS study on energy band structure of thermally grown SiO2/4H-SiC interface

    T. Kirino, Y. Kagei, G. Okamoto, J. Harries, A. Yoshigoe, Y. Teraoka, S. Mitani, Y. Nakano, T. Nakamura, T. Hosoi, T. Shimura, H. Watanabe

       2009.12  [Refereed]

  • Improvement of SiC-MOS Devices with Plasma Nitridation and AlON/SiO2 Stacked Dielectrics

    H. Watanabe, Y. Kagei, K. Kozono, T. Kirino, Y. Watanabe, S. Mitani, Y. Nakano, T. Nakamura, A. Yoshigoe, Y. Teraoka, T. Hosoi, T. Shimura

       2009.12  [Refereed]  [Invited]

  • New Insights into Flatband Voltage Shift and Minority Carrier Generation in GeO2/Ge MOS devices

    Takuji Hosoi, Marina Saito, Iori Hideshima, Gaku Okamoto, Katsuhiro Kutsuki, Shingo Ogawa, Takashi Yamamoto, Takayoshi Shimura, Heiji Watanabe

    Abstracts, 40th IEEE Semiconductor Interface Specialists Conference    2009.12  [Refereed]

  • Impact of Plasma Nitridation on Physical and Electrical Properties of Ultrathin Thermal Oxides on Ge(100).

    Katsuhiro Kutsuki, Gaku Okamoto, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Program and Exhibit Guide of 2009 MRS fall meeting    2009.12  [Refereed]

  • Fabrication of Single-Crystal Local Germanium-on-Insulator Structures by Lateral Liquid-Phase Epitaxy

    Tatsuya Hashimoto, Chiaki Yoshimoto, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Program and Exhibit Guide of 2009 MRS fall meeting    2009.12  [Refereed]

  • Initial Stages of High-temperature CaF2 Epitaxial Growth On Si(001): Surface X-ray Diffraction Study

    S. M. Suturin, T. Shimura, N. S. Sokolov, A. G. Banshchikov, R. N. Kyutt, O. Sakata, J. Harada, M. Tabuchi, Y. Takeda

    Extended Abstracts of Second International Symposium on Atomiscally Controlled Fabrication Technology    2009.11  [Refereed]

  • Electrical Characteristics of Ge-based MIS Devices with Ge3N4 Dielectrics Formed by Plasma

    G. Okamoto, K. Kutsuki, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of Second International Symposium on Atomiscally Controlled Fabrication Technology    2009.11  [Refereed]

  • Impact of gate electrode deposition process on effective work function of poly-Si/TiNHfSiO gate stacks

    Y. Oku, H. Arimura, M. Saeki, N. Kitano, M. Kosuda, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of Second International Symposium on Atomiscally Controlled Fabrication Technology    2009.11  [Refereed]

  • Structural and electrical properties of GeON dielectrics formed by high-density plasma nitridation of ultrathin thermal GeO2

    K. Kutsuki, G. Okamoto, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of Second International Symposium on Atomiscally Controlled Fabrication Technology    2009.11  [Refereed]

  • Observation of local dielectric degradation of thermal oxides on 4H-SiC using conductive AFM

    K. Kozono, S. Mitani, Y. Nakano, T. Nakamura, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of Second International Symposium on Atomiscally Controlled Fabrication Technology    2009.11  [Refereed]

  • Impact of Carbon Impurity on Electrical Properties of TiN/HfSiON/SiO2

    M. Saeki, H. Arimura, Y. Oku, N. Kitano, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of Second International Symposium on Atomiscally Controlled Fabrication Technology    2009.11  [Refereed]

  • Thermal Instability of Effective Work Function of Metal/HfLaSiO Gate Stacks

    H. Arimura, Y. Oku, M. Saeki, N. Kitano, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of Second International Symposium on Atomiscally Controlled Fabrication Technology    2009.11  [Refereed]

  • Selective Adsorption of Ti-binding Ferritin on Thin Ti Film with Various Oxidation Treatment

    T. Hashimoto, K. Gamo, M. Fukuta, B. Zheng, N. Okamoto, I. Yamashita, Y. Uraoka, N. Zettsu, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of Second International Symposium on Atomiscally Controlled Fabrication Technology    2009.11  [Refereed]

  • Advanced Gate Stack Technology for SiC-MOS Power Devices

    H. Watanabe, Y. Kagei, K. Kozono, T. Kirino, Y. Watanabe, S. Mitani, Y. Nakano, T. Nakamura, T. Hosoi, T. Shimura

    Extended Abstracts of Second International Symposium on Atomiscally Controlled Fabrication Technology    2009.11  [Refereed]

  • Fundamental understanding of thermally grown GeO2/Ge MOS characteristics

    T. Hosoi, I. Hideshima, G. Okamoto, K. Kutsuki, T. Shimura, H. Watanabe

    Extended Abstracts of Second International Symposium on Atomiscally Controlled Fabrication Technology    2009.11  [Refereed]

  • X-ray diffraction study of strain distribution in oxidized Si nanowires

    Teruaki Takeuchi, Kosuke Tatsumura, Takayoshi Shimura, Iwao Ohdomari

    J. Appl. Phys.   106 ( 7 )  2009.10  [Refereed]

    　View Summary

    Strain distributions in oxidized Si nanowires fabricated on a (001)-oriented silicon-on-insulator wafer have been determined by analyzing intensity profiles of the diffraction, caused by the nanowire periodicity, around the 111 Bragg point. In this analysis, theoretical diffraction curves, calculated by a kinematical treatment, are fitted to experimental ones, examining positions of the central and fringe maxima and their intensity ratios. Strains in oxidized samples are shown to be negative at the bottom surface and positive at the top surface of nanowires changing with depth in a concave way. The magnitudes of the strains at the bottom surface and at the top surface increase monotonically with increasing the oxidation time. The determined strain of a sample oxidized at 850 degrees C for 5 h is 0.50% at the top surface and -0.11% at the bottom surface. (C) 2009 American Institute of Physics. [doi:10.1063/1.3236514]

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  • Lateral Polarity Control in GaN Based on Selective Growth Procedure Using Carbon Mask Layers

    Hisashi Matsumura, Yasuo Kanematsu, Takayoshi Shimura, Takayuki Tamaki, Yasuyuki Ozeki, Kazuyoshi Itoh, Masatomo Sumiya, Takayuki Nakano, Shunro Fuke

    APPLIED PHYSICS EXPRESS   2 ( 10 )  2009.10  [Refereed]

    　View Summary

    For nonlinear optical applications using GaN, periodic inversion of crystallographic orientation (polarity) is required in terms of quasi-phase matching. We have developed a novel procedure for designing polarity pattern in GaN using metalorganic chemical vapor deposition, and applied to fabrication of periodical polarity inverted GaN films. Patterning has been achieved in atmosphere, even without the etching process, by employing the selective growth procedure using carbon mask layers. The carbon mask layers, formed by laser-induced modification of an organic layer, can be removed, then subsequent nitridation of the re-exposed sapphire substrate enables N-face (-c) domain growth within a Ga-face (+c) film. (C) 2009 The Japan Society of Applied Physics DOI: 10.1143/APEX.2.101001

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    12
    Citation
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  • Improved electrical properties of SiC-MOS interfaces by thermal oxidation of plasma nitrided 4H-SiC(0001) surfaces

    Y. Kagei, T. Kirino, Y. Watanabe, S. Mitani, Y. Nakano, T. Nakamura, T. Hosoi, T. Shimura, H. Watanabe

    Technical Digest of International Conference on Silicon Carbide and Related Materials 2009   645-648   507 - +  2009.10  [Refereed]

    　View Summary

    We propose a treatment of nitrogen radical irradiation to 4H-SiC surfaces for improving thermally grown SiO2/SiC interfaces. X-ray photoelectron spectroscopy (XPS) analyses revealed that a 1.7-nm-thick nitride film was formed by nitrogen radical exposure for 30 min and that Si-N bonds were retained after subsequent 10 min oxidation. It was also confirmed by secondary on mass spectrometry (SIMS) that nitrogen atoms were piled up at the SiO2/SiC interface for the samples fabricated by thermal oxidation for 3 min with nitrogen plasma exposure. The metal-oxide-semiconductor (MOS) capacitors with a thin oxynitride layer formed by nitrogen radical exposure to the SiC surface and subsequent thermal oxidation exhibited excellent capacitance-voltage (C-V) characteristics. The interface state density (D-it) was significantly reduced by nitrogen radical exposure even at the shallow energy level near the conduction band edge. A minimum D-it value of 1.4 x 10(11) cm(-2)eV(-1) at E-e = 0.44 eV was achieved. Therefore, we can conclude that the treatment of nitrogen radical irradiation to the SiC surface prior to thermal oxidation is a promising method for improving SiC-MOS characteristics.

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    5
    Citation
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  • Direct Observation of Dielectric Breakdown Spot in Thermal Oxides on 4H-SiC(0001) Using Conductive Atomic Force Microscopy

    K. Kozono, Y. Kagei, T. Kirino, S. Mitani, Y. Nakano, Y. Nakamura, T. Hosoi, T. Shimura, H. Watanabe

    Technical Digest of International Conference on Silicon Carbide and Related Materials 2009   645-648   821 - +  2009.10  [Refereed]

    　View Summary

    The dielectric breakdown mechanism in 4H-SiC metal-oxide-semiconductor (MOS) devices was studied using conductive atomic force microscopy (C-AFM). We performed time-dependent dielectric breakdown (TDDB) measurements using a line scan mode of C-AFM, which can characterize nanoscale degradation of dielectrics. It was found that the Weibull slope (beta) of time-to-breakdown (t(BD)) statistics in 7-nm-thick thermal oxides on SiC substrates was much larger for the C-AFM line scan than for the common constant voltage stress TDDB tests on MOS capacitors, suggesting the presence of some weak spots in the oxides. Superposition of simultaneously obtained C-AFM topographic and current map images of SiO2/SiC structure clearly demonstrated that most of breakdown spots were located at step bunching. These results indicate that preferential breakdown at step bunching due to local electric field concentration is the probable cause of poor gate oxide reliability of 4H-SiC MOS devices.

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    10
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  • Observation of Two-Dimensional Distribution of Lattoce Inclination and Strain in Strained Si Wafers by Synchrotron X-Ray Topography

    Takayoshi Shimura, Tomoyuki Inoue, Daisuke Shimokawa, Takuji Hosoi, Heiji Watanabe, Atsushi Ogura, Masataka Umeno

    DRIP XIII Conference    2009.09  [Refereed]

  • Significant Improvement in GeO2/Ge MOS Characteristics by in Situ Vacuum Annealing

    T. Hosoi, G. Okamoto, K. Kutsuki, T. Shimura, H. Watanabe

    Program & Abstracts of 5th Handai Nanoscience and Nanotechnology International Symposium    2009.09  [Refereed]

  • Experimental Verification of Interface Dipole Formation in Metal/high-k Gate Stacks

    T. Hosoi, Y. Kita, T. Shimura, K. Shiraishi, Y. Nara, K. Yamada, H. Watanabe

    Program & Abstracts of 5th Handai Nanoscience and Nanotechnology International Symposium    2009.09  [Refereed]

  • Improved Electrical Properties and Effective Work Function Control of Metal/HfLaSiO/SiO2/Si Gate Stacks Fabricated by PVD-Based In-situ Process

    M. Saeki, H. Arimura, Y. Oku, N. Kitano, T. Hosoi, T. Shimura, H. Watanabe

    Program & Abstracts of 5th Handai Nanoscience and Nanotechnology International Symposium    2009.09  [Refereed]

  • Ge3N4 Gate Dielectrics Fabricated by High-Density Plasma Nitridation of Ge(100) Surfaces

    K. Kutsuki, G. Okamoto, T. Hosoi, T. Shimura, H. Watanabe

    Program & Abstracts of 5th Handai Nanoscience and Nanotechnology International Symposium    2009.09  [Refereed]

  • Improved Physical and Electrical Properties of Ultrathin Germanium Oxides by High-Density Plasma Nitridation

    K. Kutsuki, G. Okamoto, T. Hosoi, T. Shimura, H. Watanabe

    Program & Abstracts of 5th Handai Nanoscience and Nanotechnology International Symposium    2009.09  [Refereed]

  • Fabrication of Ge Nano-Wires on Insulators Using Lateral Liquid-Phase Epitaxy

    C. Yoshimoto, T. Hashimoto, T. Hosoi, T. Shimura, H. Watanabe

    Program & Abstracts of 5th Handai Nanoscience and Nanotechnology International Symposium    2009.09  [Refereed]

  • Germanium oxynitride gate dielectrics formed by plasma nitridation of ultrathin thermal oxides on Ge(100)

    Katsuhiro Kutsuki, Gaku Okamoto, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Appl. Phys. Lett.   95 ( 2 )  2009.07  [Refereed]

    　View Summary

    Germanium oxynitride (GeON) gate dielectrics with surface nitrogen-rich layers were fabricated by plasma nitridation of thermally grown oxides (GeO(2)) on Ge(100). Insulating features of ultrathin GeO(2) layers of around 2-nm-thick were found to improve with plasma treatment, in which leakage current was drastically reduced to over four orders of magnitude. Consequently, Au/GeON/Ge capacitors of an equivalent oxide thickness down to 1.7 nm were achieved while keeping sufficient leakage reduction merit. The minimum interface state density values of GeON/Ge structures as low as 3x10(11) cm(-2) eV(-1) were obtained for both the lower and upper halves of the bandgap without any postnitridation treatments. These results were discussed based on the effects of plasma nitridation on a degraded GeO(2) surface for recovering its electrical properties by creating stable nitride layers.

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  • Mechanism of carrier mobility degradation induced by crystallization of HfO2 gate dielectrics

    Takashi Ando, Tomoyuki Hirano, Shinichi Yoshida, Kaori Tai, Shinpei Yamaguchi, Satoshi Toyoda, Hiroshi Kumihashira, Takayoshi Shimura, Hayato Iwamoto, Masaharu Oshima, Shingo Kadomura, Heiji Watanabe

    Appl. Phys. Express   2 ( 7 ) 71402  2009.06  [Refereed]

    　View Summary

    We have experimentally shown that crystallization of HfO2 and the subsequent formation of fixed charges localized at the HfO2/SiO2 interface bring about a degradation of electron mobility. Systematic analyses of valence-band photoemission and transmission electron microscopy indicate that the oxygen transfer from the HfO2 layer to the Si substrate is promoted upon the crystallization of HfO2 and the fixed charges are generated during the process. These findings highlight the importance of controlling the crystallinity of HfO2 for realizing high performance metal gate high-K field-effect transistors. (C) 2009 The Japan Society of Applied Physics

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    11
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  • Fundamental Study on GeO2/Ge Interface and its Electrical Properties

    Heiji WATANABE, Marina SAITO, Shoichiro SAITO, Gaku OKAMOTO, Katsuhiro KUTSUKI, Takuji HOSOI, Tomoya ONO, Takayoshi SHIMURA

    Abstracts, IEICE Technical Committee on Silicon Device and Materials (SDM)    2009.06  [Refereed]  [Invited]

  • Origin of flatband voltage shift and unusual minority carrier generation in thermally grown GeO2/Ge metal-oxide-semiconductor devices

    Takuji Hosoi, Katsuhiro Kutsuki, Gaku Okamoto, Marina Saito, Takayoshi Shimura, Heiji Watanabe

    Appl. Phys. Lett.   94 ( 20 )  2009.05  [Refereed]

    　View Summary

    Improvement in electrical properties of thermally grown GeO2/Ge metal-oxide-semiconductor (MOS) capacitors, such as significantly reduced flatband voltage (V-FB) shift, small hysteresis, and minimized minority carrier response in capacitance-voltage (C-V) characteristics, has been demonstrated by in situ low temperature vacuum annealing prior to gate electrode deposition. Thermal desorption analysis has revealed that not only water but also hydrocarbons are easily infiltrated into GeO2 layers during air exposure and desorbed at around 300 degrees C, indicating that organic molecules within GeO2/Ge MOS structures are possible origins of electrical defects. The inversion capacitance, indicative of minority carrier generation, increases with air exposure time for Au/GeO2/Ge MOS capacitors, while maintaining an interface state density (D-it) of about a few 10(11) cm(-2) eV(-1). Unusual increase in inversion capacitance was found to be suppressed by Al2O3 capping (Au/Al2O3/GeO2/Ge structures). This suggests that electrical defects induced outside the Au electrode by infiltrated molecules may enhance the minority carrier generation, and thus acting as a minority carrier source just like MOS field-effect transistors.

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    93
    Citation
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  • Fabrication of Local Ge-on-Insulator Structures by Lateral Liquid-Phase Epitaxy: Effect of Controlling Interface Energy between Ge and Insulators on Lateral Epitaxial Growth

    Tatsuya Hashimoto, Chiaki Yoshimoto, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Appl. Phys. Express   2 ( 6 ) 66502  2009.05  [Refereed]

    　View Summary

    Local Ge-on-insulator (GOI) structures were fabricated by means of lateral liquid-phase epitaxy (LPE). We investigated both effects of microcrucible size and underlying insulator materials that determine the interface energy with liquid Ge. We demonstrated that choosing narrow crucibles and controlling interface energy suppresses undesirable Ge aggregation and random nucleation during LPE growth. By utilizing alternative La(2)O(3) high-k dielectrics instead of conventional SiO(2) insulators, single-crystal 44-mu m-long Ge wires were fabricated within 1-mu m-wide microcrucibles. The improved mechanism is also discussed in terms of interface energy and random nucleation during LPE growth. (c) 2009 The Japan Society of Applied Physics

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  • Synchrotron X-ray Diffraction Studies of Thermal Oxidation of Si and SiGe (Invited)

    Takayoshi Shimura, Yuki Okamoto, Shimokawa Daisuke, Tomoyuki Inoue, Takuji Hosoi, Heiji Watanabe

    Abstracts of 215th ECS Meeging   19 ( 2 ) 479 - +  2009.05  [Refereed]  [Invited]

    　View Summary

    Thermal stability and the electron irradiation damage to the ordered structure in the thermal oxide on Si substrates are shown, together with the fundamentals of the quasi-amorphous structural model. The mechanism and rate enhancement of SiGe oxidation is also discussed based on the ordered structure in the oxide layer.

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  • Systematic study on work-function-shift in metal/Hf-based high-k gate stacks

    Yuki Kita, Shinichi Yoshida, Takuji Hosoi, Takayoshi Shimura, Kenji Shiraishi, Yasuo Nara, Keisaku Yamada, Heiji Watanabe

    APPLIED PHYSICS LETTERS   94 ( 12 )  2009.03  [Refereed]

    　View Summary

    Change in the work function (WF) of the gate electrode material caused by the contact with Hf-based high-k gate dielectrics was investigated by means of the flat-band voltage (V-fb) shift in capacitance-voltage curves, and the interface dipole, which modifies the WF, was characterized by x-ray photoelectron spectroscopy. We observed a negative V-fb shift and corresponding interface dipole, which suggest the formation of oxygen vacancy (V-O) in the Hf-based oxides. In contrast, we observed an opposite (positive) V-fb shift and interface dipole when Au electrodes were formed on cleaned Hf-based dielectrics. This indicates that Au-Hf bond hybridization at the Au/HfSiON interface also causes effective WF modulation, as theoretically predicted by Shiraishi (Tech. - Dig. Int. Electron Devices Meet. 2005, 43).

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  • Nitrogen Plasma Cleaning of Ge(100) Surfaces

    Katsuhiro Kutsuki, Gaku Okamoto, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Applied Surface Science   255 ( 12 ) 6335 - 6337  2009.03  [Refereed]

    　View Summary

    We propose a dry method of cleaning Ge(1 0 0) surfaces based on nitrogen plasma treatment. Our in situ Auger electron spectroscopy (AES) and low-energy electron diffraction (LEED) analyses demonstrate that surface contamination remaining after wet treatment was effectively removed by nitrogen radical irradiation at low substrate temperatures. The nitrogen plasma cleaned Ge(1 0 0) surface shows a well-ordered 2 x 1 reconstruction, which indicates the formation of a contamination-free Ge(1 0 0) surface with good crystallinity. We discuss the possible reaction mechanism considering how chemisorbed carbon impurities are removed by selective C-N bond formation and subsequent thermal desorption. These findings imply the advantage of plasma nitridation of Ge surfaces for fabricating nitride gate dielectrics, in which we can expect surface pre-cleaning at the initial stage of the plasma treatment. (C) 2009 Elsevier B.V. All rights reserved.

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    Citation
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  • Investigation of Flatband Voltage Instability in Metal/High-k Gate Stacks

    Takuji Hosoi, Yuki Kita, Takayoshi Shimura, Heiji Watanabe, Kenji Shiraishi, Yasuo Nara, Keisaku Yamada

    Extended Abstracts of First International Symposium on Atomiscally Controlled Fabrication Technology - Surface and Thin Film Processing-    2009.02  [Refereed]

  • Synchrotron X-ray Diffraction Studies of Thermal Oxide of Strained SiGe on Si

    Daisuke Shimokawa, Yuki Okamoto, Tomoyuki Inoue, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Extended Abstracts of First International Symposium on Atomiscally Controlled Fabrication Technology - Surface and Thin Film Processing-    2009.02  [Refereed]

  • Lateral Liquid-Phase Epitaxy of Single-Crystal Germanium Wires on La2O3 Dielectrics

    T. Hashimoto, C. Yoshimoto, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of First International Symposium on Atomiscally Controlled Fabrication Technology - Surface and Thin Film Processing-    2009.02  [Refereed]

  • 4H-SiC MIS Devices with AION/SiO2/SiC Gate Structures

    Y. Kagei, M. Harada, Y. Watanabe, T. Hosoi, T. Shimura, S. Mitani, Y. Nakano, T. Nakamura, H. Watanabe

    Extended Abstracts of First International Symposium on Atomiscally Controlled Fabrication Technology - Surface and Thin Film Processing-    2009.02  [Refereed]

  • Synchrotron Microbeam X-ray Diffraction Analysis of Strain Relaxation Process during Ge Condensation

    Tomoyuku Inoue, Daisuke Shimokawa, Takuji Hosoi, Takayoshi Shimura, Yasuhiko Imai, Osami Sakata, Shigeru Kimura, Heiji Watanabe

    Extended Abstracts of First International Symposium on Atomiscally Controlled Fabrication Technology - Surface and Thin Film Processing-    2009.02  [Refereed]

  • Excellent Electrical Property and Flatband Voltage Controllability of HfLaSiO High-k Gate Dielectrics Fabricated by In-situ Process

    H. Arimura, Y. Oku, N. Kitano, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of First International Symposium on Atomiscally Controlled Fabrication Technology - Surface and Thin Film Processing-    2009.02  [Refereed]

  • Advantages of Fluorine Ion Implantation for Improving Ge3N4/Ge Interfaces

    Katsuhiro Kutsuki, Gaku Okamoto, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    Extended Abstracts of First International Symposium on Atomiscally Controlled Fabrication Technology - Surface and Thin Film Processing-    2009.02  [Refereed]

  • Fabrication of Advanced Metal/High-k Gate Stacks by Atomically Controlled in-situ PVD-based Method

    H. Watanabe, H. Arimura, N. Kitano, Y. Oku, M. Saeki, Y. Naitou, N. Yamaguchi, M. Kosuda, T. Hosoi, T. Shimura

    Extended Abstracts of First International Symposium on Atomiscally Controlled Fabrication Technology - Surface and Thin Film Processing-    2009.02  [Refereed]

  • Ge-MIS Devices with Ge3N4 Gate Dielectrics Fabricated by High-Density Plasma Nitridation

    Takuji Hosoi, Katsuhiro Kutsuki, Gaku Okamoto, Marina Saito, Takayoshi Shimura, Heiji Watanabe

    Extended Abstracts of First International Symposium on Atomiscally Controlled Fabrication Technology - Surface and Thin Film Processing-    2009.02  [Refereed]

  • Study on Electrical Properties of Ge3N4 Dielectrics Fabricated by High-Density Plasma Nitridation

    K. Kutsuki, G. Okamoto, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of the 14th Workshop on Gate Stack Technology and Physics    2009.01  [Refereed]

  • Residual Order in the Thermally Oxidized Thin Film of Strained SiGe Layers Grown on Si Substrates

    D. Shimokawa, Y. Okamoto, T. Inoue, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of the 14th Workshop on Gate Stack Technology and Physics    2009.01  [Refereed]

  • Fabrication of Ge Wire on Insulator Using Lateral Liquid-Phase Epitaxial Growth

    T. Hashimoto, C. Yoshimoto, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of the 14th Workshop on Gate Stack Technology and Physics    2009.01  [Refereed]

  • Improved Electrical Properties and Flatband Control of HfLaSiO High-k Gate Dielectrics Fabricated by In-Situ Process

    H. Arimura, Y. Oku, M. Saeki, N. Kitano, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of the 14th Workshop on Gate Stack Technology and Physics    2009.01  [Refereed]

  • Fabrication and Electrical Characterization of High-k/Ge Gate Stacks with Al-Oxynitride Dielectrics

    G. Okamoto, K. Kutsuki, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of the 14th Workshop on Gate Stack Technology and Physics    2009.01  [Refereed]

  • Characterization of strained Si wafers by X-ray diffraction techniques

    T. Shimura, K. Kawamura, M. Asakawa, H. Watanabe, K. Yasutake, A. Ogura, K. Fukuda, O. Sakata, S. Kimura, H. Edo, S. Iida, M. Umeno

    Jounal of Materials Science: Materials in Electronics   19   S189 - S193  2008.12  [Refereed]

    　View Summary

    Strained Si wafers made by layer transfer and Ge condensation methods were investigated by several X-ray diffraction techniques. From the reciprocal space map measurements, the angular distribution of the lattice plane was estimated to be 0.4 degrees. X-ray microbeam diffraction showed that the size of the domains with different orientations is less than 2 mu m(2), and the existence of the strain in the substrate propagated through a buried oxide layer from the SiGe layer. In large-area X-ray topographs, two kinds of crosshatch patterns were observed, depending on the process used to manufacture the wafer.

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  • Evaluation of super-critical thickness strained-Si on insulator (sc-SSOI) substrate

    A. Ogura, T. Yoshida, D. Kosemura, Y. Kakemura, M. Takei, H. Saito, T. Shimura, T. Koganesawa, I. Hirosawa

    SOLID-STATE ELECTRONICS   52 ( 12 ) 1845 - 1848  2008.12  [Refereed]

    　View Summary

    Crystal quality and strain distribution in 501 layer of conventional strained-Si on insulator (SSOI) and super-critical thickness strained-Si on insulator (sc-SSOI) were evaluated by in-plane X-ray diffraction (XRD), Raman spectroscopy, and other techniques. The Surface defect distribution measured by wafer inspection system shows pit-type and line defects in both SSOI layers. More specifically, the sc-SSOI material has more line defects than conventional SSOI layers. Cross-hatched pattern defects were observed using X-ray topography (XRT) measurements. Raman mapping of 300 mm wafers shows the strain at the center of the wafer is larger than at the edge. In magnified close-up mapping, cross-hatched contrasts corresponding to misfit dislocations are observed, while the surface morphology is completely smoothed out. In-plane XRD measurements show the strain depth variations are quite uniform along the depth direction. The full width at half maximum (FWHM) of in-plane XRD peaks obtained from strained-Si layers is much larger than for un-strained SOI and bulk Si, reflecting poor crystal quality. SSOI was fabricated by the layer transfer of strained-Si on a virtual SiGe substrate. Therefore, we believe the crystal quality and strain distribution originate in the donor strained Si when virtual SiGe substrate is the starting material. (C) 2008 Elsevier Ltd. All rights reserved.

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    11
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  • Formation of Advanced HfLaSiO/SiO2 Gate Dielectrics Utilizing PVD-based in-situ Fabrication Method

    T. Hosoi, Y. Oku, H. Arimura, M. Saeki, N. Kitano, T. Shimura, H. Watanabe

    Abstracts, 39th IEEE Semiconductor Interface Specialists Conference    2008.12  [Refereed]

  • Improved Electrical Properties of Ge3N4/Ge Interfaces by Fluorine Ion Implantation

    K. Kutsuki, G. Okamoto, T. Hosoi, T. Shimura, H. Watanabe

    Abstracts, 39th IEEE Semiconductor Interface Specialists Conference    2008.12  [Refereed]

  • Fabrication and Characterization of 4H-SiC MIS Devices with AION/SiO2 Stacked Gate Dielectrics

    T. Hosoi, Y. Kagei, M. Harada, Y. Watanabe, T. Shimura, S. Mitani, Y. Nakano, T. Nakamura, H. Watanabe

       2008.12  [Refereed]

  • Passivation of SiO2/SiC interface defect by the combination treatment with nitrogen plasma irradiation and forming gas anneal

    Y. Watanabe, Y. Kagei, T. Kirino, S. Mitani, Y. Nakano, T. Nakamura, T. Hosoi, T. Shimura, H. Watanabe

       2008.12  [Refereed]

  • Improvement of thermally grown SiO2/SiC interfaces by using plasma nitrided 4H-SiC

    Y. Kagei, Y. Watanabe, M. Harada, T. Hosoi, T. Shimura, H. Watanabe

       2008.12  [Refereed]

  • Residual Order in Thermal Oxide of Fully Strained SiGe Alloy on Si

    T. Shimura, Y. Okamoto, T. Inoue, T. Hosoi, H. Watanabe

    Extended Abstracts of 2008 International Workshop on Dielectric Thin Films for Future ULSI Devices Science and Technology   81 ( 3 )  2008.11  [Refereed]

    　View Summary

    Residual order in the thermal oxide of a fully strained SiGe alloy on a Si(001) surface was investigated by synchrotron x-ray diffraction. Ordered SiO(2) was present in the oxide layer, and the crystalline order was similar to that of Si. The dependence of the order on oxidation time and temperature was also obtained. On the basis of these results, the oxidation reaction at the interface and the differences in rate enhancement between dry and wet oxidation conditions are discussed.

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  • Investigation of Structural Defects in Strained Si Wafers by Synchrotron X-ray Topography

    Takayoshi Shimura, Tomoyuki Inoue, Takuji Hosoi, Atsushi Ogura, Satoshi Iida, Masataka Umeno, Heiji Watanabe

    Abstracts of the 5th International Symposium on Advanced Science and Technology of Silicon Materials    2008.11  [Refereed]

  • Electrical Properties of Ge3N4/Ge Gate Stacks Fabricated Using High-Density Plasma Nitridation

    G. Okamoto, K. Kutsuki, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of 2008 International Workshop on Dielectric Thin Films for Future ULSI Devices Science and Technology    2008.11  [Refereed]

  • Characteristics of in-situ phosphorus-doped silicon selective epitaxial growth at atmospheric pressure

    Tetsuya Ikuta, Shigeru Fujita, Hayato Iwamoto, Shingo Kadomura, Takayoshi Shimura, Heiji Watanabe, Kiyoshi Yasutake

    JOURNAL OF CRYSTAL GROWTH   310 ( 21 ) 4507 - 4510  2008.10  [Refereed]

    　View Summary

    The characteristics of in-situ P-doped Si selective epitaxial growth (SEG) under atmospheric pressure (AP) was investigated and compared with in-situ As-doped SEC under AP. Dopant concentrations and growth rates of films grown at AP are higher than those at low pressure, this for both dopants. This was interpreted as effects of surface segregation of the dopant atoms and the strong etching effect of HCl during the SEG under AP. By optimizing the growth rate and temperature, we achieved a high dopant concentration of 7.3 x 10(19) atoms/cm(3) and a high growth rate for the P-doped SEG. (c) 2008 Elsevier B.V. All rights reserved.

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  • Dielectric and Interface Properties of TiO2/HfSiO/SiO2 Layered Structures Fabricated by in situ PVD Method

    H. Arimura, Y. Naitou, N. Kitano, Y. Oku, N. Yamaguchi, M. Kosuda, T. Hosoi, T. Shimura, H. Watanabe

    Abstracts of 214th ECS Meeging   16 ( 5 ) 121 - +  2008.10  [Refereed]

    　View Summary

    We proposed TiO2/HfSiO/SiO2 layered gate dielectrics and demonstrated the use of the layered structure for scaling equivalent oxide thickness (EOT) and reducing gate leakage current (J(g)). Ti diffusion into the HfSiO/SiO2 underlayers, during Ti oxidation annealing for forming TiO2 caps on HfSiO/SiO2, was found to increase leakage current, positive fixed charges, interface state density, and additional charge traps after applying bias stress. By using low temperature Ti-oxidation annealing and forming gas annealing (FGA) treatment, we successfully controlled Ti diffusion and terminated Ti-induced defects. We achieved excellent EOT-J(g) characteristics (EOT = 0.71 nm, J(g) = 7.2 x 10(-2) A/cm(2)), which are equal to the leakage merit of over five orders of magnitude compared with conventional poly-Si/SiO2/Si gate stacks, while maintaining a superior interface property (interface trap density: D-it = 9.9 x 10(10) eV(-1) cm(-2)).

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    2
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  • Observation of Crystalline Imperfections in Supercritical Thickness Strained Silicon on Insulator Wafers by Synchrotron X-ray Topography

    T. Shimura, T. Inoue, Y. Okamoto, T. Hosoi, H. Edo, S. Iida, A. Ogura, H. Watanabe

    Abstracts of 214th ECS Meeging   16 ( 10 ) 539 - +  2008.10  [Refereed]

    　View Summary

    A commercial supercritical thickness strained Si-on-insulator (SC-sSOI) wafer was characterized by large-area synchrotron x-ray topography at the glancing incident condition. Several kinds of contrast showing crystalline imperfections were observed all over the wafers, such as macule and crosshatch patterns. Similar crosshatch patterns were also observed in the x-ray topographs of a conventional strained Si-on-insulator (sSOI) wafer and a strained Si wafer that has the strained Si layer epitaxially grown on the relaxed SiGe layer on the insulator (SGOI) structure. This indicates that the crosshatch pattern of the SC-sSOI wafer originates from the lattice distortion in the original SiGe substrate of the strained Si layer.

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  • AlON/SiO2 Stacked Gate Dielectrics for 4H-SiC MIS Devices

    T. Hosoi, M. Harada, Y. Kagei, Y. Watanabe, T. Shimura, S. Mitani, Y. Nakano, T. Nakamura, H. Watanabe

    Abstract of 7th European Conference on Silicon Carbide and Related Materials, Barcelona,Spain, September 7-11, 2008   615-617   541 - 544  2008.09  [Refereed]

    　View Summary

    We propose the use of an aluminum oxynitride (AION) gate insulator for 4H-SiC MIS devices. Since direct deposition of AION on 41-1-SiC substrate generates a large amount of interface charge due to an interfacial reaction, a thick AION laver was deposited on underlying thin SiO(2) thermally grown in N(2)O ambient. To reduce the negative fixed charge density in the aluminum oxide (Al(2)O(3)) film, we used reactive sputtering of Al in an N(2)/O(2) gas mixture. The fabricated MIS capacitor with AlON/SiO(2) stacked gate dielectric shows no flat hand voltage shift and negligible capacitance-voltage hysteresis (30 mV), indicating the dielectric is almost free from both fixed charges and electrical defects. Owing to the high dielectric constant of AION (k=6.9), as compared to single N(2)O-SiO(2) gate insulator, significant gate leakage reduction was achieved by AlON/SiO(2) stacked gate dielectrics even at high-ternperature, especially in a high electric field condition (&gt;5 MV/cm).

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  • Impact of a Treatment Combining Nitrogen Plasma Exposure and Forming Gas Annealing on Defect Passivation of SiO2/SiC Interfaces

    H. Watanabe, Y. Watanabe, M. Harada, Y. Kagei, T. Kirino, T. Hosoi, T. Shimura, S. Mitani, N. Nakano, T. Nakamura

    Abstract of 7th European Conference on Silicon Carbide and Related Materials, Barcelona,Spain, September 7-11, 2008   615-617   525 - 528  2008.09  [Refereed]

    　View Summary

    We propose a treatment combining nitrogen plasma exposure and forming gas annealing (FGA) to improve the electrical properties of SiO(2)/SiC interfaces. Although conventional FGA at 450 degrees C alone is not effective for reducing interface traps and fixed charges, Our combination treatment effectively reduces both even at moderate temperatures. We achieved further improvement by applying our treatment at higher (over 900 degrees C) FGA temperatures, including lower interface state density (D(it)) values for both deep and shallow energy levels (1 - 4 x 10(11) cm(-2) eV(-1)). Considering that nitrogen incorporation promotes hydrogen passivation of interface defects, a possible mechanism for the improved electrical properties is that interface nitridation eliminates carbon clusters or Si-O-C bonds, which leads to the formation of simple Si and C dangling bonds that can lie readily terminated by hydrogen. We therefore believe that our treatment is a promising method for improving the performance of SiC-based MOS devices.

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  • 真空一貫原子制御ＰＶＤプロセスによるＴｉＯ２/ＨfSiO/ＳiO２積層構造 High-k絶縁膜の作製と電気特性評価

    渡部平司, 有村拓晃, 奥 雄大, 細井卓治, 志村考功, 北野尚武, 内藤裕一, 山口述夫, 小須田求

    電気学会研究会資料-電子材料研究会EFM-08-24～34    2008.09  [Refereed]

  • Fabrication of Advanced TiO2/HfSiO/SiO2 Layered Higher-k Dielectrics by Atomically Controlled In-situ PVD-Based Method

    H. Wanatabe, H. Arimura, N. Kitano, Y. Naitou, Y. Oku, N. Yamaguchi, M. Kosuda, T. Hosoi, T. Shimura

    Abstracts of Fourth International WorkShop on New Group Ⅳ Semiconductor Nanoelectronics    2008.09  [Refereed]

  • Characterization of Strain Relaxation Process during Ge Condensation by Synchrotron Microbeam X-ray Diffraction

    T. Inoue, D. Shimokawa, T. Hosoi, T. Shimura, Y. Imai, O. Sakata, S. Kimura, H. Wanatabe

    Extended Abstracts of the 2008 International Conference on SOLID STATE DEVICES AND MATERIALS    2008.09  [Refereed]

  • Surface X-ray diffraction studies of CaF2(110)/Si(001) interface formation

    T. Shimura, S. M. Suturin, N. S. Sokolov, A. G. Banshchikov, R. N. Kyutt, O. Sakata, J. Harada, M. Tabuchi, Y. Takeda

    Acta Cryst. A   64   C556 - C556  2008.08

    DOI

  • Origins of interface dipoles at p-metal/Hf-based high-k gate stacks

    H. Watanabe, T. Hosoi, K. Kita, T. Shimura, K. Shiraishi, Y. Nara, K. Yamada

    Abstracts of International Conference on Quantum Simulators and Design 2008    2008.06  [Refereed]

  • Excellent Electrical Properties of TiO2/HfSiO/SiO2 Layered Higher-k Gate Dielectrics with Sub-1 nm Equivalent Oxide Thickness

    H. Arimura, N. Kitano, Y. Naitou, Y. Oku, T. Minami, M. Kosuda, T. Hosoi, T. Shimura, H. Watanabe

    Appl. Phys. Lett.   92 ( 21 )  2008.05  [Refereed]

    　View Summary

    Equivalent oxide thickness (EOT) scaling, as well as improved interface properties, of metal/higher-k gate stacks for the sub-1 nm region was achieved using a TiO(2)/HfSiO/SiO(2) layered dielectric structure. Ti diffusion into the bottom oxides was found to form electrical defects, which lead to an increase of leakage current, fixed charge, interface trap density (D(it)), and reliability degradation of the gate stacks. By controlling Ti diffusion and terminating Ti-induced defects using forming gas annealing, we successfully obtained a superior interface property (D(it)=9.9x10(10) eV(-1) cm(-2)) and reduced gate leakage (J(g)=7.2x10(-2) A/cm(2)) at the 0.71-nm-EOT region. (c) 2008 American Institute of Physics.

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  • Formation of Polycrystalline-Si Thin Films Using Nanocrystalline Ge Nuclei

    Chiaki Yoshimoto, Hiromasa Ohmi, Takayoshi Shimura, Hiroaki Kakiuchi, Heiji Watanabe, Kiyoshi Yasutake

    Abstracts of International Meeting for Future of Electron Devices, Kansai 2008    2008.05  [Refereed]

  • Improvement of thermally grown SiO2/SiC interfaces by plasma nitridation and post-metalization annealing

    Y. Kagei, Y. Watanabe, M. Harada, T. Hosoi, T. Shimura, H. Watanabe

    Abstracts of International Meeting for Future of Electron Devices, Kansai 2008    2008.05  [Refereed]

  • Investigation of In-situ Boron-Doped Si Selective Epitaxial Growth by Comparison with Arsenic Doping

    T. Ikuta, S. Fujita, H. Iwamoto, S. Kadomura, T. Shimura, H. Watanabe, K. Yasutake

    Jpn. J. Appl. Phys.   47 ( 4 ) 2452 - 2455  2008.04  [Refereed]

    　View Summary

    In-situ boron-doped silicon selective epitaxial growth (SEG) was investigated by comparison with in-situ As-doped SEG. The dopant concentration and growth rate of the film grown under low pressure are high for B-doped SEG, while they are high under atmospheric pressure (AP) for As-doped SEG. This difference is interpreted to be due to the strong effects of HCI etching under AP and surface segregation of As. By optimizing the growth rate and temperature, we have successfully grown epitaxial Si layers with high B concentrations of 2.3 x 10(20) atoms/cm(3).

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    3
    Citation
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  • Formation of Polycrystalline Si Thin Films Using Nanocrystalline Ge Nuclei

    C. Yoshimoto, H. Ohmi, T. Shimura, H. Kakiuchi, H. Watanabe, K. Yasutake

    IEICE Technical Report    2008.04  [Refereed]

  • Characterization of Strained Si Wafers by Synchrotron X-Ray Topography

    Takayoshi SHIMURA, Kohta KAWAMURA, Masahiro ASAKAWA, Heiji WATANABE, Kiyoshi YASUTAKE, Atsushi OGURA

    Photon Factory Activity Report 2006    2008.02

  • Fundamental Aspects of Effective Work Function Instability of Metal/Hf-based High-k Gate Stacks

    Heiji Watanabe, Shinichi Yoshida, Yuki Kita, Takuji Hosoi, Takayoshi Shimura, Kenji Shiraishi, Yasuo Nara, Keisaku Yamada

    PHYSICS AND TECHNOLOGY OF HIGH-K GATE DIELECTRICS 6   16 ( 5 ) 27 - +  2008  [Refereed]  [Invited]

    　View Summary

    The instability of the effective work function (WF) of metal/Hf-based high-k gate stacks was studied based on theoretical models that took into consideration oxygen vacancy (V-o) in the Hf-based oxides and bond hybridization at the metal/higb-k interfaces. We observed a negative flat band voltage (V-fb) shift in the capacitance-voltage (C-V) characteristics and corresponding interface dipole through x-ray photoelectron spectroscopy. These results indicate V-o formation that is driven by the energy gain due to electron transfer from the V-o level of the oxides to the high-WF electrode (V-o model). In contrast, we observed an opposite (positive) V-fb shift and interface dipole when Au electrodes were formed on cleaned Hf-based dielectrics. This effective WF modulation was attributed to Au-Hf bond hybridization at the Au/HfSiON interface (generalized charge neutrality level (phi(CNL)-C-G) model). Moreover, the interface dipole caused by the hybridization was found to be stable under a vacuum and dry ambient, but it was gradually released when the gate stacks were exposed to an air and wet ambient. These experimental results clearly support the validity of the V-o and phi(CNL)-C-G models and provide process guidelines for effectively controlling WF in advanced metal/high-k gate stacks.

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  • In situ Arsenic-Droped SiC Selective Epitaxial Growth under Atmospheric Pressure

    T. Ikuta, S. Fujita, H. Iwamoto, S. Kadomura, T. Shimura, H. Watanabe, K. Yasutake

    Appl.Phys. Lett.   92 ( 4 )  2008.01  [Refereed]

    　View Summary

    We investigated the characteristics of in situ As-doped Si(1-y)C(y) selective epitaxial growth (SEG) under atmospheric pressure. We succeeded in obtaining an in situ doped Si(1-y)C(y) SEG film with a high As concentration of 2.6x10(19) atoms/cm(3). The film exhibited a high crystalline quality, high strain, constant As and C concentration profiles, and an abrupt change in the dopant profile at the interface. It was found that the increase in As concentration under atmospheric pressure increases the C concentration and the growth rate by competitive surface segregation between As and C atoms, leading to a highly strained Si(1-y)C(y) SEG film with a low resistivity. (c) 2008 American Institute of Physics.

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  • X線トポグラフィ研究会現状報告

    飯田 敏, 志村考功, 梶原堅太郎

    SPring-8利用者情報    2008.01  [Invited]

  • Characterization of Strained Si Wafers by using Synchrotron X-ray Diffraction Methods

    T. Inoue, Y. Okamoto, A. Ogura, H. Edo, S. Iida, K. Fukuta, O. Sakata, S. Kimura, M. Umeno, T. Shimura, K. Yasutake, H. Watanabe

       2008.01  [Refereed]

  • Charge trapping properties in TiO2/HfSiO/SiO2 gate stacks probed by scanning capacitance microscopy

    Y.Naitou, H. Arimura, N. Kitano, S. Horie, T. Minami, M. Kosuda, H. Ogiso, T. Hosoi, T. Shimura, H. Watanabe

    Appl.Phys. Lett.   92 ( 1 )  2008.01  [Refereed]

    　View Summary

    The charge-trapping properties of the high-permittivity titanium oxide-hafnium silicate-silicon dioxide (TiO(2)/HfSiO/SiO(2)) gate stacks have been studied using scanning capacitance microscopy. From the bias stress examination of the gate stacks, we concluded that there were electron traps within the films, and these trap densities increased with an increase in the oxidation temperature used for the fabrication of TiO(2) top dielectrics. Furthermore, we found that the distribution of these charged defects was inhomogeneous within the gate stacks. These results are attributed to Ti diffusion through the dielectric layers, which caused electrical defects within the gate stacks.(C) 2008 American Institute of Physics.

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  • Fundamental aspects of effective work function instability at metal/high-k interfaces

    Y. Kagei, Y. Kita, T. Hosoi, T. Shimura, H. Watanabe, K. Shiraishi, M. Kadoshima, Y. Nara, K. Yamada

       2008.01  [Refereed]

  • Characteristics of p-MISFETs with TiN/HfSiON Gate Stacks Fabricated by PVD-based In-situ Method

    N. Kitano, H. Arimura, S. Horie, S. Sakashita, Y. Nishida, J. Yugami, T. Minami, M. Kosuda, T. Hosoi, T. Shimura, H. Watanabe

       2008.01  [Refereed]

  • Study on Thermal and Humidity of GeN4 Thin Layers Fabricated by Plasma Nitridation

    K. Kutsuki, G. Okamoto, T. Hosoi, T. Shimura, H. Watanabe

       2008.01  [Refereed]

  • Achievement of sub-1nm EOT high-k gate dielectrics with TiO2/HfSiO/SiO2 layered structure

    H. Arimura, S. Horie, Y. Oku, T. Minami, N. Kitano, M. Kosuda, T. Hosoi, T. Shimura, H. Watanabe

       2008.01  [Refereed]

  • Application of synchrotron X-ray diffraction methods to gate stacks of advanced MOS Devices

    T. Shimura, T. Inoue, Y. Okamoto, T. Hosoi, A. Ogura, O. Sakata, S. Kimura, H. Edo, S. Iida, H. Watanabe

    ECS Transactions   13 ( 2 ) 75 - 82  2008  [Refereed]  [Invited]

    　View Summary

    We demonstrate two topics of the application of synchrotron X-ray diffraction methods to thin films used in gate stack structures. One is related to the structural change in the interfacial SiO2 layer between the high-k dielectric layer and the Si substrate. It is shown that O2 molecules dissociate into O atoms during diffusion through the HiO2 layer and these O atoms destroy the ordered SiO2 in the interfacial layer. The other is the characterization of strained Si wafers using a synchrotron X-ray microbeam diffraction and topography. The nonuniformity in micro- and centimeter scales is shown for the SiGe layer of the strained Si wafers. © The Electrochemical Society.

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  • Thermal and Humidity Stability of Ge3N4 Thin Layers Fabricated by High-Density Plasma Nitridation

    K. Kutsuki, G. Okamoto, Y. Hosoi, A. Yoshigoe, Y. Tedaoka, T. Shimura, H. Watanabe

    Techinical Program of 2007 International Semiconductor Device Research Symposium     68 - +  2007.12  [Refereed]

  • A Comprehensive Study on Effective Work Function Modulation of Metal/High-k Gate Stacks

    T. Hosoi, Y. Kita, Y.Kagei, T.Shimura, H. Watanabe, K. Shiraishi, Y. Nara, K. Yamada

    Abstracts, 38th IEEE Semiconductor Interface Specialists Conference    2007.12  [Refereed]

  • Enhanced Performance of Gate-First p-Channel Metal-Insulator-Srmiconductor Field-Effect Transistors with Polycrystalline Silicon/TiN/HfSiON Stacks Fabricated by Physical Vapor Deposition Based In situ Method

    N. Kitano, S. Horie, H. Arimura, T. Kawahara, S. Sakashita, Y. Nishida, J. Yugami, T. Minami, M. Kosuda, T. Hosoi, T. Shimura, H. Watanabe

    Jpn.J.Appl.Phys. 46 (2007) L1111-L1113.   46 ( 45-49 ) L1111 - L1113  2007.11  [Refereed]

    　View Summary

    We demonstrated the use of an in situ metal/high-k fabrication method for improving the performance of metal-insulator-semiconductor field-effect transistors (MISFETs). Gate-first pMISFETs with polycrystalline silicon (poly-Si)/TiN/HfSiON stacks were fabricated by techniques based on low-damage physical vapor deposition, in which high-quality HfSiON dielectrics were formed by the interface reaction between an ultrathin metal-Hf layer (0.5 nm thick) and a SiO2 underlayer, and TiN electrodes were continuously deposited on the gate dielectrics without exposure to air. Gate-first pMISFETs with high carrier mobility and a low threshold voltage (V-th) were realized by reducing the carbon impurity in the gate stacks and improving the V-th stability against thermal treatment. As a result, we obtained superior current drivability (I-on = 350 mu A/mu m at I-off = 200pA/mu m), which corresponds to a 13% improvement over that of conventional chemical vapor deposition-based metal/high-k devices.

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    4
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  • Structural Optimization of HfTiSiO High-k Gate Dielectrics by Utilizing In-Situ PVD-Based Fabrication Method

    H. Arimura, S. Horie, T. Minami, N. Kitano, M. Kosuda, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts & ProgramFifth International Symposium on Control of Semiconductor Interfaces - for Next Generation ULSI Process Integrations -   254 ( 19 ) 6119 - 6122  2007.11  [Refereed]

    　View Summary

    We investigated the optimum structure for Ti-containing Hf-based high-k gate dielectrics to achieve EOT scaling below 1 nm. TiO(2)/HfSiO/SiO(2) trilayer and HfTiSiO/SiO(2) bilayer structures were fabricated by a newly developed in-situ PVD-based method. We found that thermal diffusion of Ti atoms to SiO(2) underlayers degrades the EOT-Jg characteristics. Our results clearly demonstrated the impact of the trilayered structure with TiO(2) capping for improving EOT-Jg characteristics of the gate stack. Weachieved an EOT scaling of 0.78 nm as well as reduced gate leakage of 7.2 x 10(-2) A/cm(2) for a TiO(2)/HfSiO/SiO(2) trilayered high-k dielectric while maintaining the electrical properties at the bottom interface. (C) 2008 Elsevier B. V. All rights reserved.

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    1
    Citation
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  • Humidity-dependent stability of amorphous germanium nitrides fabricated by plasma nitridation

    K. Kutsuki, G. Okamoto, T. Hosoi, T. Shimura, H. Watanabe

    Appl.Phys. Lett.   91 ( 16 )  2007.10  [Refereed]

    　View Summary

    We have investigated the stability of amorphous germanium nitride (Ge3N4) layers formed by plasma nitridation of Ge (100) surfaces using x-ray photoelectron spectroscopy and atomic force microscopy. We have found that humidity in the air accelerates the degradation of Ge3N4 layers and that under 80% humidity condition, most of the Ge-N bonds convert to Ge-O bonds, producing a uniform GeO2 layer, within 12 h even at room temperature. After this conversion of nitrides to oxides, the surface roughness drastically increased by forming GeO2 islands on the surfaces. These findings indicate that although Ge3N4 layers have superior thermal stability compared to the GeO2 layers, Ge3N4 reacts readily with hydroxyl groups and it is therefore essential to take the best care of the moisture in the fabrication of Ge-based devices with Ge3N4 insulator or passivation layers. (C) 2007 American Institute of Physics.

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    22
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  • Selective Epitaxial Growth of In-situ Carbon-Doped Si on Si Substrates

    T. Ikuta, S. Fujita, H. Iwamoto, S. Kadomura, T. Shimura, H. Watanabe, K. Yasutake

    Extended Abstracts of International 21st Century COE Symposium on Atomistic Fabrication Technology 2007   40 ( 6-7 ) 1122 - 1125  2007.10  [Refereed]

    　View Summary

    The characteristics of in situ carbon-doped Si fabricated by selective epitaxial growth (SEG) were investigated. We confirmed the good selectivity, high crystalline quality, high strain and constant carbon profile of the film. The high ratio of the concentration of carbon atoms located at the substitutional sites to that of the total carbon atoms was achieved at low-temperature SEG. Copyright (C) 2008 John Wiley & Sons, Ltd.

    DOI

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    1
    Citation
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  • Enhanced Electrical Properties of TiN/HfSiON Gate Stacks by Using the PVD-based In-situ Fabrication Method

    N. Kitano, H. Arimura, S. Horie, T. Minami, M. Kosuda, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of International 21st Century COE Symposium on Atomistic Fabrication Technology 2007    2007.10  [Refereed]

  • Interface Properties of HfTiSiO Gate Dielectrics Formed by In-Situ PVD-Based Fabrication Method

    H. Arimura, S. Horie, T. Minami, N. Kitano, M. Kosuda, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of International 21st Century COE Symposium on Atomistic Fabrication Technology 2007    2007.10  [Refereed]

  • Systematic Study on Interface Dipole of Metal/High-k Gate Stacks

    Y. Kita, S. Yoshida, T. Hosoi, T. Shimura, H. Watanabe, K. Shiraishi, Y. Nara, K. Yamada

    Extended Abstracts of International 21st Century COE Symposium on Atomistic Fabrication Technology 2007    2007.10  [Refereed]

  • Proposal of AION/SiO2 Layered Gate Dielectric for SiC MOS Devices

    M. Harada, Y. Watanabe, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of International 21st Century COE Symposium on Atomistic Fabrication Technology 2007    2007.10  [Refereed]

  • Thermal Stability of Pure Ge3N4 Dielectric Layers Formed by High-Density Plasma Nirridation

    K. Kutsuki, G. Okamoto, T. Hosoi, T. Shimura, H. Watanabe

    Extended Abstracts of International 21st Century COE Symposium on Atomistic Fabrication Technology 2007    2007.10  [Refereed]

  • Characterization of Pure Ge3N4 Dielectric Layers Formed by High-Density Plasma Nitridation

    K. Kutsuki, G. Okamoto, T. Hosoi, T. Shimura, K. Yasutake, H. Watanabe

    Extended Abstracts of the 2007 International Conference on SOLID STATE DEVICES AND MATERIALS, TSUKUBA, 2007   47 ( 4 ) 2415 - 2419  2007.09  [Refereed]

    　View Summary

    We have demonstrated the direct nitridation of Ge substrates to obtain pure germanium nitrides (Ge3N4). Physical characterization revealed that 3.5-nm-thick amorphous Ge3N4 layers with smooth surfaces and abrupt nitride/Ge interfaces were formed by the high-density plasma nitridation of Ge(100) substrates. We have investigated the thermal stability of the Ge3N4 layers, and found that the nitride was stable up to 550 degrees C and started to decompose around 580 degrees C under an N-2 ambient, while maintaining smooth nitride surfaces during thermal decomposition. We also found that vacuum annealing did not affect the decomposition temperature and that nitrogen was the only desorption species during Ge3N4 decomposition, which led to the regrowth of smooth and crystalline Ge surfaces after the nitrides had been completely removed at 700 degrees C. These results demonstrate both the superior thermal stability of pure Ge3N4 as a gate insulator and feasibility of using nitride as a surface passivation layer in the fabrication of Ge-based devices.

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    29
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  • In-situ Doped Si Selective Epitaxial Growth for Raised Source/Drain Extension CMOSFET

    T. Ikuta, Y. Miyanami, S. Fujita, H. Iwamoto, S. Kadomura, T. Shimura, H. Watanabe, K. Yasutake

    Extended Abstracts of the 2007 International Conference on SOLID STATE DEVICES AND MATERIALS, TSUKUBA, 2007    2007.09  [Refereed]

  • Low Threshold Voltage Gate-First pMISFETs with Poly-Si/TiN/HfSiON Stacks Fabricated with PVD-based In-situ Solid Phase Interface Reaction(SPIR) Method

    N. Kitano, H. Arimura, S. Horie, T. Hosoi, T. Shimura, H. Watanabe, T. Kawahara, S. Sakashita, Y. Nishida, J. Yugami, T. Minami, M. Kosuda

    Extended Abstracts of the 2007 International Conference on SOLID STATE DEVICES AND MATERIALS TSUKUBA, 2007   2007   12 - 13  2007.09  [Refereed]

    CiNii

  • Suppression of surface segregation and heavy arsenic doping into silicon during selective epitaxial chemical vapor deposition under atmospheric pressure

    Tetsuya Ikuta, Shigeru Fujita, Hayato Iwamoto, Shingo Kadomura, Takayoshi Shimura, Heiji Watanabe, Kiyoshi Yasutake

    Appl. Phys. Lett.   91 ( 9 )  2007.08  [Refereed]

    　View Summary

    The authors investigated the effects of the growth rate and temperature on the surface segregation during in situ As-doped selective epitaxial growth under atmospheric pressure. It was confirmed that high growth rate and high temperature suppress surface segregation. A film with a high As concentration (7.5x10(19) at./cm(3)) and a smooth surface was obtained by optimizing these conditions.

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    6
    Citation
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  • Formation and characterization of Ge3N4 thin layers

    K. Kutsuki, G. Okamoto, T. Hosoi, T. Shimura, K. Yasutake, H. Watanabe

    Formation and characterization of Ge3N4 thin layers    2007.06  [Refereed]

  • Impact of Physical Vapor Deposition-Based In situ Fabrication Method on Metal/High-k Gate Stacs

    H.Watanabe, S. Horie, T.Minami, N. Kitano, M. Kosuda, T. Shimura, K. Yasutake

    Jpn. J. Appl. Phys.   46 ( 4B ) 1910 - 1915  2007.04

    　View Summary

    We proposed an in situ method for fabricating metal/high-k gate stacks. High-quality Hf silicate gate dielectrics were formed by utilizing a solid phase interface reaction (SPIR) between a metal Hf layer and an SiO2 underlayer, and TiN electrodes were continuously grown on the gate dielectrics using a low-damage sputtering system without exposure to air. We investigated the optimum SPIR conditions for TiN/HfSiO gate stacks, such as the thicknesses of the metal Hf and oxide underlayers, in situ annealing temperature, and oxygen pressure. The results indicate that the in situ method can be used to precisely control the SPIR to form silicate films and improve the electrical properties at metal/high-k interfaces. We demonstrated that the scaling of equivalent oxide thickness (EOT) was achieved and that the carbon impurity content at the gate stacks was successfully reduced by in situ silicate formation and continuous electrode deposition. As a consequence, we obtained excellent EOT versus gate leakage characteristics and succeeded in improving the hysteresis of capacitance-voltage curves for the TiN/ HfSiO gate stacks.

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    16
    Citation
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  • Atmospheric In situ Arsenic-Doped SiGe Selective Epitaxial Growth for Raised-Extension N-type Metal-Oxide-Semiconductor Field-Effect Transistor

    T. Ikuta, Y. Minami, S. Fujita, H. Iwamoto, S. Kadomura, T. Shimura, H. Watanabe, K. Yasutake

    Jpn. J. Appl. Phys.   46 ( 4B ) 1916 - 1920  2007.04

    　View Summary

    We have investigated the AsH3 and GeH4 flow rate dependences of As concentration and growth rate for atmospheric in situ As-doped SiGe selective epitaxial growth. A high As concentration of 3.2 x 10(19) atoms/sm(3) and a high growth rate of 13 nm/min were achieved for Si0.79Ge0.21 selective epitaxial growth. The good selectivity was confirmed, and the epitaxial film showed high crystalline quality, a smooth Surface and. an abrupt change in the dopant profile at the interface. These results were interpreted in terms of the suppression of As surface segregation and the enhancement of As diffusion due to Ge incorporation in Si growth.

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    12
    Citation
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  • Investigation of 4H-SiC MIS Devices with AlON/SiO2 Layered Structures.

    M. Harada, Y. Watanabe, S. Okda, T. Shimura, K. Yasutake, H. Watanabe

    Abstracts of 2007 MRS Spring Meeting    2007.04

  • Systematic Study on Effective Work Function Instability of Metal/High-k Gate Stacks.

    Y.Kita, S. Yoshida, T. Shimura, K. Yasutake, H. Watanabe, K. Shiraishi, Y. Nara, K. Yamada

    Abstracts of 2007 MRS Spring Meeting    2007.04

  • Characterization of TiN/HfSiON gate stacks fabricated by the PVD-based in-situ method

    H. Arimura, S. Horie, T. Minami, N. Kitano, M. Kosuda, T. Shimura, K. Shiraishi, H. Watanabe

    Extended Abstracts of 2007 IMFEDK International Meeting for Future of Electron Devices,Kansai    2007.04

  • Electric properties of 4H-SiC MIS devices with AlON/SiO2 stacked gate dielectrics

    Y. Watanabe, M. Harada, S. Okada, T. Shimura, K. Yasutake, H. Watanabe

    Extended Abstracts of 2007 IMFEDK International Meeting for Future of Electron Devices,Kansai    2007.04

  • Heavy arsenic doping of silicon grown by atmospheric pressure selective epitaxial cheical vapor deposition

    T.Ikuta, Y. Miyanami, S.Fujita, H. Iwamoto, S. Kadomura, T. Simura, H. Watanabe, K. Yasutake

    Science and Technology of Advanced Marerials   8 ( 3 ) 142 - 145  2007.03  [Refereed]

    　View Summary

    Selective epitaxial Si with a high arsenic concentration of 2.2 x 10(19) atoms/cm(3) was deposited at a high growth rate of 3.3 nm/min under atmospheric pressure. It was confirmed that this method had excellent selectivity and produced. films having good crystalline quality, abrupt dopant profiles at the interfaces, and smooth surfaces. The growth mechanism is discussed in terms of the relationship between the effects of arsenic surface segregation and etching by hydrogen chloride. (C) 2007 NIMS and Elsevier Ltd. All rights reserved.

    DOI

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    8
    Citation
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  • Structural Analysis of Buried Oxide Layer by Synchrotron X-ray Diffraction

    Takayoshi Shimura

       2007.03  [Invited]

  • Novel In-situ Fabrication Method for High-quality metal/High-k Gate Stacks by Utilizing Low-damage Sputtering System

    H. Wtanabe, T. Shimura, T. Minami, N. Kitano, M. Kosuda

    CANON ANELVA CORPORATION Technical Reports   13   5 - 11  2007.03  [Refereed]

    CiNii

  • Residual Order in the Interfacial SiO2 Layer between a High-k Material and a Si Substrate

    Takayoshi SHIMURA, Eiji MISHIMA, Kohta KAWAMURA, Heiji WATANABE, Kiyoshi YASUTAKE

    Photon Factory Activity Report 2005    2007.02

  • Study on Interface Reactions of HfSix/HfO2/Si Gate Stacks for Advanced nMOSFET Application

    Yuki Kita, Shinichi Yoshida, Takashi Ando, Kaori Tai, Hayato Iwamoto, Takayoshi Shimura, Heiji Watanabe, Kiyoshi Yasutake

    Extended Abstracts of the 12th Workshop on Gate Stack Technology and Physics    2007.02

  • Observation and Mechanism of Self-limiting Oxidation of SiGe/SOI structure

    Takayoshi Shimura, Michihiro Shimizu, Shinichiro Horiuchi, Heiji Watanabe, Kiyoshi Yasutake, Masataka Umeno

    Extended Abstracts of the 12th Workshop on Gate Stack Technology and Physics    2007.02

  • Structural and Electrical Properties of TiN/HfSiON Gate Stacks Fabricated by PVD-based In-situ Fabrication Method

    Shinya Horie, Takashi Minami, Naomu Kitano, Motomu Kosuda, Takayoshi Shimura, Kenji Shiraishi, Heiji Watanabe

    Extended Abstracts of the 12th Workshop on Gate Stack Technology and Physics    2007.02

  • High performance gate-first pMISFET with TiN/HfSiON gate stacks fabricated with PVD-based in-situ method

    Takaaki Kawahara, Yukio Nishida, Shinsuke Sakashita, Jiro Yugami, Naomu Kitano, Takashi Minami, Motomu Kosuda, Shinya Horie, Hiroaki Arimura, Takayoshi Shimura, Heiji Watanabe

    ECS Transactions   11 ( 4 ) 585 - 599  2007  [Refereed]  [Invited]

    　View Summary

    We could obtain high performance gate-first pMISFET with TiN/HfSiON gate stacks fabricated with PVD-based in-situ method. High-quality Hf silicate gate dielectrics were formed by utilizing a solid phase interface reaction (SPIR) between a metal Hf layer and an SiO2 underlayer, and TiN electrodes were continuously grown on the gate dielectrics using a low-damage sputtering system without exposure to air. Sufficiently high effective work function (WF = ∼ 4 8eV) of the TiN electrodes was achieved after activation annealing at 1050°C-spike The in-situ process was found to be effective to reduce carbon impurity of the gate stacks and we could improve device performance, such as drive current Ion, subthreshold swing S-value, and carrier mobility, Ion = 350μA/μm at Ioff = 200pA/μm could be obtained, which was a 13% improvement over ex-situ CVD-TiN on CVD-HfSiON. Moreover, this PVD-based in-situ method with moderate fluorine ion implantation into the substrate would reduce the threshold voltage Vth even more without deterioration of Ion. © The Electrochemical Society.

    DOI

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    2
    Citation
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  • High performance gate-first pMISFET with TiN/HfSiON gate stacks fabricated with PVD-based in-situ method

    Takaaki Kawahara, Yukio Nishida, Shinsuke Sakashita, Jiro Yugami, Naomu Kitano, Takashi Minami, Motomu Kosuda, Shinya Horie, Hiroaki Arimura, Takayoshi Shimura, Heiji Watanabe

    ECS Transactions   11 ( 4 ) 585 - 599  2007  [Refereed]  [Invited]

    　View Summary

    We could obtain high performance gate-first pMISFET with TiN/HfSiON gate stacks fabricated with PVD-based in-situ method. High-quality Hf silicate gate dielectrics were formed by utilizing a solid phase interface reaction (SPIR) between a metal Hf layer and an SiO2 underlayer, and TiN electrodes were continuously grown on the gate dielectrics using a low-damage sputtering system without exposure to air. Sufficiently high effective work function (WF = ∼ 4 8eV) of the TiN electrodes was achieved after activation annealing at 1050°C-spike The in-situ process was found to be effective to reduce carbon impurity of the gate stacks and we could improve device performance, such as drive current Ion, subthreshold swing S-value, and carrier mobility, Ion = 350μA/μm at Ioff = 200pA/μm could be obtained, which was a 13% improvement over ex-situ CVD-TiN on CVD-HfSiON. Moreover, this PVD-based in-situ method with moderate fluorine ion implantation into the substrate would reduce the threshold voltage Vth even more without deterioration of Ion. © The Electrochemical Society.

    DOI

    Scopus

    2
    Citation
    (Scopus)

  • Interface engineering by PVD-based in-situ fabrication method for advanced metal/high-k gate stacks

    Heiji Watanabe, Shinya Horie, Hiroaki Arimura, Naomu Kitano, Takashi Minami, Motomu Kosuda, Takayoshi Shimura, Kiyoshi Yasutake

    ECS Transactions   6 ( 3 ) 71 - 85  2007  [Invited]

    　View Summary

    We fabricated high-quality silicate gate dielectrics by utilizing a solid phase interface reaction (SPIR) between ultrathin metal layers and SiO 2 underlayers. Metal diffusion to the SiO2 underlayer forms a high-quality silicate interlayer, and preserving the initial SiO 2/Si bottom interface ensures good electrical properties. The Hf silicate dielectrics were fabricated by the SPIR method using Hf layers less than 0.5-nm-thick that were fully consumed by interface reactions, resulting in Hf silicate layers that remained amorphous after activation annealing. The superior electrical properties of the poly-Si/HfSixOy/SiO2/Si MOSFETs were demonstrated through low leakage current and high electron mobility. We also recently proposed a novel in-situ fabrication method that continuously fabricates high-k dielectrics using SPIR and metal electrodes with a low-damage sputtering system. We investigated structural and electrical properties of metal/high-k gate stacks and demonstrated the effectiveness of the in-situ method in improving electrical properties. © The Electrochemical Society.

    DOI

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    1
    Citation
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  • Interface engineering by PVD-based in-situ fabrication method for advanced metal/high-k gate stacks

    Heiji Watanabe, Shinya Horie, Hiroaki Arimura, Naomu Kitano, Takashi Minami, Motomu Kosuda, Takayoshi Shimura, Kiyoshi Yasutake

    ECS Transactions   6 ( 3 ) 71 - 85  2007

    　View Summary

    We fabricated high-quality silicate gate dielectrics by utilizing a solid phase interface reaction (SPIR) between ultrathin metal layers and SiO 2 underlayers. Metal diffusion to the SiO2 underlayer forms a high-quality silicate interlayer, and preserving the initial SiO 2/Si bottom interface ensures good electrical properties. The Hf silicate dielectrics were fabricated by the SPIR method using Hf layers less than 0.5-nm-thick that were fully consumed by interface reactions, resulting in Hf silicate layers that remained amorphous after activation annealing. The superior electrical properties of the poly-Si/HfSixOy/SiO2/Si MOSFETs were demonstrated through low leakage current and high electron mobility. We also recently proposed a novel in-situ fabrication method that continuously fabricates high-k dielectrics using SPIR and metal electrodes with a low-damage sputtering system. We investigated structural and electrical properties of metal/high-k gate stacks and demonstrated the effectiveness of the in-situ method in improving electrical properties. © The Electrochemical Society.

    DOI

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    1
    Citation
    (Scopus)

  • Physical and Electrical Characterization of HfSix/HfO2 Gate Stacks for High-Performance nMOSFET Application

    S. Yoshida, Y. Kita, T. Ando, K. Tai, H. Iwamoto, T. Shimura, H. Watanabe, K. Yasutake

    Abstracts of 37th IEEE Semiconductor Interface Specialists Conference 3-3.    2006.12

  • Structural Change of the Interfacial SiO$_2$ Layer between HfO$_2$ layers and Si Substrates

    Takayoshi Shimura, Eiji Mishima, Kohta Kawamura, Heiji Watanabe, Kiyoshi Yasutake

    Extended Abstracts of 2006 International Workshop on Dielectric Thin Films for Future ULSI Devices - Science and Technology    2006.11  [Refereed]

  • Low-Temperature Growth of Epitaxial Si Films by Atmospheric Pressure Plasma Chemical Vapor Deposition Using Porous Carbon Electrode

    H. Ohmi, H. Kakiuchi, N. Tawara, T. Wakamiya, T. Shimura, H. Watanabe, K. Yasutake

    Jpn. J. Appl. Phys.   45 ( 10 ) 8424 - 8429  2006.10  [Refereed]

    　View Summary

    The low-temperature growth of epitaxial Si films by atmospheric pressure plasma chemical vapor deposition (AP-PCVD) was investigated. A 150 MHz very high frequency (VHF) power supply was used to generate an atmospheric pressure plasma of gas mixtures containing He, H-2, and SiH4. Two types of electrode (i.e., cylindrical rotary and porous carbon electrodes) were used in plasma generation. When a cylindrical rotary electrode was used, polycrystalline Si growth was inevitable at the film edge on the upstream side. This is due to the variation in deposition rate along the gas flow direction, which is extremely high at the plasma/atmosphere interface on the upstream side. To solve this problem, we developed a novel porous carbon electrode where process. gas molecules are directly supplied into the plasma region through a porous carbon plate a distance (0.8 mm) away from the substrate surface. Using such a porous carbon electrode, we successfully grew a defect-free epitaxial Si film on the entire surface of a 4 in. Si wafer at 600 degrees C. The average growth rate was 0.25-0.3 mu m/min, which is as high as that obtained by thermal CVD at 900 degrees C. The epitaxial Si films grown at 600 degrees C were characterized by various methods, including transmission electron microscopy, atomic force microscopy, secondary ion mass spectrometry, and selective etching. The influence of adsorbed impurities in the porous carbon material on the quality of epitaxial Si films was also investigated.

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    40
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  • Interface Reactions at TiN/HfSiON Gate Stacks Depending on the Electrode Structure and Deposition Method

    S. Yoshida, Y. Watanabe, Y. Kita, T. Shimura, H. Watanabe, K. Yasutake, Y. Akasaka, Y. Nara, K. Yamada

    Extended Abstracts of International 21st Century COE Symposium on Atomistic Fabrication Technology, pp.147-148, Osaka, Japan.   8 ( 3 ) 219 - 224  2006.10  [Refereed]

    　View Summary

    We systematically investigated intrinsic and extrinsic thermal reactions at TiN/HfSiON gate stacks. The formation of an ultrathin TiO2 interlayer was found to be an intrinsic reaction at the metal/insulator interface, but growth of SiO2 underlayers between HfSiON and Si substrates, which determines the electrical thickness of metal-oxide-semiconductor (MOS) devices, depends on the structure and deposition method of the gate electrodes. Physical vapor deposition (PVD) grown TiN electrodes covered with W overlayers exhibited excellent thermal stability at up to 1000 degrees C. Formation of ultrathin TiO2 interlayers reduced gate leakage current (I-g), and growth of the oxide underlayer was suppressed by less than a few angstroms even for 1000 degrees C annealing. In contrast, we found that halogen impurities within CVD-grown metal electrodes enhance interface SiO2 growth, resulting in deterioration of equivalent oxide thickness (EOT) versus I-g characteristics of the gate stacks. (C) 2007 NIMS and Elsevier Ltd. All rights reserved.

    DOI

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    5
    Citation
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  • Oxidation Rate Diminidhment of SiGe Epitaxial Films on Silicon-on-insulator Wafers

    S. Horiuchi, M. Shimizu, T. Shimura, H. Watanabe, K. Yasutake

       2006.10  [Refereed]

  • Fabrication of Polycrystalline Thin Films on Glass Substrates Using Ge Nano-Islands and Nuclei

    K. Minami, C. Yoshimoto, H. Ohmi, T. Shimura, H. Kakiuchi, H. Watanabe, K. Yasutake

    Extenden Abstracts of International 21st Century COE Symposium on Atomistic Fabrication Technology 2006    2006.10  [Refereed]

  • Characterization of Epitaxial Si Films Grown at Low Temperatures by Atmospheric Pressure Plasma Chemical Vappor Deposition

    N. Tawara, H. Ohmi, Y. Terai, T. Shimura, H. Kakiuchi, H. Watanabe, Y. Fujiwara, K. Yasutake

    Extenden Abstracts of International 21st Century COE Symposium on Atomistic Fabrication Technology 2006    2006.10  [Refereed]

  • Structural Change of the Thermal Oxide Layer on Si Substrates by Diffusion of Atomic Oxygen

    Takayoshi Shimura, Eiji Mishima, Kohta Kawamura, Heiji Watanabe, Kiyoshi Yasutake

    Extended Abstracts of International 21st Century COE Symposium on Atomistic Fabrication Technology    2006.10

  • Oxidation Rate Diminishment of SiGe Epitaxial Films on Silicon-on-insulator Wafers

    S. Horiuchi, M. Shimizu, T. Shimura, H. Watanabe, K. Yasutake

    Extended Abstracts of International 21st Century COE Symposium on Atomistic Fabrication Technology, pp.155-156, Osaka, Japan.    2006.10  [Refereed]

  • Characterization of Epitaxial Si Films Grown at Low Temperatures by Atmospheric Pressure Plasma Chemical Vapor Deposition

    N. Tawara, H. Ohmi, Y. Terai, T. Shimura, H. Kakiuchi, H. Watanabe, Y. Fujiwara, K. Yasutake

    Extended Abstracts of International 21st Century COE Symposium on Atomistic Fabrication Technology, pp.69-70, Osaka, Japan.    2006.10  [Refereed]

  • Fabrication of Polycrystalline Thin Films on Glass Substrates Using Ge Nano-Islands and Nuclei

    K. Minami, C. Yoshimoto, H. Ohmi, T. Shimura, H. Kakiuchi, H. Watanabe, K. Yasutake

    Extended Abstracts of International 21st Century COE Symposium on Atomistic Fabrication Technology, pp.65-66, Osaka, Japan.    2006.10  [Refereed]

  • White X-ray Topography of Lattice Undulation in Bonded Silicon-on-Insulator Wafers

    Kazunori Fukuda, Takayoshi Yoshida, Takayoshi Shimura, Kiyoshi Yasutake, Masataka Umeno, Satoshi Iida

    Jpn. J. Appl. Phys.   45 ( 9 ) 6795 - 6799  2006.09

    　View Summary

    The lattice undulation of a silicon-on-insulator (SOI) layer in bonded SOI wafers was observed by-synchrotron white and monochromatic X-ray topographies. Pattern formation for white X-ray topography was discussed using the geometric relation among the Bragg streak and diffracted X-rays in reciprocal space. The diffraction images in white X-ray topographs were simulated using the angular distributions of the lattice inclination in SOI layers obtained by the analysis of monochromatic Xray topographs. The results of this simulation were in very good agreement with observations including the dependences on camera distance and SOI layer thickness, indicating that the contrast is mainly formed by the divergence/convergence effect of the diffracted X-rays.

    DOI

    Scopus

    1
    Citation
    (Scopus)

  • Self-limiting oxidation of SiGe alloy on silicon-on-insulator wafers

    Takayoshi Shimura, Michihiro Shimizu, Shinichiro Horiuchi, Heiji Watanabe, Kiyoshi Yasutake, Masataka Umeno

    Appl. Phys. Lett.   89 ( 11 )  2006.09

    　View Summary

    Self-limiting oxidation of SiGe alloy on silicon-on-insulator wafers was investigated. For oxidation at 1000 degrees C, oxidation stops completely after a few hours for the Si1-xGex (x=0.068-0.16) layers. For higher initial Ge concentrations of the SiGe layer, the oxidation saturated in a shorter oxidation time, whereas saturation was not observed for the oxidation at 900 and 1100 degrees C. The authors propose a model for self-limiting oxidation, in which the oxidation saturation is governed by an interfacial Ge-rich layer that depends on the oxidation temperature and the initial Ge concentration. (c) 2006 American Institute of Physics.

    DOI

    Scopus

    26
    Citation
    (Scopus)

  • A comparison of ultra-thin SiO2 films formed by hyperthermal O-atom beam and rapid thermal oxidation; synchrotron radiation photoemission and crystal truncation rod scattering study

    TAGAWA Masahito, YOKOTA Kumiko, YOSHIGOE Akitaka, TERAOKA Yuden, SHIMURA Takayoshi

    Applied Physics Letters   88, 133512  2006.09  [Refereed]

  • Application of Synchrotron X-ray Diffraction Methods to Thin Film Materials used in Semiconductor Devices

    Takayoshi Shimura, Eiji Mishima, Heiji Watanabe, Kiyoshi Yasutake

    Extended Abstract of International Meeting for Future of Electron Devices, Kansai    2006.04  [Invited]

  • メタル電極形成条件がMetal/HfSiON界面反応と電気特性に及ぼす影響

    吉田慎一, 渡辺康匡, 喜多祐起, 志村考功, 渡部平司, 安武潔, 赤坂泰志, 奈良安雄, 白石賢二, 山田啓作

    ゲートスタック研究会－材料・プロセス・評価の物理－（第11回研究会）    2006.02

  • Oxidation saturation of SiGe alloy on silicon-on-insulator wafers

    T. Shimura, M. Shimizu, S. Horiuchi, H. Watanabe, K. Yasutake

    ECS Transactions   3 ( 7 ) 1033 - 1037  2006

    　View Summary

    Oxidation saturation of SiGe alloy on silicon-on-insulator wafers was investigated. Oxidation saturates after a few hours for the Si 1-xGex (x=0.068-0.156) layers. For higher initial Ge concentrations of the SiGe layer, the oxidation saturated in a shorter oxidation time. We propose a model for oxidation saturation, in which the oxidation saturation is governed by an interfacial melting layer that has high Ge concentration. copyright The Electrochemical Society.

    DOI

    Scopus

  • Low-temperature Growth of Epitaxial Silicon films by Atmospheric Pressure Plasma Chemical Vapor Deposition

    Hiromasa Ohmi, Hiroaki Kakiuchi, Naotaka Tawara, Takuya Wakamiya, Takayoshi Shimura, Heiji Watanabe, Kiyoshi Yasutake

    Proceedings of the 6th ICRP and 23rd SPP    2006.01  [Refereed]

  • Effects of Intrinsic and Extrinsic Reactions at Metal/High-k Interfaces on Electrical Properties of Gate Stacks

    H. Watanabe, S. Yoshida, Y. Watanabe, E. Mishima, K. Kawamura, Y. Kita, T. Shimura, K. Yasutake, Y. Akasaka, Y. Nara, K. Shiraishi, K. Yamada

    Abstracts of 36th IEEE Semiconductor Interface Specialists Conference, 2005, Arlington, VA.    2005.12

  • Thermal Degradation of HfSiON Dielectrics Caused by TiN Gate Electrodes and Its Impact on Electrical Properties

    Heiji Watanabe, Shiniti Yoshida, Yasumasa Watanabe, Takayoshi Shimura, Kiyoshi Yasutake, Yasushi Akasaka, Yasuo Nara, Kunio Nakamura, Keisaku Yamada

    Extended Abstracts of the 2005 International Conference on Solid State Devices and Materials   45 ( 4 ) 2933 - 2938  2005.09

    　View Summary

    We studied thermal reactions in TiN/HfSiON gate stacks and discussed their impact on electrical properties. Physical analysis revealed that reactions at the metal/high-k interface form a polycrystalline TiO2 layer at 700 degrees C. The interface between the TiN electrode and the Ultrathin TiO2 interlayer remained smooth and the formation of this high-permittivity metal oxide layer did not cause any electrical degradation in terms of equivalent oxide thickness (EOT) versus gate leakage (I-g) characteristics. However, interface roughness and electrical degradation, such as increases in electrical thickness and interface-trap density, were present after annealing at 900 degrees C. At 1100 degrees C, we observed marked increases in EOT and I-g, which respectively indicated oxide (SiO2) growth at the bottom interface and dielectric degradation both of the interface TiO2 and HfSiON layers.

    DOI

    Scopus

    10
    Citation
    (Scopus)

  • Synchrotron X-ray Topography of Lattice Undulation of Bonded Silicon-on-Insulator Wafers

    Kazunori Fukuda, Takayoshi Yoshida, Takayoshi Shimura, Kiyoshi Yasutake, Masataka Umeno

    Jpn. J. Appl. Phys. Vol.43, No.3, 2004, 1081-1087   43 ( 3 ) 1081 - 1087  2004.03

    　View Summary

    Lattice undulation of Silicon-on-Insulator (SOI) layers of bonded SOI wafers was observed by synchrotron X-ray topography. Patterns observed on topographs depended on the thickness of the SOI layer, the camera distance between a specimen and an X-ray film. and the diffraction geometry of the Laue and Bragg cases. The dependence was interpreted as the effects of the geometrical relation in reciprocal space among the Ewald sphere, the reciprocal lattice vector, and the surface normal direction. To confirm the origin of the pattern formation, the topographic images were simulated in the framework of the kinematical diffraction theory. Based on the simulation, it was found that a granular pattern observed in the 115 Bragg case was due to the divergence/convergence effect of X-rays diffracted from the undulated SOI layer.

    DOI

    Scopus

    3
    Citation
    (Scopus)

  • Residual Order within Thermally Grown Amorphous SiO$_2$ on Crystalline Silicon

    K.Tatsumura, T.Watanabe, D.Yamasaki, T.Shimura, M.Umeno, I.Ohdomari

    Phys. Rev. B 69, 2004, 085212   69 ( 8 )  2004.02

    　View Summary

    The origin of x-ray diffraction peaks observed on the crystal truncation rods (CTR's) in reciprocal space for thermally grown SiO2 films has been investigated by large-scale atomistic simulation of silicon oxidation. Three models of SiO2 on Si(001), Si(111), and Si(113) were formed by introducing oxygen atoms in crystalline Si from the surfaces in an atom-by-atom manner. The SiO2 structures are classified as being amorphous in conventional characterizations, but retain the residual order originating from the {111} atomic planes in their parent crystals. The calculated diffraction patterns exhibit intensity peaks with Laue-function-like fringe profiles along the CTR's, at positions depending on the substrate orientations, agreeing quite well with experimental results.

    DOI

    Scopus

    45
    Citation
    (Scopus)

  • Large-scale atomistic modeling of thermally grown SiO(2) on Si(111) substrate

    K Tatsumura, T Watanabe, D Yamasaki, T Shimura, M Umeno, Ohdomari, I

    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS   43 ( 2 ) 492 - 497  2004.02  [Refereed]

    　View Summary

    Large-scale SiO(2)/Si(111) models were constructed by introducing oxygen atoms in c-Si models in an atom-by-atom manner. Molecular dynamics calculation at a constant temperature was repeatedly carried out for the growing oxide model. By comparing the oxidation simulation of Si(111) substrate with that of Si(001) substrate performed previously, the influence of substrate orientation on the oxide structure was discussed. Owing to the significant feature of bonding arrangement within a Si bilayer in the Si(111) substrate, the inherent stress induced at the SiO(2)/Si interface by oxygen insertions is originally higher for the Si(111) oxidation than for the Si(001) oxidation, resulting in frequent changes in the bonding network. The resulting structure of bulk SiO(2) on Si(111) has less strain and a lower density than that on Si(001), but involves a larger number of dangling bonds. The X-ray diffraction pattern calculated for the SiO(2)/Si(111) model exhibits a diffraction peak with a Laue-function-like profile on each of the crystal-truncation-rods from the 111 and 11 (1) over bar points, agreeing well with experimental results. These diffraction peaks indicate that the thermally grown SiO(2) retains the residual order emanating from the {111} atomic planes in the original c-Si. Because of differences in the angles between the surface and the {111} atomic planes, the residual order within the SiO(2) differs depending on the substrate orientation.

    DOI

    Scopus

    18
    Citation
    (Scopus)

  • Effects of Thermal History on Resudual Order of Thermally Grown Silicon Dioxide

    Kosuke Tatsumura, Takanobu Watanabe, Daisuke Yamasaki, Takayoshi Shimura, Masataka Umeno, Iwao Ohdomari

    Jpn. J. Appl. Phys. Vol.42 (2003) 7250-7255   42 ( 12 ) 7250 - 7255  2003.12

    　View Summary

    By simulation of silicon oxidation and measurement of X-ray crystal-truncation-rod (CTR) scattering, the structures of silicon dioxide films grown at different temperatures and the structural changes due to thermal annealing have been investigated. Large-scale SiO2/Si(001) models were formed by introducing oxygen atoms, atom-by-atom, in crystalline Si from the surfaces. Molecular dynamics (MD) calculation at a constant temperature was repeatedly carried out for the growing oxide model. The intensity and position of the extra diffraction peak observed for the oxide, correlating with the residual order emanating from the parent Si crystal, depend on the growth temperature and change after thermal annealing. The peak intensity becomes smaller with increasing growth temperature. Thermal annealing monotonically decreases the peak intensity and shifts the position along the CTR,. toward the lower angle side. There is a good agreement between the results of simulation and experiment. It is shown that (1) the oxide grown At a higher temperature has a lower degree of residual order, (2) thermal annealing decreases the residual order, ultimately leads to complete amorphization and never restores the ordering, and (3) the peak shift along the CTR corresponds to the volumetric expansion of the SiO2 in the surface-normal direction.

    DOI

  • Comparison of ordered structure in buried oxide layers in high-dose, low-dose, and ITOX SIMOX wafers

    Takayoshi Shimura, Kazunori Fukuda, Takuji Hosoi, Kiyoshi Yasutake, Masataka Umeno

    Photon Factory Activity Report, 20 (2003) 84    2003.11

  • Characterization of SOI Wafers by Large Area X-ray Topography

    Takayoshi Shimura, Eiji Mishima, Kiyoshi Yasutake, Shigeru Kimura, Masataka Umeno

    SPring-8 User Experiment Report No.10 (2002B) 125    2003.11

  • Characterization of SOI Wafers by X-ray Topography and Photoluminescence Method

    Takayoshi Shimura, Takayoshi Yoshida, Kazunori Fukuda, Kiyoshi Yasutake, Masataka Umeno

    SPring-8 User Experiment Report No.10 (2002B) 114    2003.06

  • Observation of SOI wafers by X-ray topography

    Takayoshi SHIMURA, Takayoshi YOSHIDA, Kazunori FUKUDA, Kiyoshi YASUTAKE

    Photon Factory Activity Report, 19 (2001) 213    2003.01

  • Quasi-amorphous structure in the thermal oxide layer on an Si(113) substrate

    Takayoshi SHIMURA, Takayoshi YOSHIDA, Kiyoshi YASUTAKE

    Photon Factory Activity Report, 19 (2001) 42    2003.01

  • Transmission-Diffraction and Total-Reflection X-ray Topography of Large-Diameter Silicon Wafers

    Seiji Kawado, Yoshimitsu Tsukasaki, Yoshifumi Suzuki, Yoshinori Chikaura, Kazunori Fukuda, Takayoshi Shimura, Yoshiharu Hirose, Ssatoshi Yamaguchi, Kentarou Kajiwara

    SPring-8 User Experiment Report No.9 (2002A) 129    2002.10

  • Development of X-ray Topography for the Characterization of SOI Wafers

    Takayoshi Shimura, Takayoshi Yoshida, Kazunori Fukuda, Masataka Umeno

    SPring-8 User Experiment Report No.9 (2002A) 119    2002.10

  • Structural Analysis of One-dimensional Quantum Structure in Ultra High Vacuum by X-ray Standing Wave Method

    Akira Ssaito, Tsunehisa Ohashi, Hiroyuki Takaki, Kenji Matoba, Wataru Yashiro, Kazushi Miki, Osami Sakata, Hiroo Tajiri, Takayoshi Shimura, Masatoki Ito, Kazushi Sumitani, Toshio Takahashi

    SPring-8 User Experiment Report No.9 (2002A) 96    2002.10

  • Reconstruction of Surface and Subsurface Layers of Pt(111) at 25K Studied by Surface X-ray Diffraction

    M. Nakamura, K. Sumitani, Xie Shaoxing, K. Tanaka, T. Shimura, A. Saito, M. Ito, O. Sakata, T. Takahashi

    SPring-8 User Experiment Report No.9 (2002A) 94    2002.10

  • Measurements of the Fractional-order Reflections of an Si(111) 7$\times$7 Reconstructed Surface

    Takayoshi Shimura, Kazunori Fukuda, Takayoshi Yoshida, Akira Saito, Osami Sakata, Masatoki Ito, Kazushi Sumitani, Toshio Takahashi

    SPring-8 User Experiment Report No.9 (2002A) 93    2002.10

  • Structural Study of Buried Oxide Layers in Implanted Si Wafers by X-ray Diffraction Technique

    Takayoshi Shimura, Masataka Umeno, Atsushi Ogura

    SPring-8 User Experiment Report No.9 (2002A) 92    2002.10

  • Atomic Structure of the Buried Oxide Layer in SIMOX Wafers

    Takayoshi Shimura, Takuji Hosoi, Kazunori Fukuda, Masataka Umeno

    Acta Cryst., A58 (2002) C349    2002.08

  • Study of Si$_{1-x}$Ge$_x$/Si-MBE Growth Process by Using an In-situ Ellipsometric Measurement

    Hiroyuki Hayashi, Satoshi Kamei, Tomonori Kohsaki, Takayoshi Shimura, Masataka Umeno

    Acta Cryst., A58 (2002) C347    2002.08

  • X-ray Topographic Observations of Bonded Silicon-on-insulator Wafers using Synchrotron Radiation

    Kazunori Fukuda, Takayoshi Yoshida, Takayoshi Shimura, Masataka Umeno, Satoshi Iida

    Acta Cryst., A58 (2002) C171    2002.08

  • X-ray Topography of Local-Strain Distribution in Silicon-On-Insulator Crystals in Comparison with X-ray Microbeam Measurement Results

    J. Matsui, Y. Tsusaka, Y. Yokoyama, H. Kurihara, K. Watanabre, M. Katou, Y. Kagoshima, S. Iida, T. Shimura, M. Umeno, K. Kajiwara

    SPring-8 User Experiment Report No.8 (2001B) 141    2002.05

  • Development of the Characterization Technique for Very Thin Crystals by White X-ray Laue Topography

    Takayoshi Shimura, Kazunori Fukuda, Takayoshi Yoshida, Masataka Umeno, Satoshi Iida

    SPring-8 User Experiment Report No.8 (2001B) 135    2002.05

  • X-ray Topographic Observation of Suraface-Strain Distribution in Large-Diameter Silicon Wafers

    Seiji Kawado, Yoshifumi Suzuki, Yoshimitsu Tsukasaki, Yoshinori Chikaura, Takayoshi Shimura, Kazunori Fukuda, Masataka Umeno, Kentarou Kajiwara, Yoshiharu Hirose, Daisuke Nakamura, Satoshi Iida

    SPring-8 User Experiment Report No.8 (2001B) 102    2002.05

  • Commissioning of the apparatus for analysis of a surface structure on an atomic scale by X-ray scattering and diffraction

    O. Ssakata, M. Nakamura, K. Sumitani, T. Shimura, A. Saito, T. Ohashi, H. Takagi, M. Ito, T. Takahashi

    SPring-8 User Experiment Report No.8 (2001B) 85    2002.05

  • Fabrication of Silicon Utilizing Mechanochemical Local Oxidation by Diamond Tip Sliding

    Miyake Shojiro, Kim Jongduk, SHIMURA Takayoshi, YASUTAKE Kiyoshi, UMENO Masataka

    Jpn J Appl Phys   40 ( 11 ) L1247 - L1249  2001.11

    　View Summary

    Nanoprotuberances and grooves were fabricated on a silicon surface by approximately 100-nm-radius diamond tip sliding using an atomic force microscope in atmosphere. To clarify the mechanical and chemical properties of these processed parts, changes in the protuberance and groove profiles due to additional diamond tip sliding and potassium hydroxide (KOH) solution etching were evaluated. Processed protuberances were negligibly removed, and processed grooves were easily removed by additional diamond tip sliding. The KOH solution selectively etched the unprocessed silicon area, while the protuberances, grooves and flat surfaces processed by diamond tip sliding were negligibly etched. Three-dimensional nanofabrication is performed in this study by utilizing these mechanochemically processed parts as a protective etching mask.

    DOI CiNii

  • Low Temperature Laue Topography of Oxygen Isotope Exchanged SrTiO$_3$

    Toru Ozaki, Kaoru Mizuno, Satoshi Iida, Takayoshi Shimura, Hirotaka Yamaguchi, Kentarou Kajiwara, Isao Fujimoto, Hiroyuki Okamoto, Masaru Tachibana, Ruiping Wang, Mitsuru Itoh, Yoshinori Chikaura

       2001.10

  • Plane Wave Synchrotron Radiation Topographic Observation of Grown-in Microdefects in Silicon Crystals

    Satoshi Iida, Yoshinori Chikaura, Junji Matsui, Takehiro Maehama, Seiji Kawado, Shigeru Kimura, Kentarou Kajiwara, Takayoshi Shimura, Kaoru Mizuno, Satoshi Yamaguchi, Masayuki Dedukuri

    SPring-8 User Experiment Report No.7 (2001A) 101    2001.10

  • Measurements of the Hihger-order Reflection from the Ordered SiO$_2$ in the Thermal Oxide Layer on Si Substrate

    Takayoshi Shimura, Kazunori Fukuda, Takayoshi Yoshida, Masataka Umeno

    SPring-8 User Experiment Report No.7 (2001A) 74    2001.10

  • Development of High Energy Synchrotron Radiation Lang Topography

    S. Kimura, Y. Chikaura, K. Kajiwara, J. Matsui, S. Iida, T. Shimura, K. Mizuno

    SPring-8 User Experiment Report No.6 (2000B) 110    2001.05

  • Far Field Observation of Plane Wave Synchrotron Radiation Topographic images

    Satoshi Iida, Yoshinori Chikaura, Seiji Kawado, Shigeru Kimura, Kentarou Kajiwara, Takehiro Maehama, Sataoshi Ymaguchi, Masayuki dedukuri, Takayoshi Shimura, Junji Matsui, Kaoru Mizuno

    SPring-8 User Experiment Report No.6 (2000B) 85    2001.05

  • Characterization of 300mm-diameter Silicon Crystals by Large-Area X-ray Topography

    Seiji Kawado, Satoshi Iida, Satoshi Yamaguchi, Jun-ichi Yoshimura, Kaoru Mizuno, Takayoshi Shimura, Toru Ozaki, Kentarou Kajiwara, Junji Matsui

    SPring-8 User Experiment Report No.6 (2000B) 85    2001.05

  • X-ray Diffraction Measurements of Internal Strain in Si Nanostructure

    Takayoshi Shimura, Kaunori Fukuda, Yutaka Yamazaki, Takayoshi Yoshida, Masataka Umeno, Masao Nagase

    SPring-8 User Experiment Report No.6 (2000B) 62.    2001.05

  • X-ray Scattering from Si Nanostructures

    Takayoshi Shimura, Takuji Hosoi, Masataka Umeno, Masao Nagase, NTT, Basic Research Laboratories

       2000.11

    　View Summary

    【工学部論文データから移行】

  • Assessment and Instrumentation on the high-temperature SXR Topography in the BL28B2 Station

    Yoshinori Chikaura, Kyushu, Institute of Technology, Kentarou Kajiwara, Kyushu, Institute of Technology, Satoshi Iida, Toyama University, Kaoru Mizuno, Shimane University, Seiji Kawado, Rigaku Corporation, Yoshifumi Suzuki (Kyushu, Institute of Technology, Toru Tanaka, Kyushu, Institute of Technology, Junji Matsui, Himeji Institute of Technology, Masataka Umeno, Toru Ozaki, Hiroshima, Institute of Technology, Takayoshi Shimura, Kunihide Izumi, Kyoto University, Shigeru Kimura, NEC corporation

       2000.10

    　View Summary

    【工学部論文データから移行】

  • Development of Low Temperature Laue Topography at BL28B2

    Toru Ozaki, Hiroshima, Institute of Technology, Kentarou Kajiwara, Kyushu, Institute of Technology, Kaoru Mizuno, Shimane University, Satoshi Iida, Toyama University, Isao Fujimoto, Hiroshima, Institute of Technology, Jun-ichi Yoshimura, Yamanashi University, Yoshinori Chikaura (Kyushu Institute of Technology, Takayoshi Shimura, Masaru Tachibana, Yokohama University, Shigeru Kimura, NEC corporation, Kunihide Izumi, Kyoto University, Yoshifumi Suzuki (Kyushu, Institute of Technology, Junji Matsui, Himeji Institute of Technology, Seiji Kawado, Rigaku Corporation, Koichi Kawakaki, Niihama National, College of Technology, Masataka Umeno

       2000.10

    　View Summary

    【工学部論文データから移行】

  • Detection of Microdefects in Si Crystals by means of High-energy Section Topography

    Shigeru Kimura, NEC corporation, Kentarou Kajiwara, Kyushu, Institute of Technology, Kaoru Mizuno, Shimane University, Satoshi Iida, Toyama University, Takayoshi Shimura, Kenji Yokoyama, Himeji, Institute of Technology, Masato Urakawa, Himeji, Institute of Technology, Yasuo Tsusaka, Himeji, Institute of Technology, Junji Matsui, Himeji Institute of Technology, Yoshinori Chikaura (Kyushu Institute of Technology

       2000.10

    　View Summary

    【工学部論文データから移行】

  • Development of Large-Area X-ray Topography to Observe 300mm-diameter Silicon Crystal

    Seiji Kawado, Rigaku Corporation, Satoshi Iida, Toyama University, Ken-ichiro Ishikawa, Toyama University, Yoshinori Chikaura (Kyushu Institute of Technology, Yoshifumi Suzuki (Kyushu, Institute of Technology, Kentarou Kajiwara, Kyushu, Institute of Technology, Shigeru Kimura, NEC corporation, Junji Matsui, Himeji Institute of Technology, Masataka Umeno, Takayoshi Shimura, Kaoru Mizuno, Shimane University, Toru Ozaki, Hiroshima, Institute of Technology, Kunihide Izumi, Kyoto Uni

       2000.10

    　View Summary

    【工学部論文データから移行】

  • Development of High Energy Synchrotron Radiation Topography

    Sataoshi Iida, Toyama University, Yoshinori Chikaura (Kyushu Institute of Technology, Seiji Kawado, Rigaku Corporation, Shigeru Kimura, NEC Corporation, Kentarou Kajiwara, Kyushu, Institute of Technology, Takayoshi Shimura, Kunihide Izumi, Kyoto University, Koichi Kawasaki, Niihama National, College of Technology, Ienichiro Ishikawa, Toyama University, Junji Matsui, Hemeji Institute of Technology, Yoshifumi Suzuki (Kyusyu Institute of Technology, Kaoru Mizuno, Shimane University, Toru Ozaki, Hiroshima, Institute of Technology, Masataka Umeno

       2000.10

    　View Summary

    【工学部論文データから移行】

  • Effects of the Electrical Stress on the Ordered Structure in the Thernal Oxide Layer on Si Substrates

    Takayoshi Shimura, Takuji Hosoi, Masataka Umeno

       2000.10

    　View Summary

    【工学部論文データから移行】

  • The Crystalline SiO$_2$ Phase in the BOX Layer of SIMOX Wafers

    Takayoshi Shimura, Takuji Hosoi, Masataka Umeno

       2000.03

    　View Summary

    【工学部論文データから移行】

  • Ordered SiO$_2$ Structure in the Buried Oxide of SIMOX SOI Wafers

    Takayoshi Shimura, Takuji Hosoi, Masataka Umeno

    PHYSICS AND CHEMISTRY OF SIO2 AND THE SI-SIO2 INTERFACE - 4   2000 ( 2 ) 241 - 249  2000.03

    　View Summary

    【工学部論文データから移行】

  • Ordered Structure in Buried Oxide Layers of SIMOX Wafers

    Takayoshi Shimura, Takuji Hosoi, Masataka Umeno

       1999.11

    　View Summary

    【工学部論文データから移行】

  • Ordered Structure in Buried Oxide Layers of SIMOX Wafers

    Takayoshi Shimura, Takuji Hosoi, Masataka Umeno

       1999.10

    　View Summary

    【工学部論文データから移行】

  • In-situ Radical Beam Oxidation of MBE-Si Grown on a Hydrogen Terminated Si(111)

    Masataka Umeno, Yoshifumi Yoshioka, Takahiro Mura, Kouzoh Mizobata, Takayoshi Shimura

       1999.08

    　View Summary

    【工学部論文データから移行】

  • Atomic Structure of the Thermal Oxide Layers on Si(001), (111), and (110) Wafers

    Takayoshi Shimura, Masataka Umeno

       1999.08

    　View Summary

    【工学部論文データから移行】

  • X-ray Scattering from the Crystalline SiO$_2$ in Buried Oxide Layers of SIMOX Wafers

    Takuji Hosoi, Takayoshi Shimura, Masataka Umeno

       1999.08  [Refereed]

    　View Summary

    【工学部論文データから移行】

  • Analysis of Ordered Structure of Buried Oxide Layers in SIMOX Wafers

    Takayoshi Shimura, Takuji Hosoi, Masataka Umeno

    PROCEEDINGS OF THE NINTH INTERNATIONAL SYMPOSIUM ON SILICON-ON-INSULATOR TECHNOLOGY AND DEVICES   99 ( 3 ) 155 - 160  1999.05  [Refereed]

    　View Summary

    【工学部論文データから移行】

  • Preliminary Experiments of Surface and Interface in BL09XU

    Shinichiro Nakatani, ity of Tokyo, Wataru Yashiro, rsity of Tokyo, Shuji Kusano, sity of Tokyo, Toshio Takahashi, rsity of Tokyo, Takayoshi Shimura, Akira Saito, Yashuharu Kashihara (Japan Synchrotron Radiation Research Institute, Makina Yabashi, Japan, Synchrotron Radiation, Research Institute, Nobuo Kashiwagura, Gifu University, Yoshikazu Fujii, Kobe Uni, Masatoki Ito, Keio Un, Munehiro Sugiyama, NTT Cooporation, Masamitsu Takahasi, Japan Synchrotron Radiation Research Institute, Yoshitaka Yoda, sity of Toky

       1999.03

    　View Summary

    【工学部論文データから移行】

  • Effects of Post-oxidation Anneal on the Ordered SiO$_2$ in the Thermal Oxide Layers on Si(001) Surfaces

    Takayoshi Shimura, Hiroo Sensui, Masataka Umeno

       1998.12  [Invited]

    　View Summary

    【工学部論文データから移行】

  • SOIウェーハの埋め込み酸化層からのX線散乱

    志村 考功, 細井 卓治, 江尻 理帆, 梅野 正隆

    日本結晶学会誌   40   175 - 175  1998

    DOI CiNii

  • Observation of a distributed epitaxial oxide in thermally grown SiO2 on Si(001) - Comment

    T Shimura, M Umeno, Takahashi, I, J Harada

    PHYSICAL REVIEW LETTERS   79 ( 24 ) 4932 - 4932  1997.12  [Refereed]

  • Thermally oxidized layers on Si wafers –surface X-ray scattering and field ion microscopy-

    J. Harada, I. Takahashi, T. Shimura, M. Umeno

    Advances in the understanding of crystal growth mechanism     247 - 266  1997  [Refereed]

  • Structure of Thermal Oxide on (111) and (011) Si Wafers

    Takayoshi Shimura, Hiroo Sensui, Masataka Umeno

       1996.11  [Invited]

    　View Summary

    【工学部論文データから移行】

  • X-ray Diffraction Evidence for Crystalline SiO$_2$ in Thermal Oxide Layers on Si Substrates

    Takayoshi Shimura, Isao Takahashi, Kwansei Gakuin University, Jimpei Harada, Rigaku Corporation, Masataka Umeno

    PHYSICS AND CHEMISTRY OF SIO(2) AND THE SI-SIO(2) INTERFACE-3, 1996   96 ( 1 ) 456 - 467  1996.05

    　View Summary

    【工学部論文データから移行】

  • X-ray Scattering from Microcrystalinity in the Thermally Oxidized SiO$_{2}$ Thin Films on Si(110) Surfaces

    Takayoshi Shimura, Ryouji Kojima, Hiroshi Misaki, Masataka Umeno

       1995.11

    　View Summary

    【工学部論文データから移行】

  • X-ray crystal fruncation rod scattering from MRE grown (CaF┣D22┫D2-SrF┣D22┫D2)/Si(III) superlattices(共著)

    SHIMURA Takayoshi

       1994

    　View Summary

    【国立情報学研究所情報から移行】

▼display all

Books and Other Publications

  • Epitaxially Ordered Structure in the Buried Oxide Layer of SIMOX Waters

    The Physics and Chemistry of SiO2 and the Si-SiO2 Interface 4,(The Electrochemical Society, INC)  2000

  • Analysis of Orderd Structure of Buried Oxide Layers in SIMOX Waters

    SILICON-ON-INSULATOR TECHNOLOGY AND DEVICES (]G0001[) (]G0010[)(THE ELECTROCHEMICAL SOCIETY, INC)  1999

  • Advances in the Understanding of Crystal Growth Mechanisms

    Takayoshi Shimura( Part： Contributor)

    Elsevier Science  1997.03

  • Thermally Oxidized Layers on Si-wafers-Surface X-ray Scattering and Field Ion Microscopy-(共著)

    Advances in the Understanding of Crystal Gronth Mechanisms  1997

  • Structure of thermal Oxide on(111)and(011)Si Wafers(共著)

    Advanced Science and Technology of Silicon Materials  1996

  • X-RAY DIFFRACTION EVIDENCE FOR CRYSTALLINE SiO2 IN THERMAL OXIDE LAYERS ON Si SUBSTRATES(共著)

    The Physics and Chemistry of SiO2 and the Si-SiO2 Interface 3  1996

  • X-RAY DIFFRACTION EVIDENCE FOR CRYSTALLINE SiO┣D22┫D2 IN THERMAL OXIDE LAYERS ON Si SUBSTRATES(共著)

    志村考功

    1996

  • characterization of the Surface of Ice Crystal by X-Ray CTR Scattering(共著)

    Physics and Chemistry of Ice  1992

  • X-ray Scattering Study of the Thermally Oxidized layer on a Si(001)Water(共著)

    Advanced Science and Technology of Silicon Materials  1991

▼display all

Works

  • ガラス基板表面の核形成点制御による大粒径多結晶薄膜形成法の開発

    2004
    -
    　

  • 原子論的生産技術の創出拠点

    2004
    -
    　

  • X線を用いた酸化Siナノ構造の歪みの定量解析

    1999
    -
    　

  • ナノメータ・デバイス対応のSOIウェーハに対する極限評価技術の開発

    1999
    -
    　

  • Characterization of Oxidized Si Nano-structure by X-ray Dittraction

    1999
    -
    　

  • Ultimate Characterization Technique of Silicon Crystal for the Nano-meter LSI Devices

    1999
    -
    　

▼display all

Presentations

  • Fabrication and Luminescence Characterization of Uniaxial Tensile-strained Ge Wires using Internal Stress in Metal Thin Films

    T. Shimura, S. Tanaka, H. Watanabe, T. Hosoi

    The 19th International Conference on Defects-Recognition, Imaging and Physics in Semiconductors (DRIP19) 

    Presentation date： 2022.08

    Event date：
    2022.08
    -
    2022.09

  • 犠牲酸化プロセスによる SiC MOSFET の電気特性劣化

    八軒 慶慈, 藤本 博貴, 小林 拓真, 平井 悠久, 染谷 満, 岡本 光央, 志村 考功, 渡部 平司

    第71回応用物理学会春季学術講演会  (東京) 

    Presentation date： 2024.03

    Event date：
    2024.03
    　
    　

    　View Summary

    23p-52A-10

  • Si基板上GeSn細線のレーザー溶融結晶化における下地SiO2膜厚とレーザー走査速度の最適化

    早川 雄大, 近藤 優聖, 國吉 望月, 小林 拓真, 志村 孝功, 渡部 平司

    第71回応用物理学会春季学術講演会  (東京) 

    Presentation date： 2024.03

    Event date：
    2024.03
    　
    　

    　View Summary

    23p-22A-3

  • 低温追酸化によるSiO2/SiC界面発光中心の密度制御と電気特性との相関

    大西 健太郎, 中沼 貴澄, 田原 康佐, 朽木 克博, 志村 考功, 渡部 平司, 小林 拓真

    第71回応用物理学会春季学術講演会  (東京) 

    Presentation date： 2024.03

    Event date：
    2024.03
    　
    　

    　View Summary

    23p-52A-17

  • 第一原理計算に基づく4H-SiC中酸素関連欠陥の系統的調査

    岩本 蒼典, 志村 考功, 渡部 平司, 小林 拓真

    第71回応用物理学会春季学術講演会  (東京) 

    Presentation date： 2024.03

    Event date：
    2024.03
    　
    　

    　View Summary

    23p-52A-16

  • Optimization of Laser Scanning Conditions and Thickness of SiO2 Underlayer in Laser-induced Liquid-phase Crystallization of GeSn Wires on Si substrates

    Presentation date： 2024.02

    Event date：
    2024.01
    -
    2024.02

  • 量子技術応用に向けたSiC MOS界面単一光子源の制御

    中沼 貴澄, 田原 康佐, 朽木 克博, 志村 考功, 渡部 平司, 小林 拓真  [Invited]

    応用物理学会 先進パワー半導体分科会 第10回講演会  (金沢) 

    Presentation date： 2023.12

    Event date：
    2023.11
    -
    2023.12

    　View Summary

    VII-2, 昨年度奨励賞受賞記念講演（依頼講演）

  • SiO2とSiCの直接貼り合わせによるSiO2/SiC構造の形成

    神畠 真治, 小林 拓真, 志村 考功, 渡部 平司

    応用物理学会 先進パワー半導体分科会 第10回講演会  (金沢) 

    Presentation date： 2023.11

    Event date：
    2023.11
    -
    2023.12

    　View Summary

    IA-9

  • ゲートストレス印加によるSiC MOS界面の劣化とデバイス特性への影響

    小柳 香穂, 小林 拓真, 平井 悠久, 染谷 満, 岡本 光央, 志村 考功, 渡部 平司

    応用物理学会 先進パワー半導体分科会 第10回講演会  (金沢) 

    Presentation date： 2023.11

    Event date：
    2023.11
    -
    2023.12

    　View Summary

    IA-20

  • プラズマ窒化・SiO2堆積・CO2熱処理の複合プロセスによる高品質SiC MOS構造の形成

    藤本 博貴, 小林 拓真, 志村 考功, 渡部 平司

    応用物理学会 先進パワー半導体分科会 第10回講演会  (金沢) 

    Presentation date： 2023.11

    Event date：
    2023.11
    -
    2023.12

    　View Summary

    IA-13

  • SiO2/GaOx/GaN構造の固定電荷に対するポストアニールの効果

    荒木 唯衣, 小林 拓真, 冨ケ原 一樹, 野﨑 幹人, 志村 考功, 渡部 平司

    応用物理学会 先進パワー半導体分科会 第10回講演会  (金沢) 

    Presentation date： 2023.11

    Event date：
    2023.11
    -
    2023.12

    　View Summary

    IA-12

  • Below-gap光照射によるn型GaN MOS 界面の正孔トラップ評価

    冨ケ原 一樹, 小林 拓真, 野﨑 幹人, 志村 考功, 渡部 平司

    応用物理学会 先進パワー半導体分科会 第10回講演会  (金沢) 

    Presentation date： 2023.11

    Event date：
    2023.11
    -
    2023.12

    　View Summary

    IA-11

  • 低温追酸化プロセスによるSiO2/SiC界面単一光子源の形成

    大西 健太郎, 中沼 貴澄, 田原 康佐, 朽木 克博, 志村 考功, 渡部 平司, 小林 拓真

    (金沢) 

    Presentation date： 2023.11

    Event date：
    2023.11
    -
    2023.12

    　View Summary

    IA-10

  • Effects of doped Mg concentrations on the reduction of hole traps in the vicinity of the SiO2/p-GaN MOS interface

    Hidetoshi Mizobata, Mikito Nozaki, Takuma Kobayashi, Takayoshi Shimura, Heiji Watanabe

    The 14th International Conference on Nitride Semiconductors (ICNS-14)  (Fukuoka) 

    Presentation date： 2023.11

    Event date：
    2023.11
    　
    　

    　View Summary

    TuP-ED-20

  • Hole Traps in SiO2/GaN MOS structures Evaluated by Below-gap Light Illumination

    Kazuki Tomigahara, Takuma Kobayashi, Mikito Nozaki, Takayoshi Shimura, Heiji Watanabe

    The 14th International Conference on Nitride Semiconductors (ICNS-14)  (Fukuoka) 

    Presentation date： 2023.11

    Event date：
    2023.11
    　
    　

    　View Summary

    TuP-ED-19

  • Characterizations of nitrogen profiles and interface properties in NO-nitrided SiO2/SiC(03̅38̅) structures

    Hayato Iwamoto, Takato Nakanuma, Hirohisa Hirai, Mitsuru Sometani, Mitsuo Okamoto, Takuma Kobayashi, Takayoshi Shimura, Heiji Watanabe

    2023 International Workshop on DIELECTRIC THIN FILMS FOR FUTURE ELECTRON DEVICES – SCIENCE AND TECHNOLOGY -  (Kanazawa) 

    Presentation date： 2023.10

    Event date：
    2023.10
    　
    　

  • 局所溶融結晶化GeSn PINダイオードの発光特性解析

    岩本 蒼典, 細井 卓治, 小林 拓真, 志村 考功, 渡部 平司

    第84回 応用物理学会秋季学術講演会  (熊本) 

    Presentation date： 2023.09

    Event date：
    2023.09
    　
    　

    　View Summary

    23a-A602-6

  • Below-gap光照射を用いたSiO2/p型GaN構造の正孔トラップ評価

    冨ケ原 一樹, 小林 拓真, 野﨑 幹人, 志村 考功, 渡部 平司

    第84回 応用物理学会秋季学術講演会  (熊本) 

    Presentation date： 2023.09

    Event date：
    2023.09
    　
    　

    　View Summary

    22p-B201-7

  • SiO2/p-GaN MOS界面近傍の正孔トラップ低減に対するMgドープ濃度の影響

    溝端 秀聡, 野﨑 幹人, 小林 拓真, 志村 考功, 渡部 平司

    第84回 応用物理学会秋季学術講演会  (熊本) 

    Presentation date： 2023.09

    Event date：
    2023.09
    　
    　

    　View Summary

    22p-B201-1

  • SiO2/SiC(0-33-8) 構造の NO 窒化過程の観察と電気特性評価

    岩本 隼登, 中沼 貴澄, 平井 悠久, 染谷 満, 岡本 光央, 小林 拓真, 志村 考功, 渡部 平司

    第84回 応用物理学会秋季学術講演会  (熊本) 

    Presentation date： 2023.09

    Event date：
    2023.09
    　
    　

    　View Summary

    21p-B201-7

  • 高エネルギーX線CT計測 -高角散乱X線を用いたライトシート3Dイメージングとの比較検証-

    志村 考功, 梶原 堅太郎, 辻 成希, 小林 拓真, 渡部 平司

    第84回 応用物理学会秋季学術講演会  (熊本) 

    Presentation date： 2023.09

    Event date：
    2023.09
    　
    　

    　View Summary

    19p-A601-5

  • Formation of color centers at SiO2/SiC interfaces by thermal oxidation and its correlation with electrical properties

    Kentaro Onishi, Takato Nakanuma, Kosuke Tahara, Katsuhiro Kutsuki, Takayoshi Shimura, Heiji Watanabe, Takuma Kobayashi

    International Conference on Silicon Carbide & Related Materials 2023  (Sorrento) 

    Presentation date： 2023.09

    Event date：
    2023.09
    　
    　

  • A SiO2/SiC interface formed by direct bonding of SiO2 and SiC

    Shinji Kamihata, Takuma Kobayashi, Takayoshi Shimura, Heiji Watanabe

    International Conference on Silicon Carbide & Related Materials 2023  (Sorrento) 

    Presentation date： 2023.09

    Event date：
    2023.09
    　
    　

  • Ab initio study of oxygen-vacancy defect in 4H-SiC: A potential qubit

    Takuma Kobayashi, Takayoshi Shimura, Heiji Watanabe

    International Conference on Silicon Carbide & Related Materials 2023  (Sorrento) 

    Presentation date： 2023.09

    Event date：
    2023.09
    　
    　

  • Controlling the properties of single photon emitters at SiO2/SiC interfaces by oxidation and annealing

    Takato Nakanuma, Kosuke Tahara, Katsuhiro Kutsuki, Takayoshi Shimura, Heiji Watanabe, Takuma Kobayashi

    International Conference on Silicon Carbide & Related Materials 2023  (Sorrento) 

    Presentation date： 2023.09

    Event date：
    2023.09
    　
    　

  • Improved interface properties in SiC(0001) MOS structures by plasma nitridation of SiC surface prior to SiO2 deposition

    Hiroki Fujimoto, Takuma Kobayashi, Yu Iwakata, Takayoshi Shimura, Heiji Watanabe

    International Conference on Silicon Carbide & Related Materials 2023  (Sorrento) 

    Presentation date： 2023.09

    Event date：
    2023.09
    　
    　

  • Accurate analysis of leakage characteristics of SiC (1-100) MOS devices over a wide temperature range

    Asato Suzuki, Takuma Kobayashi, Mitsuru Sometani, Mitsuo Okamoto, Takayoshi Shimura, Heiji Watanabe

    International Conference on Silicon Carbide & Related Materials 2023  (Sorrento) 

    Presentation date： 2023.09

    Event date：
    2023.09
    　
    　

  • Fabrication of SiO2/4H-SiC MOS devices by sputter deposition of SiO2 followed by high-temperature CO2-post deposition annealing

    Tae-Hyeon Kil, Takuma Kobayashi, Takayoshi Shimura, Heiji Watanabe

    International Conference on Silicon Carbide & Related Materials 2023  (Sorrento) 

    Presentation date： 2023.09

    Event date：
    2023.09
    　
    　

  • Ge-on-Si Stone-circle Image Sensors

    Presentation date： 2023.09

    Event date：
    2023.09
    　
    　

  • Si基板上GeSn細線のレーザー溶融結晶化と光学特性評価

    近藤 優聖, 田淵 直人, 國吉 望月, 小林 拓真, 志村 考功, 渡部 平司

    第70回 応用物理学会春季学術講演会 

    Presentation date： 2023.03

    Event date：
    2023.03
    　
    　

  • SiO2/SiC界面発光中心密度と電気的特性の相関

    中沼 貴澄, 田原 康佐, 木村 大至, 朽木 克博, 志村 考功, 渡部 平司, 小林 拓真

    第70回 応用物理学会春季学術講演会 

    Presentation date： 2023.03

    Event date：
    2023.03
    　
    　

  • Beyond the temporal resolution limit of silicon image sensors

    T. Shimura, G. T. Etoh, H. Watanabe

    Ultrafast Imaging and Tracking Instrumentation, Methods and Applications Conference (ULITIMA 2023) 

    Presentation date： 2023.03

    Event date：
    2023.03
    　
    　

  • Epitaxial Growth of High-quality Single-crystalline GeSn Layers on Ge(100) Substrates by Sputter Deposition

    Presentation date： 2023.02

    Event date：
    2023.02
    　
    　

  • 半導体デバイスにおける局所歪み計測の重要性とナノ放射光技術への期待

    志村 考功  [Invited]

    未来社会にむかう理研放射光センター・産業界連携シンポジウム, 第3回 大阪大学・理研・産業界の連携による先端半導体評価プラットフォーム整備構想  (梅田) 

    Presentation date： 2023.02

    Event date：
    2023.02
    　
    　

  • Challenges in SiO2/SiC Interface Engineering for SiC Power MOSFETs

    Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe  [Invited]

    The 48th Conference on the Physics and Chemistry of Surfaces and Interfaces (PCSI-48) 

    Presentation date： 2023.01

    Event date：
    2023.01
    　
    　

  • Control of color centers at SiO2/SiC interfaces by oxidation and post-annealing

    The 9th Meeting on Advanced Power Semiconductors Division 

    Presentation date： 2022.12

    Event date：
    2022.12
    　
    　

  • Effect of Excimer Ultraviolet Light Irradiation on NO-Nitrided SiO2/SiC(11-20) Interfaces

    The 9th Meeting on Advanced Power Semiconductors Division 

    Presentation date： 2022.12

    Event date：
    2022.12
    　
    　

  • Leak current mechanisms in NO-nitrided SiC(1-100) MOS devices

    The 9th Meeting on Advanced Power Semiconductors Division 

    Presentation date： 2022.12

    Event date：
    2022.12
    　
    　

  • Improvement of Interface and Insulating Properties of Sputter-deposited SiO2/GaN MOS Structures by Oxygen and Hydrogen Annealing

    The 9th Meeting on Advanced Power Semiconductors Division 

    Presentation date： 2022.12

    Event date：
    2022.12
    　
    　

  • Fabrication of Tensile-strained Single-crystalline GeSn Wires on Amorphous Quartz Substrates by Local Liquid-phase Crystallization

    T. Shimura, H. Oka, T. Hosoi, Y. Imai, S. Kimura, H. Watanabe

    The 8th International Symposium on Advanced Science and Technology of Silicon Materials 

    Presentation date： 2022.11

    Event date：
    2022.11
    　
    　

  • CO2熱処理によるSiC MOSFETの信頼性向上

    細井卓治, 志村考功, 渡部平司  [Invited]

    電子情報通信学会, シリコン材料・デバイス研究会（SDM） 

    Presentation date： 2022.10

    Event date：
    2022.10
    -
    　

  • Reliability Issues in Nitrided SiC MOS Devices

    Takuma Kobayashi, Takato Nakanuma, Asato Suzuki, Mitsuru Sometani, Mitsuo Okamoto, Akitaka Yoshigoe, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe  [Invited]

    9th International Symposium on Control of Semiconductor Interfaces (ISCSI-IX) 

    Presentation date： 2022.09

    Event date：
    2022.09
    　
    　

  • Branching Image Sensors with Dominant Horizontal Motion of Electrons

    Presentation date： 2022.06

    Event date：
    2022.06
    　
    　

  • Approach to achieving super temporal resolution image sensors beyond 20 picosecond

    Takayoshi Shimura  [Invited]

    2022 IEEE International Conference on Imaging Systems and Techniques (IST 2022) 

    Presentation date： 2022.06

    Event date：
    2022.06
    　
    　

  • Characterization of Electron Traps in Gate Oxide of SiC MOS Capacitors

    Yutaka Terao, Takuji Hosoi, Shinya Takashima, Takuma Kobayashi, Takayoshi Shimura, Heiji Watanabe

    IEEE International Reliability Physics Symposium (IRPS 2022) 

    Presentation date： 2022.03

    Event date：
    2022.03
    　
    　

  • Investigation of reliability of NO nitrided SiC(1-100) MOS devices

    Takato Nakanuma, Asato Suzuki, Yu Iwakata, Takuma Kobayashi, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    IEEE International Reliability Physics Symposium (IRPS 2022) 

    Presentation date： 2022.03

    Event date：
    2022.03
    　
    　

  • NO窒化処理を施した非基底面SiC MOSデバイスの信頼性

    中沼貴澄, 小林拓真, 染谷満, 岡本光央, 吉越章隆, 細井卓治, 志村考功, 渡部平司  [Invited]

    （一社）電気学会 電子デバイス研究会 

    Presentation date： 2022.03

    Event date：
    2022.03
    　
    　

  • 高速イメージセンサの現状と展望 －ピコ秒を目指して－

    江藤剛治, 志村考功, 下ノ村和弘, 渡部平司  [Invited]

    （独）日本学術振興会「結晶加工と評価技術」第 145 委員会 第 174回研究会 

    Presentation date： 2022.01

    Event date：
    2022.01
    　
    　

  • NO窒化処理を施した4H-SiC(11-20) MOSデバイスの絶縁性および閾値安定性の評価

    中沼 貴澄, 岩片 悠, 小林 拓真, 染谷 満, 岡本 光央, 吉越 章隆, 細井 卓治, 志村 考功, 渡部 平司

    「電子デバイス界面テクノロジー研究会 ―材料・プロセス・デバイス特性の物理―」 (第27回研究会) 

    Presentation date： 2022.01

    Event date：
    2022.01
    　
    　

  • 光吸収層を有する石英基板上GeSn細線のレーザー溶融結晶化

    田淵 直人, 山口 凌雅, 近藤 雅斗, 國吉 望月, 細井 卓治, 小林 拓真, 志村 考功, 渡部 平司

    「電子デバイス界面テクノロジー研究会 ―材料・プロセス・デバイス特性の物理―」 (第27回研究会) 

    Presentation date： 2022.01

    Event date：
    2022.01
    　
    　

  • AlGaNキャップ層によるMgドープp-GaNの活性化抑制と水素脱離過程の制御による特性改善

    溝端 秀聡, 和田 悠平, 野﨑 幹人, 細井 卓治, 成田 哲生, 加地 徹, 志村 考功, 渡部 平司

    「電子デバイス界面テクノロジー研究会 ―材料・プロセス・デバイス特性の物理―」 (第27回研究会) 

    Presentation date： 2022.01

    Event date：
    2022.01
    　
    　

  • 局所液相成長法によって作製した単結晶GeSn細線の受光・発光特性

    志村 考功, 細井 卓治, 小林 拓真, 渡部 平司  [Invited]

    レーザー学会学術講演会第42回年次大会 

    Presentation date： 2022.01

    Event date：
    2022.01
    　
    　

  • Electrical Properties of p-GaN MOS Devices Fabricated on Mg-Implanted GaN Activated by Ultra-HighPressure Annealing

    Presentation date： 2021.12

    Event date：
    2021.12
    　
    　

  • Electrical Properties of SiO2/GaN MOS Capacitors Fabricated on GaN(000-1) Substrates

    Presentation date： 2021.12

    Event date：
    2021.12
    　
    　

  • Electrical and Physical Characterizations of NO-Annealed SiO2/4H-SiC(1-100) Interfaces

    Presentation date： 2021.12

    Event date：
    2021.12
    　
    　

  • Effect of Post-Deposition Annealing on Gate Dielectric Reliability of SiO2/GaN MOS Structures

    Presentation date： 2021.12

    Event date：
    2021.12
    　
    　

  • Degradation of Electrical Characteristics in NO Nitrided SiC MOS Devices by Excimer UV Irradiation

    Presentation date： 2021.12

    Event date：
    2021.12
    　
    　

  • On the way to the super temporal resolution image sensor of visible light

    T. Shimura, N. H. Ngo, A. Q. Nguyen, F. M. Bufler, H. Watanabe, P. Matagne, E. Charbon, T. G. Etoh  [Invited]

    International Meet & Expo on Laser, Optics and Photonics (OPTICSMEET2021) 

    Presentation date： 2021.11

    Event date：
    2021.11
    　
    　

  • 符号化開口を用いた後方散乱X線イメージング

     [Invited]

    Optics & Photonics Japan 2021 (OPJ2021) 

    Presentation date： 2021.10

    Event date：
    2021.10
    　
    　

  • Toward Super Temporal Resolution by Controlling Horizontal Motions of Electrons

    T. Goji Etoh, Nguyen Hoai Ngo, Kazuhiro Shimonomura, Taeko Ando, Takayoshi Shimura, Heiji Watanabe, Hideki Mutoh, Yoshinari Kamakura, Edoardo Charbon

    2021 International Image Sensor Workshop (IISW) 

    Presentation date： 2021.09

    Event date：
    2021.09
    　
    　

  • Dynamic Crosstalk Analysis for Branching Image Sensors

    Nguyen H. Ngo, Takayoshi Shimura, Taeko Ando, Heiji Watanabe, Kazuhiro Shimonomura, Yoshinari Kamakura, Hideki Mutoh, T. Goji Etoh

    2021 International Image Sensor Workshop (IISW) 

    Presentation date： 2021.09

    Event date：
    2021.09
    　
    　

  • Fixed Charge Generation in SiO2/GaN MOS Structures by Forming Gas Annealing and its Suppression by Controlling Ga-oxide Interlayer Growth

    Hidetoshi Mizobata, Mikito Nozaki, Takuma Kobayashi, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe

    2021 International Conference on Solid State Devices and Materials (SSDM 2021) 

    Presentation date： 2021.09

    Event date：
    2021.09
    　
    　

  • Comprehensive Physical and Electrical Characterizations of NO Nitrided SiO2/4H-SiC(11-20) Interfaces

    Takato Nakanuma, Yuu Iwakata, Takuji Hosoi, Takuma Kobayashi, Mitsuru Sometani, Mitsuo Okamoto, Takayoshi Shimura, Heiji Watanabe

    2021 International Conference on Solid State Devices and Materials (SSDM 2021) 

    Presentation date： 2021.09

    Event date：
    2021.09
    　
    　

  • A Branching Image Sensor for Sub-nanosecond Burst Imaging

    Nguyen Hoai Ngo, Takayashi Shimura, Heiji Watanabe, Kazuhiro Shimonomura, Yoshinari Kamakura, Takeharu Goji Etoh

    Presentation date： 2021.06

    Event date：
    2021.06
    　
    　

  • Super-temporal-resolution Image Sensor -- Beyond the Theoretical Highest Frame Rate of Silicon Image Sensors --

    Nguyen Hoai Ngo, Takayoshi Shimura, Heiji Watanabe, Kazuhiro Shimonomura, Hideki Mutoh, Takeharu Goji Etoh

    Presentation date： 2021.06

    Event date：
    2021.06
    　
    　

  • Optoelectronic Integration Based on High-quality GeSn Grown by Liquid Phase Crystallization

    Heiji Watanabe, Hiroshi Oka, Takuji Hosoi, Takayoshi Shimura  [Invited]

    International Conference on Processing & Manufacturing of Advanced Materials (Thermec’2021) 

    Presentation date： 2021.06

    Event date：
    2021.06
    　
    　

  • Control of SiO2/SiC Interface for SiC-based Power MOSFET

    Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe  [Invited]

    International Conference on Processing & Manufacturing of Advanced Materials (Thermec’2021) 

    Presentation date： 2021.06

    Event date：
    2021.06
    　
    　

▼display all

Research Projects

  • 局所液相成長によるGeSn細線の形成とレーザーダイオードの動作実証

    日本学術振興会  科学研究費助成事業

    Project Year :

    2022.04
    -
    2025.03
     

    志村 考功

  • Demonstration of high sensitivity and high resolution X-ray imaging with structured X-ray light source

    科学研究費補助金、挑戦的研究(萌芽)

    Project Year :

    2018
    -
    2019
     

    志村 考功

  • Development of new functional semiconductors by utilizing novel liquid-phase crystallization technique and understanding of their optoelectronic properties

    Japan Society for the Promotion of Science  Grants-in-Aid for Scientific Research

    Project Year :

    2013.04
    -
    2018.03
     

    WATANABE HEIJI, SHIMURA Takayoshi, HOSOI Takuji

    　View Summary

    Dislocation-free local Ge- and GeSn-on-insulator structures were successfully fabricated by utilizing a novel liquid-phase crystallization technique. This method allows us to fabricated tensile-strained GOI and GeSnOI layers due to the large difference in thermal expansion coefficient between the semiconductors and substrate. In addition, high Sn-content exceeding the solubility limit was realized with the proposed method. Thin film transistors (TFTs) fabricated with the GOI and GeSnOI structures exhibited very high carrier mobility, indicating superior crystalline quality of thin Ge and GeSn layers and big advantage in electronic device applications. Moreover, enhanced direct bandgap emission and improved NIR photo-responsivity were demonstrated with GeSn-based photonic devices. The present technology opens a way for fully-integrated group-Ⅳ-based optoelectronic integration in the post-scaling era.

  • SOIピクセル検出器による自己像直接検出型タルボ・ロー干渉計の高度化

    科学研究費補助金、新学術領域研究(研究領域提案型)

    Project Year :

    2016
    -
    2017
     

    志村 考功

  • Fabrication of tensile-strained single-crystalline GeSn wires on an insulator by lateral liquid-phase epitaxy towards electronic and opto-electronic device applications

    科学研究費補助金、基盤研究(B)

    Project Year :

    2015
    -
    2017
     

    志村 考功

  • Improvement of SiO2/SiC interface properties with beam induced interface reactions and subsequent defect passivation

    科学研究費補助金、挑戦的萌芽研究

    Project Year :

    2015
    -
    2016
     

    渡部 平司

  • Development of Super-resolution Technique in Transmission X-ray Imaging using Embedded X-ray Targets

    科学研究費補助金、挑戦的萌芽研究

    Project Year :

    2015
    -
    2016
     

    志村 考功

  • Improvement of SiO2/SiC interface quality by beam induced interface reactions

    科学研究費補助金、挑戦的萌芽研究

    Project Year :

    2013
    -
    2014
     

    渡部 平司

  • Development of SiC-based plasmonic transistors with Schottky source/drain

    科学研究費補助金、若手研究(A)

    Project Year :

    2012
    -
    2014
     

    細井 卓治

  • Fabrication of vertical strained-Ge MOSFETs by channel-last process and the electrical characterization

    科学研究費補助金、基盤研究(B)

    Project Year :

    2012
    -
    2014
     

    志村 考功

  • High-k/Metal Gate材料及び新プロセス開発に関する研究

    キヤノンアネルバ 

    Project Year :

    2011
    -
    　
     

  • Development of light emitting devices in 1. 5μm range using germanium epitaxial layers on silicon

    Japan Society for the Promotion of Science  科学研究費補助金、基盤研究(B)

    Project Year :

    2009
    -
    2011
     

    石川 靖彦

    　View Summary

    Using Ge epitaxial layers on Si substrate, light-emitting devices were studied in the 1. 55μm range by a current injection. Light emission was observed in the 1. 55μm range due to the direct transition induced by a current injection into Ge pin diodes on Si. In order to increase the efficiency of light emission, it should be important to realize an injection of electrons into the conduction band at theΓvalley of Ge, followed by the recombination with holes in the valence band. A structure of n-GaAs/i-Ge/p-Si was investigated, where GaAs with the conduction band minimum at theΓvalley can be used for the electron injection.

  • Fabrication and electrical characterization of GOI structures by rapid melt growth

    Japan Society for the Promotion of Science  科学研究費補助金、基盤研究(B)

    Project Year :

    2009
    -
    2011
     

    志村 考功

    　View Summary

    Germanium on insulator structures have been expected as starting materials for future electric devices. Therefore, new fabrication process of GOI structure is required to obtain high-quality single-crystalline Ge layers. In this study we have proposed novel method and examined the advantages of the process. The transistors based on the GOI structures fabricated by this process showed excellent electrical properties, indicting the benefit of this method and the availability for future electric devices.

  • 高性能SiC-MOSFET用立体ゲート構造の研究開発

    ローム株式会社、東京エレクトロン 

    Project Year :

    2010
    -
    　
     

  • 機能性基板/生体超分子界面反応メカニズムの解明とその制御技術の研究

    Project Year :

    2010
    -
    　
     

  • Measurements of the strain in strained Si wafers by X-ray diffraction methods

    Japan Society for the Promotion of Science  科学研究費補助金、基盤研究(C)

    Project Year :

    2008
    -
    2010
     

    梅野 正隆

    　View Summary

    The aim of this study was to establish a method for characterizing the crystalline perfection and strain on the whole area of the strained Si wafers which would be promising as the LSI wafers of the next era. Synchrotron radiation was used to obtain X-ray topographs of whole area of 30cm wafers and the amount of the strain was estimated with the reciprocal lattice mapping method. From the CCD topographic images obtained by successively changing incident angles, locking curves of all points corresponding to the pixels of the CCD were obtained. The peak positions, FWHMs and integrated intensities of the locking curves were imaged independently. From these images it was revealed that the commercial strained silicon wafers contain crystalline imperfections such as inclination of crystalline planes, while the amount of the strain was nearly 0.75% and almost constant whole over the wafers. The aim of the present study could be attained.

  • 高機能化原子制御製造プロセス教育研究拠点

    Project Year :

    2009
    -
    　
     

  • シリコン上ゲルマニウムエピタキシャル層を用いた１．５ミクロン帯発光素子の開拓

    Project Year :

    2009
    -
    　
     

  • X線回折による歪シリコンウエハの歪量測定に関する研究

    Project Year :

    2009
    -
    　
     

  • 機能性基板/生体超分子界面反応メカニズムの解明とその制御技術の研究

    JST戦略的創造研究推進事業 

    Project Year :

    2008
    -
    　
     

  • 原子制御プロセスによる超薄MOS構造の作製とその伝導特性および界面物性の解析

    Project Year :

    2008
    -
    　
     

  • 原子制御プロセスによる超薄MOS構造の作製とその伝導特性および界面物性の解析

    科学研究費補助金、特定領域研究

    Project Year :

    2007
    -
    2008
     

    渡部 平司

  • 金属電極／高誘電率絶縁膜の界面物性に関する研究

    半導体先端テクノロジーズ 

    Project Year :

    2007
    -
    　
     

  • 高性能ＳｉＣパワーエレクトロクス実現に向けたＭＯＳ構造作製とプロセス

    科学研究費補助金 （基盤研究Ｂ） 

    Project Year :

    2007
    -
    　
     

  • 高性能SiCパワーエレクトロニクス実現に向けた理想MOS構造作製プロセスの創成

    科学研究費補助金、基盤研究(B)

    Project Year :

    2007
    　
    　
     

    渡部 平司

  • ガラス基板表面の核形成点制御による大粒径多結晶薄膜形成法の開発

    Project Year :

    2006
    -
    　
     

  • Formation of Buried Oxide Layer in Epitaxial Silicon Wafers

    Japan Society for the Promotion of Science  科学研究費補助金、基盤研究(C)

    Project Year :

    2005
    -
    2006
     

    梅野 正隆

    　View Summary

    The probable formation of buried oxide layer in a silicon wafer by a new method which would lead to the production of SOI wafers for the cutting-edge ULSIs is studied. High graded SOI wafers for the ULSI devices are produced either by the wafer bonding method or oxygen ion implantation followed by high temperature annealing. However, both methods require highly sophisticated production techniques such as the smart cut technique in bonding method and the Itox technique in SIMOX (Separation by Implanted Oxygen) wafer and hence the prices of SOI wafers are high limiting the preventing the wide use of the SOI wafers in usual ULSI devices. This study aims to produce a buried oxide without using either bonding or oxygen ion implantation. As in the SIMOX wafers the buried oxide is formed during the high temperature annealing process at the damage layer formed by ion implantation, we produced the damage layer by MBE method. There are some methods to introduce a damage layer in the epitaxially grown Si crystals and we employed two methods in this study. That is, (a) a change of the substrate temperature was introduced during the MBE growth and (b) 1 or 2 Ge layers are sandwiched in MBE silicon crystal. The specimens were annealed in various conditions in oxidizing atmospheres and investigated by spectroscopic ellipsometry and by depth analyses with SIMS. The expected oxide layer was not found at present. It is probable that the damage layers produced above methods are easily relaxed in the early stage of the annealing and we try to produce more robast damage layer having atoms with low diffusion velocities in silicon crystals.

  • Fabrication of Large-Grained Polycrystalline Si Thin Films by Controlling Nucleation Sites on Glass Substrates

    Japan Society for the Promotion of Science  科学研究費補助金、基盤研究(B)

    Project Year :

    2004
    -
    2006
     

    安武 潔

    　View Summary

    Large-grained polycrystalline silicon (poly-Si) thin films on glass substrates are of interest for the fabrication of high-performance thin-film transistors (TFT) and cost-effective solar cells. To obtain large-grained poly-Si thin films, it is important to control the formation of nucleation sites for Si crystal growth on a glass surface prior to film deposition. Glass substrates having nucleation sites with tailored properties, such as size and spacing, are particularly desirable for the solid-phase crystallization (SPC) of amorphous silicon (a-Si) thin films. In this work, we have proposed a new process to fabricate crystalline Ge islands with controlled size and density in a tailored range to form nuclei for SPC of a-Si thin films. The process consists of the deposition of a-Ge thin films on glass substrates at room temperature, the subsequent vacuum annealing for SPC of the deposited a-Ge thin films to form self-assembled crystalline Ge islands, and the oxygen etching for controlling the size and density of Ge islands. From the micro beam reflection high-energy electron diffraction observation of the partially crystallized a-Si thin film using Ge nuclei, we have confirmed that Ge islands act as nuclei for Si crystallization. Marked reductions of the crystallization time and temperature are observed in the annealing experiments of a-Si : H thin films deposited on glass substrates with Ge nuclei. Moreover, it is found that the crystal growth rate of a-Si : H deposited by atmospheric pressure plasma CVD is much larger than that of a-Si deposited by E-beam evaporation. For the location control of Ge nuclei on glass substrates, a nano-imprint technique using crystalline Ge tip array has been demonstrated.

  • ガラス基板表面の核形成点制御による大粒径多結晶薄膜形成法の開発

    Project Year :

    2005
    -
    　
     

  • 原子論的生産技術の創出拠点

    Project Year :

    2004
    -
    　
     

  • 原子論的生産技術の創出拠点

    Project Year :

    2003
    -
    　
     

  • 完全表面の創成

    文部科学省 

    Project Year :

    2002
    -
    　
     

  • 完全表面の創成

    文部科学省 

    Project Year :

    2001
    -
    　
     

  • X-ray Diffraction Study of the Formation Process of SiO_2/Si Interfaces

    Japan Society for the Promotion of Science  科学研究費補助金、基盤研究(B)

    Project Year :

    1999
    -
    2001
     

    梅野 正隆

    　View Summary

    A lot of studies for the silicon dioxide have been carried out so far, but the oxidation process is not clear. For example, a layer-by-layer growth of the thermal oxidation is one of unprecedented phenomena. A SIMOX (seperatiorr-hy-implanted oxygen) wafer is one of the SOI (silicon-on-insulator) substrate, which is expected for low-power and high-speed devices. However, the formation process of the buried oxide layer is obscure. In this study we studied the formation process of the interface between the SiO_2 and Si crystals by X-ray diffraction technique.
    The growth of epitaxially ordered Si0_2 in oxygen-implanted silicon during thermal annealing was investigated. The extra diffraction streak was observed at the initial stage of annealing. This means that the small precipitate itself has the ordered structure of 2x2 symmetry with respect to the Si layers. As the size of the precipitates became larger upon further annealing, the intensity of the extra streak gradually increased. This indicates that epitaxial growth of the ordered precipitates occurred, particulary, in the lateral direction because the ordered structure has better periodicity in the lateral direction than in the perpendicular direction. The formation of the buried oxide layer in the perpendicular direction was due mainly to coalescence rather than to epitaxial growth.
    It was also found that the thermal oxide layer on Si(113) did not simple amorphous structure, but has the ordered sturucture with an epitaxial relation with the Si substrate, which was similar to those on the Si(001) and (111) substrates.

  • マイクロサテライトにおけるトライボロジー技術と宇宙環境からの影響評価に関する研究

    科学研究費補助金、基盤研究(B)

    Project Year :

    1998
    -
    2000
     

    田川 雅人

  • シリコン熱酸化膜の長距離秩序構造の解析による酸化機構の研究

    科学研究費補助金、奨励研究(A)

    Project Year :

    1998
    -
    1999
     

    志村 考功

  • Development of the Angular Resolved Reflection High Energy Electron Diffraction and the Electron Impact Mass Spectroscopy for the Studies of Three Dimensional Structure of Surfaces

    Japan Society for the Promotion of Science  科学研究費補助金、基盤研究(B)

    Project Year :

    1997
    -
    1998
     

    大前 伸夫

    　View Summary

    Angular resolved reflection high energy electron diffraction (AR-RHEED), which works in an extreme vacuum of 10^<-8>, has been designed and developed to study three dimensional structure of solid surfaces. The function and reliability of this AR-RHEED has been examined by using molybdenum disulfide (MoS_2) single crystal (0001), and clear streak patterns were obtained at every incident angles. Molecular beam epitaxially (MBE) grown C_<60> films on MoS_2 were prepared and analyzed by AR-RHEED.Superlattice structure of MBE grown C_<60>. with the van der Waals epitaxy, has been obtained. AR-RHEED showed that the MBE grown C_<60> had very smooth surface geometry from the onset of nucleation. The lattice constant of C_<60> is 1 nm, and thus AR-RHEED has an enough resolution to identify sub-nanometers. Surface structure of computer hard disks was tested for practical applications. Halo rings both from PFPE lubricant and from amorphous carbon were recognized. Due to the thickness of carbon films (l0nm), it was unable to detect magnetic storage media (sputtered CO-Cr-Ta-Pt). This implies that the present AR-RHEED is sensitive to surface. The detection of desorption mass spectroscopy of gases was attempted. However, to quantitatively identify F, C, 0 etc., re-design of pole piece of Q-mass was needed. Use of e-beam of the AR-RHEED as an energy loss spectroscopy required EELS spectrometer.

  • Development of room-temperature oxidation method of Si due to pulsed hyperthermal atomic oxygen beam

    Japan Society for the Promotion of Science  科学研究費補助金、基盤研究(B)

    Project Year :

    1997
    -
    1998
     

    梅野 正隆

    　View Summary

    This project dealt with the new method for room-temperature oxidation of Si wafers "using pulsed-hyperthermual atomic oxygen beam. A broad-. pulsed-, hyperthemial (5eV) atomic oxygen beam, generated by the laser-induced detonation phenomenon of oxygen gas, was applied to formation of thin oxide films on the Si (001) surface. It was clearly observed that the hypertherma.l beam can form thin oxide film (<5 nm) even at the room temperature. This is the thickness can be applied for the next generation ULSIs. The thickness of the oxide film depends on the temperatute and the atomic oxygen flux. It was also observed that the growth of oxide film obeyed the parabolic law. This was confirmed by the in-situ thickness measurement of the oxide film using X-ray photoelectron spectroscopy (XPS) which indicated the linear relationship between oxidation time versus thickness_2. This result clearly showed that the growth mechanism was rate-limited by the diffusion of atomic oxygen. It is, however, measured that the activation energy of diffusion of atomic oxygen in the SiO_2 film was as low as 0.15eV.The activation energy of diffusion of atomic oxygen in the SiO_2 film measure in the out-of-glow region of microwave- generated oxygen plasma was reported to be 0.5eV, and that of molecular oxygen in the thermal oxidation was 1.2eV.The low activation energy on diffusion of atomic oxygen in the SiO_2 film may include the inverse diffusion of interstitial Si atoms which is generated high compressive stresses applied at the Si/SiO_2 interface. In order to reduce such high interfacial stresses, it would be effective to use the premix gas of oxygen with small amount of fluorine.

  • Development of the quantitative characterization method for microstructures on semiconductor surfaces by using X-ray diffraction

    Japan Society for the Promotion of Science  科学研究費補助金、基盤研究(B)

    Project Year :

    1997
    -
    1998
     

    梅野 正隆

    　View Summary

    Microstructures of ditches were formed on the Si(O01) surfaces by lithography and chemical etching with KOH.The width of the ditches ranges from 0.2 to 5.0mum.
    The ratio of the width and the space of the ditches ranges from 1 : 1 to 1 : 20. The size of each area was 1.0x2.Omm^2. The shape of the gratings were confiqried by atomic force microscopy, indicating that they have V shape. X-ray diffraction patterns were observed around the 111 Bragg point in the symmetrical setting. The effective surface area was limited by placing slits of 0.5mm wide and Ge channel cut crystal before the samples and the detector so that the X-ray diffraction patterns from the neighboring areas were measured separately. The periodic length of the gratings and the direction of the slopes were estimated from the diffraction patterns from the several areas. The intensity distributions calculated by Fourie transform were similar to those of the observations. Furthermore, the diffraction patterns were successfully observed from the thermally oxidized gratings. They were almost as same as those form the non-oxidized ones, while the intensity distributions showed slight asymmetry around the Bragg point. It is considered that the intensity distribution give us the information not only about the shape of the crystal, but also the crystal structure in the microstructure, such as lattice relaxation, because the asymmetry could not be interpreted only by the shape effect.

  • Synergistic effect on spacetribology in the low earch orbit

    Japan Society for the Promotion of Science  科学研究費補助金、基盤研究(B)

    Project Year :

    1996
    -
    1997
     

    大前 伸夫

    　View Summary

    The purpose of this project is to clarify the synergistic effect of atomic oxygen (AO) and the other environmental factors, such as ultraviolet (UV) light or X-rays, in the tribology of satellites used in low earth orbital (LEO) environment. An ion beam type and a laser induced breakdown type AO sources are used in this study to generate energtic AO beam in the laboratory. The research results obtained in this project are as follows :
    1. The reaction efficiency of AO with the polyimide film formed by a spin-coating technique is influenced by UV irradiation. Only in the simultaneous irradiation of AO and UV,significant mass loss and CO_2 formation is detected. This research result suggests the photo-assisted chemical reaction of the functional groups such as carbonyl, which absorbs UV light, occurs at the AO bombarded polymer surfaces where carbonyl is formed by AO attacks.
    2. When AO hits MoS_2 (0001) surface, So is formed. This volatile product is detected by a quadrupole mass spectrometer during AO beam exposure on MoS_2 (0001). However, the rate of evaporation is not linear with time. This is probably due to the low diffusion rate of AO into the MoS_2 bulk, i.e., reaction is limited only at the very surface region where only limited amount of S is existed.
    3. Tribological properties of MoS_2 (0001) is not suffered by AO attack very much. We see maximum 40% increase of initial friction after AO exposure. However, similar effect is also observed even before AO exposure. Certain percentage of this effect is dur to wear track formation. This effect obviously depends on the sliding system and materials' constants. We need to know how much AO influences to the actual sliding component, because the effect of AO on the tribological property of sputtered MoS_2 may be different with single crystal. Further research on this point must be necessary.

  • Development of quantitative characterization method of microstructures by X-ray scattering

    Japan Society for the Promotion of Science  科学研究費補助金、基盤研究(A)

    Project Year :

    1995
    -
    1996
     

    梅野 正隆

    　View Summary

    High-resolution X-ray diffraction from a Si (001) grating surface using a conventional laboratory X-ray source reveals resolution-limited grating interference peaks around each Bragg reflection. As the results it was found that the positions and the intensities of the satellite peaks provide us with structural information such as the period and the width, as well as the roughness of the side walls of the gratings in a nanometer scale.
    The gratings were made on a Si (001) surface, of which width, height, period, and length were 0.8mum, 10mum, 4.5mum, and 6.5mm, respectively. The number of the gratings is 47. The X-ray diffraction measurements were performed with a Ge (220) channel-cut monochrometor (CuKalpha_1) and a Ge (220) channel-cut analyzer in front of the detector. The satellite peaks were observed around the 113 and 111 Bragg points by using the automatic program for the diffractometer. Two diffraction geometries, high- and low-angle incidence geometries, were selected for the 113 Bragg point. In the high-angle geometry the satellite peaks were not observed, while the interference peaks of the -0.8mum separation were measured in the low-angle geometry. The actual width of the gratings can be estimated from the positions of the peaks. The intensity decay of the peaks give us the information for the roughness of the side walls of the gratings. Furthermore, the fine fringes for the period of the gratings were observed on the peaks around the 111 Bragg point.

  • Control of electric charge at the interface in the RTO and low temperature oxidation of SOI

    Japan Society for the Promotion of Science  科学研究費補助金、基盤研究(B)

    Project Year :

    1995
    -
    1996
     

    梅野 正隆

    　View Summary

    In the rapid thermal oxidation (RTO) and in the low temperature thermal oxidation of silicon, the incomplete relaxation of intrinsic stress leads to the emission of a lot of interstitial atoms. Consequently, some properties of oxide films and the interface states vary from time to time, which causes it difficult to explain the oxidation behavior with the usual linear-parabolic model. Moreover, in case of the SOI,the complex stress states due to the existence of buried oxide makes it difficult to obtain an oxide layr of good quality. From such a background we constructed the experimental apparatus which was suited for the dynamic analyzes of the thermal oxidation process and established an experimental methodology to study the oxidation mechanism and to control the properties of oxide layr. As a consequence, we obtained many interesting basic data and new knowledge and information in the low temperature thermal oxidation of silicon as follows :
    1.The oxidation parameters were analyzed from the oxidation curves measured ith an in-situ ellipsometer, and the difference in the oxidation mechanism between the high and the low temperature thermal oxidation was experimentally verified.
    2.It was found that the emission of interstitial silicon atoms ruled the oxidation rate.
    3.A stress related model for the emission of interstitial atoms was proposed and experimentally confirmed.
    4.The orientation dependencies of oxidation rates in varied temperature and oxidation species revealed the roles of intrinsic stress in the oxidation process.
    5.The addition of an appropriate amount of NF3 in the oxidizing gas reduced the residual stress in the oxide films and improved the C-V characteristics.
    6.By using an X-ray diffraction technique we found different oxide structures depending on the oxidation temperature, species and the wafer orientation.

  • X線CTR散乱法によるシリコン熱酸化膜中の結晶相の面方位依存性

    科学研究費補助金、奨励研究(A)

    Project Year :

    1995
    　
    　
     

    志村 考功

  • X-ray Diffraction Study of Crystal Surfaces Interfaces and thin films

    Grant-in-Aid for Scientific Research

  • Characterization of Semiconductor Materials by Synchrotron Radiation X-ray.

    Grant-in-Aid for Scientific Research

▼display all

Misc

  • Fabrication of Tensile-strained Single-crystalline GeSn Wires on Amorphous Quartz Substrates by Local Liquid-phase Crystallization

    T. Shimura, H. Oka, T. Hosoi, Y. Imai, S. Kimura, H. Watanabe

    Proceedings of The 8th International Symposium on Advanced Science and Technology of Silicon Materials     143 - 146  2022.11

    Authorship：Lead author

    Research paper, summary (international conference)  

  • Interface engineering in GaN metal-oxide-semiconductor device with SiO2 gate insulator

      118 ( 110 ) 11 - 14  2018.06  [Refereed]

    CiNii

  • SiO

    Watanabe Kenta, Terashima Daiki, Nozaki Mikito, Yamada Takahiro, Nakazawa Satoshi, Ishida Masahiro, Anda Yoshiharu, Ueda Tetsuzo, Yoshigoe Akitaka, Hosoi Takuji, Shimura Takayoshi, Watanabe Heiji

    Jpn. J. Appl. Phys.   57 ( 6 )  2018.05

    　View Summary

    Stacked gate dielectrics consisting of wide bandgap SiO&lt;inf&gt;2&lt;/inf&gt;insulators and thin aluminum oxynitride (AlON) interlayers were systematically investigated in order to improve the performance and reliability of AlGaN/GaN metal–oxide–semiconductor (MOS) devices. A significantly reduced gate leakage current compared with that in a single AlON layer was achieved with these structures, while maintaining the superior thermal stability and electrical properties of the oxynitride/AlGaN interface. Consequently, distinct advantages in terms of the reliability of the gate dielectrics, such as an improved immunity against electron injection and an increased dielectric breakdown field, were demonstrated for AlGaN/GaN MOS capacitors with optimized stacked structures having a 3.3-nm-thick AlON interlayer.

    CiNii

  • 放射光光電子分光法によるGaN上GaOx層の熱脱離過程の評価

    野崎幹人, 寺島大貴, 渡邉健太, 山田高寛, 吉越章隆, 細井卓治, 志村考功, 渡部平司

    応用物理学会春季学術講演会講演予稿集(CD-ROM)   65th   ROMBUNNO.18p‐C302‐7  2018.03

    J-GLOBAL

  • SiO2/GaN MOSデバイスの信頼性向上に向けた界面酸化層の制御

    山田高寛, 寺島大貴, 渡邉健太, 野崎幹人, 山田永, 高橋言諸, 清水三聡, 吉越章隆, 細井卓治, 志村考功, 渡部平司

    応用物理学会春季学術講演会講演予稿集(CD-ROM)   65th   ROMBUNNO.18p‐C302‐8  2018.03

    J-GLOBAL

  • Control of Ga-oxide interlayer growth and Ga diffusion in SiO

    Yamada Takahiro, Watanabe Kenta, Nozaki Mikito, Yamada Hisashi, Takahashi Tokio, Shimizu Mitsuaki, Yoshigoe Akitaka, Hosoi Takuji, Shimura Takayoshi, Watanabe Heiji

    Appl. Phys. Express   11 ( 1 )  2017.12

    　View Summary

    A simple and feasible method for fabricating high-quality and highly reliable GaN-based metal–oxide–semiconductor (MOS) devices was developed. The direct chemical vapor deposition of SiO&lt;inf&gt;2&lt;/inf&gt;films on GaN substrates forming Ga-oxide interlayers was carried out to fabricate SiO&lt;inf&gt;2&lt;/inf&gt;/GaO&lt;inf&gt;x&lt;/inf&gt;/GaN stacked structures. Although well-behaved hysteresis-free GaN-MOS capacitors with extremely low interface state densities below 10&lt;sup&gt;10&lt;/sup&gt;cm&lt;sup&gt;−2&lt;/sup&gt;eV&lt;sup&gt;−1&lt;/sup&gt;were obtained by postdeposition annealing, Ga diffusion into overlying SiO&lt;inf&gt;2&lt;/inf&gt;layers severely degraded the dielectric breakdown characteristics. However, this problem was found to be solved by rapid thermal processing, leading to the superior performance of the GaN-MOS devices in terms of interface quality, insulating property, and gate dielectric reliability.

    CiNii

  • プラズマCVD成膜したSiO2/AlGaN界面特性の成膜電力および温度依存性

    寺島大貴, 渡邉健太, 山田高寛, 野崎幹人, SHIH Hongan, 中澤敏志, 按田義治, 上田哲三, 吉越章隆, 細井卓治, 志村考功, 渡部平司

    応用物理学会秋季学術講演会講演予稿集(CD-ROM)   78th   ROMBUNNO.5p‐C17‐5  2017.11  [Refereed]

    J-GLOBAL

  • SiO2/p‐GaN界面の熱酸化過程の放射光XPS分析

    山田高寛, 寺島大貴, 野崎幹人, 山田永, 高橋言諸, 清水三聡, 吉越章隆, 細井卓治, 志村考功, 渡部平司

    応用物理学会秋季学術講演会講演予稿集(CD-ROM)   79th   ROMBUNNO.19p‐CE‐9  2017.11  [Refereed]

    J-GLOBAL

  • AlGaN表面の熱酸化過程の放射光光電子分光分析

    渡邉健太, 山田高寛, 野崎幹人, 中澤敏志, SHIH Hongan, 按田義治, 上田哲三, 吉越章隆, 細井卓治, 志村考功, 渡部平司

    応用物理学会春季学術講演会講演予稿集(CD-ROM)   64th   ROMBUNNO.15p‐315‐2  2017.03

    J-GLOBAL

  • Design and control of interface reaction between Al-based dielectrics and AlGaN layer for hysteresis-free AlGaN/GaN MOS-HFETs

    K. Watanabe, M. Nozaki, T. Yamada, S. Nakazawa, Y. Anda, M. Isliida, T. Ueda, A. Yoshigoe, T. Hosoi, T. Shimura, H. Watanabe

    Proceedings of the International Symposium on Power Semiconductor Devices and ICs     219 - 222  2017  [Refereed]

    　View Summary

    We have demonstrated hysteresis-free recessed gate AlGaN/GaN metal-oxide-semiconductor heterojunction field-effect transistor (MOS-HFET) by implementing AIGN gate insulator and selective AlGaN regrowth technique. High thermal stability and excellent electrical properties of AIGN gate dielectrics will provide a large process window for further optimization of AlGaN/GaN MOS-HFET.

    DOI

  • 熱酸化処理によるSiO2/GaN界面でのGaOx形成とMOS界面特性向上

    山田高寛, 渡邉健太, 野崎幹人, 吉越章隆, 細井卓治, 志村考功, 渡部平司

    応用物理学会秋季学術講演会講演予稿集(CD-ROM)   77th   ROMBUNNO.16p‐B1‐5  2016.09

    J-GLOBAL

  • 低欠陥密度GaN基板の熱酸化過程の評価

    山田高寛, 伊藤丈予, 淺原亮平, 渡邉健太, 野崎幹人, 中澤敏志, 按田義治, 石田昌宏, 上田哲三, 吉越章隆, 細井卓治, 志村考功, 渡部平司

    応用物理学会春季学術講演会講演予稿集(CD-ROM)   63rd   ROMBUNNO.22A-W541-4  2016.03

    J-GLOBAL

  • 放射光光電子分光法によるn‐GaN上Al/Tiコンタクトの界面反応分析

    伊藤丈予, 淺原亮平, 野崎幹人, 中澤敏志, 石田昌宏, 上田哲三, 吉越章隆, 寺岡有殿, 細井卓治, 志村考功, 渡部平司

    応用物理学会春季学術講演会講演予稿集(CD-ROM)   62nd   ROMBUNNO.12A-A21-11  2015.02

    J-GLOBAL

  • High‐k/Geゲートスタック界面特性向上に向けたゲート電極形成後熱処理条件の検討

    田中亮平, 秀島伊織, 箕浦佑也, 吉越章隆, 寺岡有殿, 細井卓治, 志村考功, 渡部平司

    応用物理学会春季学術講演会講演予稿集(CD-ROM)   61st   ROMBUNNO.18P-D8-1  2014.03

    J-GLOBAL

  • 極薄AlOx層によるHigh‐k/Ge界面反応抑制とEOT=0.56nmの実現

    田中亮平, 秀島伊織, 箕浦佑也, 吉越章隆, 寺岡有殿, 細井卓治, 志村考功, 渡部平司

    応用物理学会秋季学術講演会講演予稿集(CD-ROM)   74th   ROMBUNNO.17P-B5-17  2013.08

    J-GLOBAL

  • 横方向液相成長によって作製したGOI構造のフォトルミネッセンス測定

    松江将博, 安武裕輔, 深津晋, 細井卓治, 志村考功, 渡部平司

    応用物理学会秋季学術講演会講演予稿集(CD-ROM)   74th   ROMBUNNO.18A-B4-7  2013.08

    J-GLOBAL

  • MBD法により作製したMetal/High‐k/GeO2/Geスタックの熱処理による構造変化

    秀島伊織, 田中亮平, 箕浦佑也, 吉越章隆, 寺岡有殿, 細井卓治, 志村考功, 渡部平司

    応用物理学会春季学術講演会講演予稿集(CD-ROM)   60th   ROMBUNNO.28P-G2-10  2013.03

    J-GLOBAL

  • Gate Stack Technologies for SiC Power MOSFETs (Invited)

    H. Watanabe, T. Hosoi, T. Kirino, Y. Uenishi, A. Chanthaphan, D. Ikeguchi, A. Yoshigoe, Y. Teraoka, S. Mitani, Y. Nakano, T. Nakamura, T. Shimura

    220th ECS Meeting - Boston, MA   41 ( 3 ) 77 - 90  2011.10  [Refereed]  [Invited]

    　View Summary

    Silicon carbide has gained considerable attention for future power electronics. However, it's well known that SiC-based MOS devices have suffered from degraded electrical properties of thermally grown SiO2/SiC interfaces, such as low inversion carrier mobility and deteriorated gate oxide reliability. This paper overviews the fundamental aspects of SiC-MOS devices and indicates intrinsic obstacles connected with an accumulation of both negative fixed charges and interface defects and with a small conduction band offset of the SiO2/SiC interface which leading to the increased gate leakage current of MOS devices. To overcome these problems, we proposed using aluminum oxynitride (AlON) insulators stacked on thin SiO2 underlayers for SiC-MOS devices. Superior flatband voltage stability of AlON/SiO2/SiC gate stacks was achieved by optimizing the thickness of the underlayer and nitrogen concentration in the high-k dielectrics. Moreover, we demonstrated reduced gate leakage current and improved current drivability of SiC-MOSFETs with AlON/SiO2 gate stacks.

    DOI

  • Impact of Stacked AlON/SiO2 Gate Dielectrics for SiC Power Devices (Invited)

    H. Watanabe, T. Kirino, Y. Uenishi, A. Chanthaphan, A. Yoshigoe, Y. Teraoka, S. Mitani, Y. Nakano, T. Nakamura, T. Hosoi, T. Shimura

    ECS Transactions   35 ( 2 ) 265 - 274  2011.05  [Refereed]  [Invited]

    　View Summary

    We propose the use of an aluminum oxynitride (AlON) gate insulator for SiC-based MOS power devices. Although direct deposition of AlON on 4H-SiC substrate causes electrical degradation, the fabricated MOS capacitor with AlON/SiO2 stacked gate dielectric shows no flatband voltage (V-FB) shift and negligible capacitance-voltage (C-V) hysteresis. Owing to the high dielectric constant of AlON, as compared to single SiO2 insulator, significant gate leakage reduction was achieved even at high-temperatures, especially in high electric field condition. Moreover, in order to improve electrical properties of thermally grown SiO2/SiC interfaces, the impact of a combination treatment of nitrogen plasma exposure and forming gas annealing (FGA) was investigated. We found that channel mobility enhancement of SiC-MOSFETs was consistent with the reduction in interface state density (D-it) depending on the process conditions of the combination treatment, and obtained 50% mobility enhancement, while maintaining low gate leakage current.

    DOI

  • SiO2/4H‐SiC界面構造と伝導帯オフセットの相関

    桐野嵩史, CHANTHAPHAN Atthawut, 池口大輔, 吉越章隆, 寺岡有殿, 箕谷周平, 中野佑紀, 中村孝, 細井卓治, 志村考功, 渡部平司

    応用物理学会学術講演会講演予稿集(CD-ROM)   71st   ROMBUNNO.14P-ZS-6  2010.08

    J-GLOBAL

  • 極薄EOT実現に向けたプラズマ窒化応用high‐k/Geゲートスタックの提案

    朽木克博, 岡本学, 秀島伊織, 上西悠介, 桐野嵩史, HARRIES James, 吉越章隆, 寺岡有殿, 細井卓治, 志村考功, 渡部平司

    応用物理学関係連合講演会講演予稿集(CD-ROM)   57th   ROMBUNNO.18P-P9-5  2010.03

    J-GLOBAL

  • 放射光XPSによるSiO2/4H‐SiC構造の伝導帯オフセット評価

    桐野嵩史, 景井悠介, 岡本学, HARRIES James, 吉越章隆, 寺岡有殿, 箕谷周平, 中野佑紀, 中村孝, 細井卓治, 志村考功, 渡部平司

    応用物理学関係連合講演会講演予稿集(CD-ROM)   57th   ROMBUNNO.18A-TJ-2  2010.03

    J-GLOBAL

  • 4H‐SiC(0001)面の熱酸化により形成したSiO2/SiC界面の放射光XPS評価

    桐野嵩史, 景井悠介, 岡本学, HARRIES James, 吉越章隆, 寺岡有殿, 箕谷周平, 中野佑紀, 中村孝, 細井卓治, 志村考功, 渡部平司

    応用物理学会学術講演会講演予稿集   70th ( 1 ) 385  2009.09

    J-GLOBAL

  • 界面特性に優れたAl2O3/ZrO2/GeO2積層構造ゲート絶縁膜の作製と評価

    岡本学, 朽木克博, 景井悠介, HARRIES James, 吉越章隆, 寺岡有殿, 細井卓治, 志村考功, 渡部平司

    応用物理学会学術講演会講演予稿集   70th ( 2 ) 743  2009.09

    J-GLOBAL

  • プラズマ窒化SiC表面の熱酸化により形成したSiO2/SiC界面の放射光XPS評価

    景井悠介, 小園幸平, 朽木克博, 吉越章隆, 寺岡有殿, 細井卓治, 志村考功, 渡部平司

    応用物理学関係連合講演会講演予稿集   56th ( 1 ) 438  2009.03

    J-GLOBAL

  • Mechanisms of Effective Work Function Modulation of Metal/Hf-based High-k Gate Stacks

    H. Watanabe, Y. Kita, T. Hosoi, T. Shimura, K. Shiraishi, Y. Nara, K. Yamada

    IEICE Technical Report   108 ( 335(SDM2008 184-195) ) 21 - 25  2008.12  [Refereed]  [Invited]

    　View Summary

    We systematically investigated instability of the effective work function (WF) of metal/Hf-based high-k gate stacks by means of the flat-band voltage (V_&lt;fb&gt;) shift in capacitance-voltage (C-V) curves and interface dipole characterized by x-ray photoelectron spectroscopy (XPS). We observed a negative V_&lt;fb&gt; shift and corresponding interface dipole caused by oxygen vacancy (V_o) in the Hf-based oxides and found that the energy gain due to electron transfer from the V_o level to the high-WF electrode determines V_o formation in the oxides. In contrast, we observed an opposite (positive) V_&lt;fb&gt; shift and interface dipole when Au electrodes were formed on cleaned Hf-based dielectrics. This indicates that Au-Hf bond hybridization at the Au/HfSiON interface also causes effective WF modulation, as theoretically predicted by Shiraishi et al. Moreover, the interface dipole caused by the hybridization was found to be stable under vacuum and dry ambient, but it was gradually released when the gate stacks were exposed to the air and wet ambient.

    CiNii J-GLOBAL

  • Mechanism of Effective Work Function Modulation of Metal/Hf-based High-k Gate Stacks

    H. Watanabe, Y. Kita, T. Hosoi, T. Shimura, K. Shiraishi, Y. Nara, K. Yamada

    PROCEEDINGS OF THE 72ND SYMPOSIUM ON SEMICONDUCTORS AND INTEGRATED CIRCUITS TECHNOLOGY   72nd   73 - 76  2008.07  [Refereed]  [Invited]

    CiNii J-GLOBAL

  • 格子間酸素に起因した金属電極/Hf系ゲート絶縁膜の実効仕事関数変調

    喜多祐起, 景井悠介, 細井卓治, 志村考功, 渡部平司, 白石賢二, 門島勝, 奈良安雄, 山田啓作

    応用物理学関係連合講演会講演予稿集   55th ( 2 ) 853  2008.03

    J-GLOBAL

  • Characteristics of Pure Ge_3N_4 Dielectric Layers Formed by High-Density Plasma Nitridation

    KUTSUKI Katsuhiro, OKAMOTO Gaku, HOSOI Takuji, SHIMURA Takayoshi, YASUTAKE Kiyoshi, WATANABE Heiji

      2007   1034 - 1035  2007.09

    CiNii

  • 放射光XPSによるGe3N4膜の化学結合状態及び熱脱離過程のその場観察

    細井卓治, 朽木克博, 岡本学, 原田真, 吉越章隆, 寺岡有殿, 志村考功, 渡部平司

    応用物理学会学術講演会講演予稿集   68th ( 2 ) 824  2007.09

    J-GLOBAL

  • Metal/High‐kゲートスタックの界面形態が実効仕事関数に及ぼす影響

    喜多祐起, 吉田慎一, 細井卓治, 志村考功, 渡部平司, 白石賢二, 門島勝, 奈良安雄, 山田啓作

    応用物理学会学術講演会講演予稿集   68th ( 2 ) 815  2007.09

    J-GLOBAL

  • Hf系ゲート絶縁膜/電極界面の実効仕事関数変調機構の統一的理解

    喜多祐起, 吉田慎一, 志村考功, 安武潔, 渡部平司, 白石賢二, 大田晃生, 宮崎誠一, 奈良安雄, 山田啓作

    応用物理学関係連合講演会講演予稿集   54th ( 2 ) 848  2007.03

    J-GLOBAL

  • sc-SSOI(超臨界膜厚SSOI)基板の評価

    吉田哲也, 小瀬村大亮, 掛村康人, 武井宗久, 斎藤博之, 小椋厚志, 志村考功, 小金澤智之, 広沢一郎

    応用物理学会学術講演会講演予稿集   68th ( 2 )  2007

    J-GLOBAL

  • メタル電極とHfSiON絶縁膜界面反応の評価

    喜多祐起, 吉田慎一, 渡辺康匡, 志村考功, 渡部平司, 安武潔, 赤坂泰志, 奈良安雄, 中村邦雄, 山田啓作

    精密工学会関西地方定期学術講演会講演論文集   2006   97 - 98  2006.08

    J-GLOBAL

  • Oxidation of Si(001) with a hyperthermal O-atom beam at room temperature: Suboxide distribution and residual order structure

    Masahito Tagawa, Chie Sogo, Kumiko Yokota, Akitaka Yoshigoe, Yuden Teraoka, Takayoshi Shimura

    Appl. Phys. Lett.   88 ( 13 ) 133512-133512-3  2006.03

    　View Summary

    Synchrotron radiation photoelectron spectroscopy (SR-PES) and crystal truncation rod (CTR) scattering profiles were used to investigate an ultrathin SiO2 overlayer on a Si(001) surface formed by a 5 eV O-atom beam at room temperature. The SR-PES spectra indicated that the suboxides in the O-atom-beam oxidized film were concentrated on the SiO2 surface rather than at the Si/SiO2 interface. The CTR scattering data of the O-atom-beam oxidation film had a lower intensity near (1 1 L) (0.3 &lt; L &lt; 0.8), suggesting a lower content of the SiO2 ordered structure in the oxide film. An inverse diffusion of the interstitial Si atoms in the oxidation kinetics can explain the data. (c) 2006 American Institute of Physics.

    DOI J-GLOBAL

  • X線反射率測定によるTiN/HfSiON界面の熱安定性評価

    川村浩太, 三島永嗣, 志村考功, 渡部平司, 安武潔, 神山聡, 赤坂泰志, 奈良安雄, 中村邦雄, 山田啓作

    精密工学会大会学術講演会講演論文集   2006   I04  2006.03

    DOI J-GLOBAL

  • Residual Order in Thermal Oxide Layers and Its applicatioin to the Study of Interface Reaction

    T. Shimura, E. Mishima, H. Watanabe, K. Yasutake, M. Umeno, K. Tatsumura, T. Watanabe, I. Ohdomaroi

      13-18  2006.02  [Invited]

  • Si熱酸化膜中の残留秩序構造と絶縁膜／Si界面反応研究への応用

    ゲートスタック研究会 －材料・プロセス・評価の物理－（第11回研究会）   13-18  2006

  • Si熱酸化膜中の残留秩序構造と絶縁膜／Si界面反応研究への応用

    ゲートスタック研究会 －材料・プロセス・評価の物理－（第11回研究会）   13-18  2006

  • Residual Order in Thermal Oxide Layers and Its applicatioin to the Study of Interface Reaction

      13-18  2006

  • Ordered Structure in the Thermal Oxide Layer on Silicon Substrates

    Takayoshi Shimura, Eiji Mishima, Heiji Watanabe, Kiyoshi Yasutake, Masataka Umeno, Kousuke Tatsumura, Takanobu Watanabe, Iwao Ohdomari, Keisaku Yamada, Satoshi Kamiyama, Yasushi Akasaka, Yasuo Nara, Kunio Nakamura

    Physics and Chemistry of SiO$_2$ and the Si-SiO$_2$ Interface 5    2005.10  [Invited]

  • X線反射率測定によるTiN/HfSiON界面の熱安定性評価

    川村浩太, 三島永嗣, 志村考功, 渡部平司, 安武潔, 神山聡, 赤坂泰志, 奈良安雄, 中村邦雄, 山田啓作

    応用物理学会学術講演会講演予稿集   66th ( 2 ) 684  2005.09

    J-GLOBAL

  • メタル電極形成条件がTiN/HfSiON界面反応と電気特性に及ぼす影響

    渡辺康匡, 吉田慎一, 喜多祐起, 志村考功, 渡部平司, 安武潔, 赤坂泰志, 奈良安雄, 中村邦雄, 山田啓作

    応用物理学会学術講演会講演予稿集   66th ( 2 ) 684  2005.09

    J-GLOBAL

  • 熱処理に伴うHfSiOx/SiO2/Si構造の界面酸化反応のX線CTR散乱測定

    三島永嗣, 川村浩太, 志村考功, 渡部平司, 安武潔, 神山聡, 赤坂泰志, 奈良安雄, 中村邦雄, 山田啓作

    精密工学会大会学術講演会講演論文集   2005 ( 0 ) J45 - 820  2005.09

    　View Summary

    X&amp;ndash;ray crystal truncation rod (CTR) scattering was applied to the measurement of oxidation reaction at the SiO&lt;sub&gt;2&lt;/sub&gt;/Si interface under high&amp;ndash;permittivity (high&amp;ndash;k) materials. Effects of the nitridation process and thermal annealing on the interface structure were investigated by monitoring the CTR intensity. We found that oxidation reaction at the interface has progressed during thermal annealing for HfO&lt;sub&gt;2&lt;/sub&gt;/SiO&lt;sub&gt;2&lt;/sub&gt;/Si and HfSiOx/HfO&lt;sub&gt;2&lt;/sub&gt;/Si structures. Oxidation reaction has also progressed during the nitridation process and post&amp;ndash;deposition annealing (PDA). However, the CTR intensity did not change during the thermal annealing for the nitrided sample, indicating the suppression effect of the nitridation on the oxidation reaction.

    DOI CiNii J-GLOBAL

  • 高誘電率ゲート絶縁膜とメタルゲート電極との界面反応の評価

    喜多祐起, 吉田慎一, 渡辺康匡, 志村考功, 渡部平司, 安武潔, 赤坂泰志, 奈良安雄, 中村邦雄, 山田啓作

    精密工学会大会学術講演会講演論文集   2005   J44  2005.09

    DOI J-GLOBAL

  • Reactions and diffusion of atomic and molecular oxygen in the SiO2 network

    K Tatsumura, T Shimura, E Mishima, K Kawamura, D Yamasaki, H Yamamoto, T Watanabe, M Umeno, Ohdomari, I

    PHYSICAL REVIEW B   72 ( 4 )  2005.07

    　View Summary

    To address the reactions and diffusion of atomic and molecular oxygen in SiO2, the modification of the SiO2 network on exposure to an atomic or molecular oxygen atmosphere is investigated by measuring the x-ray-diffraction profile of the residual order peak emanating from the oxide. Analyses of the peak intensity and its fringe pattern provide experimental evidence for the recent theoretical predictions, indicating that atomic oxygen is incorporated into the SiO2 network near the surface and diffuses toward the interface along with modifying it even at a low temperature of 400 degrees C, whereas molecular oxygen diffuses without reacting with the bulk SiO2 even at a temperature of 850 degrees C that is sufficiently high for oxidation reaction at the interface.

    DOI

  • Comparison of ordered structure in buried oxide layers in high-dose, low-dose, and internal-thermal-oxidation separation-by-implanted-oxygen wafers

    T Shimura, K Fukuda, K Yasutake, T Hosoi, M Umeno

    THIN SOLID FILMS   476 ( 1 ) 125 - 129  2005.04

    　View Summary

    The ordered SiO(2) in the buried oxide (BOX) layer of high-dose, low-dose, and internal-thermal-oxidation (ITOX) separation-by-implanted-oxygen (SIMOX) wafers was investigated by X-ray diffraction. From the results, it was found that the SiO(2) molecules in the low-dose and ITOX SIMOX wafers are better ordered than those in the high-dose SIMOX wafer and that the ordered structure of the ITOX layer is different from that of the originally formed BOX layer, suggesting that the ITOX layer has a structure similar to that of the ordered SiO(2) in the thermal oxide layer. (c) 2004 Elsevier B.V. All rights reserved.

    DOI

  • X線CTR散乱によるHfSiOx/SiO2/Si構造の界面残留秩序の測定

    三島永嗣, 川村浩太, 志村考功, 渡部平司, 神山聡, 赤坂泰志, 奈良安雄, 中村邦雄, 山田啓作

    応用物理学関係連合講演会講演予稿集   52nd ( 2 ) 904  2005.03

    J-GLOBAL

  • TiN/HfSiON界面反応がHigh‐k膜の結晶化温度と電気特性に及ぼす影響

    吉田慎一, 渡辺康匡, 志村考功, 渡部平司, 安武潔, 赤坂泰志, 奈良安雄, 中村邦雄, 山田啓作

    応用物理学関係連合講演会講演予稿集   52nd ( 2 ) 905  2005.03

    J-GLOBAL

  • Comparison of Ordered Structure in Buried Oxide Layers in High-dose, Low-dose, and Internal-thermal-oxidation Separation-by-implanted-oxygen Wafers

    Takayoshi Shimura, Kazunori Fukuda, Kiyoshi Yasutake, Takuji Hosoi, Masataka Umeno

    Thin Solid Films   476 ( 1 ) 125 - 129  2005.03  [Refereed]

    　View Summary

    The ordered SiO(2) in the buried oxide (BOX) layer of high-dose, low-dose, and internal-thermal-oxidation (ITOX) separation-by-implanted-oxygen (SIMOX) wafers was investigated by X-ray diffraction. From the results, it was found that the SiO(2) molecules in the low-dose and ITOX SIMOX wafers are better ordered than those in the high-dose SIMOX wafer and that the ordered structure of the ITOX layer is different from that of the originally formed BOX layer, suggesting that the ITOX layer has a structure similar to that of the ordered SiO(2) in the thermal oxide layer. (c) 2004 Elsevier B.V. All rights reserved.

    DOI

  • X-ray Diffraction Measurements of Internal Strain in Si Nanowires Fabricated using a Self-limiting Oxidation Process

    Takayoshi Shimura, Kiyoshi Yasutake, Masataka Umeno, Masao Nagase

    Appl. Phys. Lett.   86, 071903/,  2005.02

    DOI

  • X-ray diffraction measurements of internal strain in Si nanowires fabricated using a self-limiting oxidation process

    T Shimura, K Yasutake, M Umeno, M Nagase

    APPLIED PHYSICS LETTERS   86 ( 7 )  2005.02

    　View Summary

    We demonstrate x-ray diffraction measurements of internal strain in Si nanowires that were fabricated using a self-limiting oxidation process. Rod-shaped scattering around the 111 Bragg point due to interference effects from the Si nanowires were observed, which are robust reflections for incoherent displacement of the wires. From the shifts of the scattering in reciprocal space, the strain was estimated to be 1.0-1.5 x 10(-3) for the sample oxidized at 800degreesC for 300 min. (C) 2005 American Institute of Physics.

    DOI

  • Ordered Structure in the Thermal Oxide Layer on Silicon Substrates

    Physics and Chemistry of SiO$_2$ and the Si-SiO$_2$ Interface 5    2005

  • HfSiON膜中の局所絶縁劣化箇所のC-AFM観測－窒化による信頼性向上メカニズムの検討－

    渡辺康匡, 志村考功, 渡部平司, 安武潔, 神山聡, 有門経敏, 白石賢二, 梅澤直人, 知京豊裕, 山田啓作

    ゲートスタック研究会（第10回特別研究会）講演予稿集 p.327-331.   p.327-331  2005.01

  • Ordered Structure in the Thermal Oxide Layer on Silicon Substrates

    Physics and Chemistry of SiO$_2$ and the Si-SiO$_2$ Interface 5    2005

  • Ordered Structure in the Thermal Oxide Layer on Silicon Substrates

    Physics and Chemistry of SiO$_2$ and the Si-SiO$_2$ Interface 5    2005

  • Quasi Phase-contrast Imaging of the Variation in Lattice Spacing of Very Thin Si Layers

    Takayoshi Shimura, Eiji Mishima, Kiyoshi Yasutake, Shigeru Kimura, Masataka Umeno

    SPring-8 User Experiment Report, No.13, 2004A   No.13, 2004A/,  2004.11

  • Characterization of SOI wafers by synchrotron X-ray topography

    Takayoshi Shimura, Kazunori Fukuda, Kiyoshi Yasutake, Masataka Umeno

    Eur. Phys. J. Appl. Phys. 27, 439-442 (2004)   27 ( 1-3 ) 439 - 442  2004.09

    　View Summary

    Synchrotron X-ray topographs were taken for bonded silicon-on-insulator wafers. Under the grazing incident condition, the topographs of the top Si layer and the substrate are similar, which represent the variation in incident angle due to surface undulation. Furthermore, a circular concentric pattern was observed in the topographs of the top Si layer both at the grazing and higher incident angles. This shows that the concentric pattern is not due to surface undulation, but due to lattice distortion.

    DOI

  • Observation of Concentric Circular Patterns of State-of-the-art SOI Wafers by Large Area X-ray Topography

    Takayoshi Shimura, Eiji Mishima, Kiyoshi Yasutake, Shigeru Kiumura, Masataka Umeno

    SPring-8 User Experimenta Report, No.12 (2003B) 110.   No.12 (2003B) 110  2004.07

  • Characterization of SOI wafers by synchrotron X-ray topography

    T Shimura, K Fukuda, K Yasutake, M Umano

    EUROPEAN PHYSICAL JOURNAL-APPLIED PHYSICS   27 ( 1-3 ) 439 - 442  2004.07

    　View Summary

    Synchrotron X-ray topographs were taken for bonded silicon-on-insulator wafers. Under the grazing incident condition, the topographs of the top Si layer and the substrate are similar, which represent the variation in incident angle due to surface undulation. Furthermore, a circular concentric pattern was observed in the topographs of the top Si layer both at the grazing and higher incident angles. This shows that the concentric pattern is not due to surface undulation, but due to lattice distortion.

    DOI

  • Residual Order within Thernally Grown SiO$_2$ on Si(113) Substrate

    Kosuke Tatsumura, Takanobu Watanabe, Iwao Ohdomari, Toyohiro Chikyow, Takayoshi Shimura, Masataka Umeno

    Ext. Abst. of International Workshop on Dielectric Thin Films for Future ULIS Devices - Science and Technology, 2004, Tokyo    2004.05

  • Residual Order within Thernally Grown SiO$_2$ on Si(113) Substrate

    Ext. Abst. of International Workshop on Dielectric Thin Films for Future ULIS Devices - Science and Technology, 2004, Tokyo    2004

  • Observation of Concentric Circular Patterns of State-of-the-art SOI Wafers by Large Area X-ray Topography

    SPring-8 User Experimenta Report, No.12 (2003B) 110.   No.12 (2003B) 110  2004

  • Quasi Phase-contrast Imaging of the Variation in Lattice Spacing of Very Thin Si Layers

    SPring-8 User Experiment Report, No.13, 2004A   No.13, 2004A/,  2004

  • Development of Characterization Technique of SOI Wafers by Synchrotron X-ray Topography

    The Proceedings of the 4th International Symposium on Advanced Science and Technology of Silicon Materials    2004

    DOI

  • Low Temperature Laue Topography of Strontium titanate at SPring-8

    T.Ozaki, I.Fujimoto, K.Mizuno, S.Iida, K.Kajiwara, T.Taira, J.Yoshimura, T.Shimura, Y.Chikaura

    Nuclear Instruments and Methods in Physics Research B 199 (2003) 81-84   199   81 - 84  2003.04

    　View Summary

    We performed the X-ray Laue topography of strontium titanate from 300 K down to 4 K through the cubic-tetragonal phase transition temperature T-a = 105 K. We found that the {110} domain boundaries formed below T-a clearly showed the bright and dark stripe contrasts. The appearance of the contrasts depends on the diffraction vector g. The boundaries parallel to g show the strongest contrasts, while those normal to g show no contrasts. This proves the spontaneous deformation around the boundaries. The difference between the X-ray intensities of the adjacent bright and dark stripes shows the same temperature dependence as the order parameter. The present X-ray topography provides a new method of studying order parameters in structural phase transitions. (C) 2002 Elsevier Science B.V. All rights reserved.

    DOI

  • Beamline for Surface and Interface Structures at SPring-8

    O.Sakata, Y.Furukawa, S.Goto, T.Mochizuki, T.Uruga, K.Takeshita, H.Ohashi, T.Ohata, T.Matsushia, S.Takahashi, H.Tajiri, T.Ishikawa, M.Nakamura, M.Ito, K.Sumitani, T.Takahashi, T.Shimura, A.Saito, M.Takahashi

    Surface Review and Letters, Vol.10, 2-3 (2003) 543-547   10 ( 2-3 ) 543 - 547  2003.02

    　View Summary

    The main components of a new beamline for surface and interface crystal structure determination at SPring-8 are briefly described. Stages for the beamline monochromator are modified for making an incident X-ray intensity more stable for surface X-ray experiments. Absolute photon flux densities were measured with an incident photon energy. A new ultrahigh vacuum system is introduced with preliminary X-ray measurements from an ordered oxygen on Pt (111) surface.

  • Large-Area X-ray Topographs of Lattice Undulation of Bonded Silicon-on-insulator Wafers

    Kazunori Fukuda, Takayoshi Yoshida, Takayoshi Shimura, Kiyoshi Yasutake, Masataka Umeno

    Jpn. J. Appl. Phys. 42 (2003) L117-L119   42 ( 2A ) L117 - L119  2003.02  [Refereed]

    　View Summary

    X-ray topographs of bonded silicon-on-insulator (SOI) wafers were obtained using a synchrotron large X-ray beam. Wrinkled patterns in a micrometer scale were observed all over the wafers. Crumpled patterns were also observed, which were related to the lattice undulation at the average spatial interval of about 6 mm with the tilt angle of the order of ten arcsec. From the comparison with the topographs between the SOI layer and the substrate, it was also found that the warpage of the lattice plane of the SOI layer was different from that of the substrate.

    DOI

  • Existence of an Epitaxially Ordered Phase in the Buried Oxide of SIMOX Wafers

    Takayoshi Shimura, Takuji Hosoi, Kazunori Fukuda, Masataka Umeno

    Solid State Phenomnena   82-84   485 - 490  2002.12  [Refereed]

    　View Summary

    An ordered structure in the buried oxide layer of SIMOX wafers was found by using X-ray diffraction technique. The extra diffraction streaks from the ordered structure were observed at half-integer positions, such as 0.5 0.5 L (L=0.6 similar to1.6) and 0.5 1.5 L (L=0.3 similar to1.5), of Si index in the reciprocal space. These streaks disappeared when the buried oxide layer was removed, indicating the existence of an ordered structure in the buried oxide layer. Several structural models were examined by comparing with the intensity distributions, The formation process was also discussed in terms of the ordered SiO2 from the results of the samples annealed for the variety of time.

    DOI

  • Observation of Lattice Undulation of Commercial Bonded SOI Wafers by Synchrotron X-ray Topography

    K. Fukuda, T. Yoshida, T. Shimura, K. Yasutake, M. Umeno

    JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS   41 ( 11B ) L1325 - L1327  2002.11

    　View Summary

    Synchrotron X-ray topographs. of silicon-on-insulator (SOI) layers of two kinds of commercial bonded SOI wafers were obtained; one is fabricated by transferring an epitaxial layer over porous Si, and the other is processed using hydrogen-delamination-induced splitting. For the 2-mum-thick SOI layer of the former wafer, the quasi-periodical contrasts were observed in the topographs, which indicate that the lattice plane of the SOI layer undulated at spatial intervals of about 20 mum with a tilt angle of the order of ten arc seconds. It was also evident from the granular pattern in the topographs that the undulation existed in the SOI layer of 100 nm thickness for both of the wafers.

    DOI

  • In situ Ellipsometric Measurement during Growth of Ge on Si(111) by Molecular Beam Epitaxy

    Tetsuya Ikuta, Yoshifumi Yoshioka, Satoshi Kamei, Hiroyuki Hayashi, Takayoshi Shimura, Masataka Umeno

    Jpn. J. Appl. Phys, Vol.41 (2002) 2262-2265   41 ( 4 ) 2262 - 2265  2002.04

    　View Summary

    Ellipsometric measurements were applied to investigate Ge heteroepitaxial growth by molecular beam epitaxy on it Si(111) substrate, and the changes of optical constants and film thickness were monitored. Reflection high-energy electron diffraction (RHEED) patterns and atomic force microscopy (AFM) images were also observed. Remarkable changes of optical constants were observed during the film growth depending on the change Of Surface morphology due to the Stranski-Krastanov (S-K) growth mode of Ge films on Si(111). When Ge was grown further. the RHEED pattern showed the characteristic reconstruction surface of Ge(111) in spite of the Ge heteroepitaxial growth on Si(111) substrate. The change of optical constants during the film growth could he well explained in terms of the S-K growth mode and coalescence of islands. It is shown that in situ ellipsometry is a Useful method for investigating, the growth mode as well as monitoring the film thickness.

    DOI

  • Formation of Epitaxially Ordered SiO$_2$ in Oxygen-implanted Silicon during Thermal Annealing

    Takayoshi Shimura, Takuji Hosoi, Kazunori Fukuda, Masataka Umeno, Atsushi Ogura

    J. Cryst. Growth, 236 (2002) 37-40   236 ( 1-3 ) 37 - 40  2002.03  [Refereed]

    　View Summary

    The growth of epitaxially ordered SiO2 in oxygen-implanted silicon during thermal annealing was investigated. The implanted Si wafers were annealed for various durations at 1350degreesC. Diffraction streaks at 0.50.5L (L similar to 1) of Si were observed from these samples. The intensity of the streak gradually increased with annealing time, while the peak position and the width of the streak did not change. Referring to these results, the growth of the buried oxide layers is discussed in terms of the ordered structure. (C) 2002 Elsevier Science B.V. All rights reserved.

    DOI

  • Si(111)面上におけるSi_<1-X>Ge_X薄膜のMBE成長過程

    亀井 聡, 林 寛之, 神前 智憲, 志村 考功, 梅野 正隆

    精密工学会大会学術講演会講演論文集   2001 ( 2 ) 253 - 253  2001.09

    CiNii

  • Development of Characterization Technique of SOI wafers by X-ray Topography

    Takayoshi Shimura, Kazunori Fukuda, Yutaka Yamazaki, Takayoshi Yoshida, Masataka Umeno

    SPring-8 User Experiment Report No.6 (2000B) 80.    2001.05

    DOI

  • Construction of Topography stations at SPring-8 and First Observation

    Y.Chikaura, S.Iida, S.Kawado, K.Mizuno, S.Kimura, J.Matsui, M.Umeno, T.Ozaki, T.Shimura, Y.Suzuki, K.Izumi, K.Kawasaki, K.Kajiwara, T.Ishikawa

    J. Phys. D: Appl. Phys.   34 ( 10A ) A158 - A162  2001.05

    　View Summary

    Two topography experimental stations are presently available at SPring-8. The first, constructed at the short-length bending magnet beam line BL28, is designed to perform white- and selected wide-energy-range x-ray topography. The other is a high-resolution diffraction topography station located on the medium-length bending magnet beam line BL20, where the incoming beam displays a large cross section and high degree of parallelism This allows us to observe fine structures of three-dimensionally large crystals used in industry if high energy is employed. The construction concepts, as well as first, selected experimental results are presented.

    DOI CiNii

  • Monitoring of Si Molecular-Beam Epitaxial Growth by an Ellipsometric Method

    Yoshifumi Yoshioka, Tetsuya Ikuta, Toshiya Taji, Kouzou Mizobata, Takayoshi Shimura, Masataka Umeno

    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS   40 ( 1 ) 371 - 375  2001.01

    　View Summary

    【工学部論文データから移行】

    DOI CiNii

  • Direct Observation of the Gettering Processes of Fe Atoms in SOI Wafers by M$\ddot{o}$ssbauer Spectroscopy

    Yutaka Yoshida(Sizuoka Institute of Science, Technology, Satoshi Ogawa(Sizuoka, Institute of Science, Technology, Sigeru Endou(Sizuoka, Institute of Science, Technology, Takayoshi Shimura, Masataka Umeno

    Proceedings of the 3rd International Symposium on Advanced Science and Technology of Silicon Materials     630  2000.11

    　View Summary

    【工学部論文データから移行】

  • Investigation of SOI Wafers by X-ray Diffraction Techniques

    Takayoshi Shimura, Takuji Hosoi, Kiyoshi Yasutake, Masataka Umeno

    Proceedings of the 3rd International Symposium on Advanced Science and Technology of silicon MateHals     636 - 641  2000.11  [Refereed]

    　View Summary

    【工学部論文データから移行】

  • Development of Low Temperature Laue Topography at SPring-8

    Ozaki T., Kajiwara K., Mizuno K., Iida S., Fujimoto I., Yoshimura J., Shimura T., Chikaura Y.

    Meeting abstracts of the Physical Society of Japan   55 ( 2 ) 816 - 816  2000.09

    CiNii

  • Characterization of SOI wafers by X-ray CTR scattering

    T. Shimura, T. Hosoi, M. Umeno

    Journal of Crystal Growth   210 ( 1 ) 98 - 101  2000.03

    　View Summary

    The CTR scattering around the 1 1 1 Bragg point was observed from two kinds of SOI wafers, SIMOX and UNIBOND wafers. The intensity profile of the CTR scattering from the UNIBOND wafer showed that the top Si layer had a good crystal quality and its interfaces were very flat. The profile from the SIMOX wafer consisted of sharp and broad components, indicating that the crystalline quality around the interfaces were poor for both the top Si layer and the substrate. It was also influenced by an ordered SiO2 in the buried oxide layer.

    DOI

  • Ordered Structure in Buried Oxide Layers of SOI Wafers (Proceedings of the Second International Conference on SRMS(Synchrotron Radiation in Materials Science)(2))

    Japanese Journal of Applied Physics Pt. 1 Regular Papers, Short Notes & Review Papers   38 ( 1 ) 297 - 300  1999.06

    CiNii

  • Ordered Structure in Buried Oxide Layers of Soi Waters (共著)

    SHIMURA Takayoshi

    Jpn. J. Appl. Phys.   38 ( 1 ) 297 - 300  1999

    　View Summary

    【国立情報学研究所情報から移行】

  • Effects of the Substrate Crystals upon the Structure of Thermal Oxide Layers on Si(共著)

    SHIMURA Takayoshi

    CRYSTAL RESEARCH AND TECHNOLOGY   33 ( 4 ) 637 - 642  1998

    　View Summary

    【国立情報学研究所情報から移行】

    DOI CiNii

  • Comment on “Observation of a Distributed Epitaxial Oxide in Thermally Grown SiO2 on Si(001)"

    Takayoshi Shimura, Masataka Umeno, Isao Takahashi, Jimpei Harada

    Physical Review Letters   79 ( 24 ) 4932 - 4933  1997.12

    　View Summary

    A Comment on the Letter by A. Munkholm, et al., Phys. Rev. Lett. 75, 4254 (1995). The authors of the Letter offer a Reply. © 1997 The American Physical Society.

    DOI CiNii

  • Si熱酸化膜中のSiO2結晶相

    志村 考功, 梅野 正隆, シムラ タカヨシ, ウメノ マサタカ

    大阪大学低温センターだより   99   21 - 25  1997.07

    CiNii

  • The Crystalline SiO$_{2}$ in the Thermal Oxide Layers on Si Substrates

    Takayoshi Shimura, Masataka Umeno

      10 ( 3 ) 286  1997.06

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    【工学部論文データから移行】

  • The Crystalline SiO┣D22┫D2 in the Thermal Oxide Layers on Si Substratec(共著)

    SHIMURA Takayoshi

    Journal of the Japanese Society for Synchrotron Radiation Research   10 ( 3 ) 286  1997

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    【国立情報学研究所情報から移行】

  • X-ray Scattering from Crystalline SiO$_2$ in the Thermal Oxide Layers on Vicinal Si(111) Surfaces

    Takayoshi Shimura, Hiroshi Misaki, Masataka Umeno

    ACTA CRYSTALLOGRAPHICA A-FOUNDATION AND ADVANCES   52   C465 - C465  1996.08

    Research paper, summary (international conference)  

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    【工学部論文データから移行】

    DOI

  • X-ray Diffraction Evidence for the Existence of Epitaxial Microcrystallites in Thermally Oxidized SiO$_{2}$ Thin Films on the Si(111) Surface

    Takayoshi Shimura, Hiroshi Misaki, Masataka Umeno

    JOURNAL OF CRYSTAL GROWTH   166 ( 1-4 ) 786 - 791  1995.06

    　View Summary

    【工学部論文データから移行】

    DOI CiNii

  • Characterization of Growth Surface and Interface of Crystals by X-ray Scattering(共著)

    SHIMURA Takayoshi

      21 ( 5 ) 209  1994

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    【国立情報学研究所情報から移行】

  • Characterization of Growth Surface and Interface of Crystals by X-ray Scattering(共著)

    Jouranal of the Crystal Growth Society of Japan   21 ( 5 ) 209  1994

  • Structure of silicon oxide Si(001) growth at low temperature(共著)

    SHIMURA Takayoshi

    SURFACE SCIENCE   315 ( 3 ) L1021 - L1024  1994

    　View Summary

    【国立情報学研究所情報から移行】

  • Absolute measurement of CTR scattering and comparison with theoretical predictions(共著)

    SHIMURA Takayoshi

    PHYSICA B   198 ( 1-3 ) 195 - 196  1994

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    【国立情報学研究所情報から移行】

    DOI

  • X-RAY CRYSTAL TRUNCATION ROD SCATTERING FROM MBE GROWN (CAF2-SRF2)/SI(111) SUPERLATTICES

    J HARADA, Y ITOH, T SHIMURA, TAKAHASHI, I, JC ALVAREZ, NS SOKOLOV

    APPLIED SURFACE SCIENCE   75   263 - 268  1994.01

    　View Summary

    Fluoride CaF2-SrF2 superlattices (SLs) grown by molecular beam epitaxy have been studied by means of X-ray diffractometry for the first time. The diffraction patterns showed reasonably good crystalline quality of the SLs and a type-B epitaxial relation to the Si(111) substrate. From the analysis of the crystal truncation rod (CTR) profiles, based on the pseudomorphic model, it was obtained that despite the same high temperature (770 degrees C) of formation of the CaF2/Si(111) interface its structure depended on the growth temperature of the SLs. The shape of the CTR profiles confirmed the existence of the superlattice which consists of one or two monolayer thick SrF2 layers. Some CaF2/SrF2-interface roughness was noticeable.

    DOI CiNii

  • 14p-DL-10 Structure of microcrystals grown on Si(001)substrate : low temperature oxidation.

    Takahashi I., Nakano K., Harada J., Shimura T., Umeno M.

    Abstracts of the meeting of the Physical Society of Japan. Sectional meeting   1993 ( 2 ) 607 - 607  1993.09

    CiNii

  • X-RAY CHARACTERIZATION OF THE MBE GROWN CrF┣D22┫D2/CaF┣D22┫D2 SUPERSTRUCTURES ON Si(III)SUBSTRATE(共著)

    SHIMURA Takayoshi

    Acta Crystallographica Supplement   A49,319/,  1993

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    【国立情報学研究所情報から移行】

  • THE DIFFUSE X-RAY SCATTERING FROM A CRYSTAL SURFACE POSSESSING SOME ROUGHNESS(共著)

    SHIMURA Takayoshi

    Acta Crystallographica supplement   A49,319/,  1993

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    【国立情報学研究所情報から移行】

  • EVALUATION OF THE THEORIES OF CTR SCATTERING BY ABSOLUTE MEASUREMENT OF ITS INTENSITIES(共著)

    SHIMURA Takayoshi

    Acta Crystallographica supplement   A49,318/,  1993

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    【国立情報学研究所情報から移行】

  • Epitaxial Grown Microcrystals in thermally Oxidized Amorphous SiO┣D22┫D2 Film on Si(001)Waters(共著)

    SHIMURA Takayoshi

    Extended Abstracts of the 1993 International Conference on Solid State Devices and Materials   615  1993

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    【国立情報学研究所情報から移行】

  • X-ray diffraction evidence for epitaxial microcrystallinity in thermally oxidized SiO┣D22┫D2 thin films on the Si(001)surface(共著)

    SHIMURA Takayoshi

    JOURNAL OF PHYSICS-CONDENSED MATTER   5 ( 36 ) 6525 - 6536  1993

    　View Summary

    【国立情報学研究所情報から移行】

    DOI

  • A New Technique for the Observation of X-ray CTR Scattering by Using an Imaging Plate Detector. (共著)

    SHIMURA Takayoshi

    JOURNAL OF APPLIED CRYSTALLOGRAPHY   26 ( 2 ) 151 - 158  1993

    　View Summary

    【国立情報学研究所情報から移行】

    DOI CiNii

  • 30a-ZB-7 X-ray Diffraction Study on SiO_2 Crystalline in Amorphous SiO_2 Film.

    SHIMURA T, IIDA Y, TAKAHASHI I, HARADA J

      47 ( 2 ) 533 - 533  1992.03

    CiNii

  • Observation and Analysis of Growth Surface of Crystals by X-ray Scattering(共著)

    SHIMURA Takayoshi

    Proceeding of the second R. O. C-Japan Joint Seminar on Crystallography   29  1992

    　View Summary

    【国立情報学研究所情報から移行】

  • Characterization of the(0001)surface of ice In crystal by crystal truncation rod scattering with the use of a synchrotron radiation source(共著)

    SHIMURA Takayoshi

    JOURNAL OF CRYSTAL GROWTH   121 ( 3 ) 360 - 364  1992

    　View Summary

    【国立情報学研究所情報から移行】

    DOI

  • 27a-L-8 The Structural Study of SiO_2/Si(001) by X-ray CTR Scattering II

    shimura Takayoshi, Harada Jimpei, Samata Syuichi, Matsushita Yoshiaki

      46 ( 2 ) 479 - 479  1991.09

    CiNii

  • A Structural study of the Thermally oxidized Si(001)water by X-ray CTR scattering(共著)

    SHIMURA Takayoshi

    SURFACE SCIENCE   258 ( 1-3 ) 235 - 238  1991

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    【国立情報学研究所情報から移行】

  • THE CHARACTERIZATION OF THE(111)FACET FACES ON THE SEED CONE OF[100]SILICON SINGLE CRYSTALS GROWN BY MCZ AND CZ METHODS BY X-RAY CTR SCATTERING(共著)

    SHIMURA Takayoshi

    JOURNAL OF CRYSTAL GROWTH   104 ( 4 ) 773 - 779  1990

    　View Summary

    【国立情報学研究所情報から移行】

    DOI

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Industrial Property Rights

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Syllabus

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Teaching Experience

  • Seminar in Precision Science and Technology I

    2020
    -
    　
     

  • Seminar in Precision Science and Technology II

    2020
    -
    　
     

  • Seminar in Precision Science and Technology III

    2020
    -
    　
     

  • Seminar in Precision Science and Technology IV

    2020
    -
    　
     

  • Applied SurfaceScience

    2020
    -
    　
     

  • Exercises in Computer Programming

    2020
    -
    　
     

  • Scientific Measurement I

    2020
    -
    　
     

  • Numerical Analysis and Exercise

    2020
    -
    　
     

  • Applied SurfaceScience

    2019
    -
    　
     

  • Exercises in Computer Programming

    2019
    -
    　
     

  • Scientific Measurement I

    2019
    -
    　
     

  • Numerical Analysis and Exercise

    2019
    -
    　
     

  • Applied SurfaceScience

    2018
    -
    　
     

  • Scope of Precision Science and Technology II

    2018
    -
    　
     

  • Numerical Analysis and Exercise

    2018
    -
    　
     

  • Scientific Measurement I

    2018
    -
    　
     

  • Exercises in Computer Programming

    2018
    -
    　
     

  • Applied SurfaceScience

    2017
    -
    　
     

  • Numerical Analysis and Exercise

    2017
    -
    　
     

  • Scientific Measurement I

    2017
    -
    　
     

  • Exercises in Computer Programming

    2017
    -
    　
     

  • Applied SurfaceScience

    2016
    -
    　
     

  • Exercises in Computer Programming

    2016
    -
    　
     

  • Numerical Analysis and Exercise

    2016
    -
    　
     

  • Scientific Measurement I

    2016
    -
    　
     

  • Scientific Measurement I

    2015
    -
    　
     

  • Numerical Analysis and Exercise

    2015
    -
    　
     

  • Exercises in Computer Programming

    2015
    -
    　
     

  • Applied SurfaceScience

    2015
    -
    　
     

  • Applied SurfaceScience

    2014
    -
    　
     

  • Exercises in Computer Programming

    2014
    -
    　
     

  • Numerical Analysis and Exercise

    2014
    -
    　
     

  • Scientific Measurement I

    2014
    -
    　
     

  • Applied SurfaceScience

    2013
    -
    　
     

  • Exercises in Computer Programming

    2013
    -
    　
     

  • Numerical Analysis and Exercise

    2013
    -
    　
     

  • Scientific Measurement I

    2013
    -
    　
     

  • Applied SurfaceScience

    2012
    -
    　
     

  • Exercises in Computer Programming

    2012
    -
    　
     

  • Numerical Analysis and Exercise

    2012
    -
    　
     

  • Scientific Measurement I

    2012
    -
    　
     

  • Exercises in Computer Programming

    2011
    -
    　
     

  • Numerical Analysis and Exercise

    2011
    -
    　
     

  • Applied SurfaceScience

    2011
    -
    　
     

  • Scope of Precision Science and Technology II

    2011
    -
    　
     

  • Scientific Measurement I

    2011
    -
    　
     

  • Scientific Measurement I

    2010
    -
    　
     

  • Advanced Laser Spectroscopy

    2010
    -
    　
     

  • Scope of Precision Science and Technology II

    2010
    -
    　
     

  • Exercises in Computer Programming

    2010
    -
    　
     

  • Applied SurfaceScience

    2010
    -
    　
     

  • Numerical Analysis and Exercise

    2010
    -
    　
     

  • Numerical Analysis and Exercise

    2009
    -
    　
     

  • Advanced Laser Spectroscopy

    2009
    -
    　
     

  • Applied SurfaceScience

    2009
    -
    　
     

  • Exercises in Computer Programming

    2009
    -
    　
     

  • Scientific Measurement I

    2009
    -
    　
     

  • Applied SurfaceScience

    2008
    -
    　
     

  • Numerical Analysis and Exercise

    2008
    -
    　
     

  • Scientific Measurement I

    2008
    -
    　
     

  • Exercises in Computer Programming

    2008
    -
    　
     

  • Special Topics IIon Advanced Science and Biotechnology

    2008
    -
    　
     

  • Scientific Measurement I

    2007
    -
    　
     

  • Information Literacy A

    2007
    -
    　
     

  • Exercises in Computer Programming

    2007
    -
    　
     

  • Numerical Analysis and Exercise

    2007
    -
    　
     

  • Seminar in Precision Science and TechnologyII

    2006
    -
    　
     

  • Seminar in Precision Science and TechnologyＩ

    2006
    -
    　
     

  • Seminar in Precision Sience and Technology I

    2006
    -
    　
     

  • Information Literacy A

    2006
    -
    　
     

  • Exercises in Computer Programming

    2006
    -
    　
     

  • Metrology in Precision Engineering

    2006
    -
    　
     

  • Scientific Measurement I

    2006
    -
    　
     

  • Exercises in Computer Programming

    2003
    -
    　
     

  • Information Literacy A

    2003
    -
    　
     

  • Seminar II

    1997
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Academic Activities

  • The Forum on the Science and Technology of Silicon Materials 2018

    Academic society, research group, etc.

    The 145th Committee on Processing and Characterization of Crystals of Japan Society for the Promotion of Science (JSPS)  

    2018.11
    -
    　

  • Third International Symposium on Atomically Controlled Fabrication Technology

    Academic society, research group, etc.

    The Global COE Program "Atomically Controlled Fabrication Technology"  

    2010.11
    -
    　

  • Second International Symposium on Atomically Controlled Fabrication Technology

    Academic society, research group, etc.

    The GCOE Program "Atomically Controlled Fabrication Technology"  

    2009.11
    -
    　

  • First International Symposium on Atomically Controlled Fabrication Technology -Surface and Thin Film Processing -

    Academic society, research group, etc.

    The Global COE Program "Atomically Controlled Fabrication Technology"  

    2009.02
    -
    　

  • 放射光を用いた結晶評価の新展開 ～X線トポグラフィーによる半導体評価を中心として～

    Exhibition

    2008.11
    -
    　

  • The 4th International Symposium on Advanced Science and Technology of Silicon Materials

    Academic society, research group, etc.

    The 145th Committee on Processing and Characterization of Crystals of Japan Socety for the Promotion of Science (JSPS)  

    2004.11
    -
    　

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Research Institute

  • 2024
    　
    　

    Waseda Research Institute for Science and Engineering   Concurrent Researcher