Updated on 2022/01/28

写真a

 
TATSUMI, Kohei
 
Affiliation
Faculty of Science and Engineering, Graduate School of Information, Production, and Systems
Job title
Professor

Research Institute

  • 2020
    -
    2022

    理工学術院総合研究所   兼任研究員

Education

  •  
    -
    1983

    RWTH Aachen   Graduate School, Division of Materials Science   Allgemeine Metallkunde und Metallphsik  

  •  
    -
    1978

    Waseda University   Graduate School, Division of Science and Engineering   Metallurgy  

  •  
     
     

    Waseda University   Faculty of Science and Engineering   Metallurgy  

Degree

  • RWTH Aachen (Germany)   Dr.-Ing.

Research Experience

  • 2010
    -
     

    Waseda University   Graduate School of Information Production and Systems

  • 2008
    -
    2010

    新日鉄マテリアルズ 取締役技術部長

  • 2008
    -
    2010

    新日鉄マテリアルズ(現:日鉄ケミカル&マテリアル) 取締役技術部長

  • 2001
    -
    2008

    新日本製鐵株式会社 先端技術研究所 新材料研究部長

  • 2001
    -
    2008

    新日本製鐵(現:日本製鉄)株式会社 先端技術研究所 新材料研究部長

  • 2002
    -
    2003

    Tokyo Institute of Technology   School of Engineering

  • 1983
    -
    2001

    新日本製鐵株式会社 先端技術研究所

  • 1983
    -
    2001

    新日本製鐵(現:日本製鉄) 株式会社 先端技術研究所

  • 1994
    -
    1996

    Tokyo Institute of Technology   School of Engineering

▼display all

Professional Memberships

  •  
     
     

    エレクトロニクス実装学会

  •  
     
     

    日本金属学会

  •  
     
     

    応用物理学会

 

Research Areas

  • Structural materials and functional materials

Research Interests

  • Electronic Materials

Papers

  • Filler‐dependent changes in thermal, dielectric, and mechanical properties of epoxy resin nanocomposites

    Emiri Nagase, Tomonori Iizuka, Kohei Tatsumi, Naoshi Hirai, Yoshimichi Ohki, Shigeyoshi Yoshida, Takahiro Umemoto, Hirotaka Muto

    IEEJ Transactions on Electrical and Electronic Engineering   16 ( 1 ) 15 - 20  2021.01

    DOI

  • Fabrication and PD-initiated Breakdown of Simulated Mica Tape Insulation Containing Epoxy Nanocomposites

    Tomonori Iizuka, Xuping Liu, Jun Mai, Kohei Tatsumi, Toshikatsu Tanaka, Takahiro Mabuchi, Xiaohong Yin, Takahiro Umemoto, Hirotaka Muto

        1 - 4  2020.10  [Refereed]

  • Analysis of Discharge Erosion Processes in Epoxy Silica Nanocomposite

        95 - 98  2020.09  [Refereed]

  • An Embedded SiC Module with Using NMPB Interconnection for Chevron Shaped Cu Lead and Electrodes

    Naoki Fukui, Keiko Koshiba, Itaru Miyazaki, Isamu Morisako, Tomonori Iizuka, Tomoya Itose, Masayuki Hikita, Rikiya Kamimura, Kohei Tatsumi

    2020 IEEE 70th Electronic Components and Technology Conference (ECTC)   2020-June   2226 - 2229  2020.06  [Refereed]

     View Summary

    © 2020 IEEE. As for the IGBT power device based on Si used for the vehicle, the performance limit of the Si semiconductor has been pointed out, and the SiC semiconductor has been attracting attention as a next-generation semiconductor. The SiC semiconductor has advantages such as a wider band gap, a larger breakdown electric field, and high temperature operation (about 300 ° C.). If these features can be maximized, a SiC power semiconductor module that can be significantly improved in efficiency, downsized, and operable in a high-temperature environment as compared with a Si semiconductor can be more widely implemented.In this study, two sets of SiC-MOS and SiC-SBD devices are embedded in a ceramic substrate, and their electrodes and the copper electrodes of the substrate are interconnected by NMPB (Nickel Micro-plating Bonding) method, so that one-leg prototype inverter modules of a highly heat-resistant and ultra-small size (47x30x1.3mm) could be manufactured. The NMPB method is a technology that we have originally developed to connect a chip electrode and a lead formed in a chevron shape by Ni plating. High-temperature operation and excellent switching characteristics of the SiC power module were demonstrated.

    DOI

  • Mechanics of direct bonding: Splitting forces

    Y. Zimin, T. Ueda, K. Tatsumi

    Sensors and Actuators A: Physical   303   1 - 7  2020.03  [Refereed]

    DOI

  • Thermal Resistance and Transient Thermal Analysis of SiC Power Module Using Ni Micro Plating Bonding

    Akihiro Imakiire, Masahiro Kozako, Masayuki Hikita, Kohei Tatsumi, Masakazu Inagaki, Tomonori Iizuka, Nobuaki Sato, Koji Shimizu, Kazutoshi Ueda, Kazuhiko Sugiura, Kazuhiro Tsuruta, Keiji Toda

    IEEJ Transactions on Industry Applications   139 ( 10 ) 838 - 846  2019.10

    DOI

  • Electroluminescence of Epoxy Resin Nanocomposite Under AC High Field

    Kazuyuki Tohyama, Tomonori Iizuka, Kohei Tatsumi, Yasutomo Otake, Takahiro Umemoto, Takahiro Mabuchi, Hirotaka Muto

    2019 IEEE Conference on Electrical Insulation and Dielectric Phenomena (CEIDP)     78 - 81  2019.10  [Refereed]

    DOI

  • High Temperature Resistant Packaging Technology for SiC Power Module by Using Ni Micro-Plating Bonding

    Kohei Tatsumi, Isamu Morisako, Keiko Wada, Minoru Fukuomori, Tomonori Iizuka, Nobuaki Sato, Koji Shimizu, Kazutoshi Ueda, Masayuki Hikita, Rikiya Kamimura, Naoki Kawanabe, Kazuhiko Sugiura, Kazuhiro Tsuruta, Keiji Toda

    2019 IEEE 69th Electronic Components and Technology Conference (ECTC)     1451 - 1456  2019.05  [Refereed]

     View Summary

    There is an increasing expectation to incorporate silicon carbide (SiC) as inverter power modules for hybrid electric vehicles (HEVs) and electric vehicles (EVs). In order to maximize the performance of SiC devices, new packaging technologies that can realize high-temperature heat resistance by replacing solder joint or Al wire bonding, have been strongly demanded. In order to meet these demands, we have developed a new interconnection technology named Nickel micro-plating bonding (NMPB), that enables the interconnection in a narrow gap between electrodes of SiC devices and substrates via our newly designed lead frame, whose lead surface is formed into chevron shape. The plating bath for NMPB is a sulfamic acid bath consisting of nickel sulfamate and several additives, and was specifically prepared to plate narrow areas at the bonding interface without plating defects. It was found that when columnar crystal grains grow from both facing electrode surfaces, a strong bond without defects such as micro-voids at the interface is obtained. The bonding strength of NMPB was confirmed by shear test to be higher than that of Pb free solder joints and not to deteriorate even after high temperature storage (HTS) tests at 250 degrees C for 1000hrs and after 1000cycle thermal cycle tests (TCTs, 250 degrees C/-45 degrees C). The NMPB was applied to the manufacture of one leg SiC inverter power module using two pairs of SiC MOS-FETs and SBDs, which were interconnected with a newly designed lead frame for double sided cooling structure. After molding resin copper heat spreaders were formed on the outer surfaces of both sides of the NMPB leads by additive method. Our newly developed SiC power module showed stable I-V characteristics over 250 degrees C and lower switching loss. The reliability of the modules was confirmed by TCTs and power cycle tests.

    DOI

  • Development and evaluation of SiC inverter using Ni micro plating bonding power module

    Akihiro Kawagoe, Tomoya Itose, Akihiro Imakiire, Masahiro Kozako, Masayuki Hikita, Kohei Tatsumi, Tomonori Iizuka, Isamu Morisako, Nobuaki Sato, Koji Shimizu, Kazutoshi Ueda, Kazuhiko Sugiura, Kazuhiro Tsuruta, Keiji Toda

    2019 IEEE International Workshop on Integrated Power Packaging (IWIPP)     36 - 39  2019.04  [Refereed]

    DOI

  • Study on high temperature resistant die bonding formed by Al/Ni nano-particles composite paste

    Yasunori Tanaka, Tatsumasa Wakata, Norihiro Murakawa, Tomonori Iizuka, Kohei Tatsumi

    International Symposium on Microelectronics   2018 ( 1 ) 000442 - 000446  2018.10

     View Summary

    <title>Abstract</title>
    In power modules using SiC devices, high temperature operation is expected. Therefore, a bonding technology having high temperature resistance of 250°C or more is required. In recent years, research on low temperature sintering bonding by Ag nanoparticles, Cu nanoparticles and sub-micron particles has been conducted as a new bonding technology corresponding to SiC power devices. Nanoparticles are sintered at a temperature much lower than the sintering temperature in ordinary powder metallurgy. We focus on Ni having high melting point and excellent corrosion resistance as a new bonding material and are conducting research on high temperature resistant interconnection technology using Ni nanoparticles. We have found that bonding is possible at a bonding temperature of 400°C or less and enable to interconnect SiC devices for high temperature operation. However, there are still following problems to be improved, as follows, especially for a large chip size : Voids formed in the bonding layer and cracks generaled stress caused by a difference in thermal expansion coefficient(CTE). In this paper, we propose a bonding material of composite paste in which Ni nanoparticles and Al particles are mixed. From the results of the research, it was found that the occurrence of cracks and gas void was suppressed by mixing Al particles. Also the thermal stress analysis by FEM, the addition of Al particles shows to reduce the thermal stress during thermal cycle test (TCT).

    DOI

  • High temperature resistant interconnection for SiC power devices using Ni micro-electroplating and Ni nano particles

    Kohei Tatsumi, Yasunori Tanaka, Tomonori Iizuka, Keiko Wada, Minoru Fukumori, Isamu Morisako, Yoon Jeongbin, Norihiro Murakawa

    2018 7th Electronic System-Integration Technology Conference (ESTC)    2018.09  [Refereed]

    DOI

  • Development of Packaging Technology for High Temperature Resistant SiC Module of Automobile Application

    Kohei Tatsumi, Masakazu Inagaki, Kazuhito Kamei, Tomonori Iizuka, Hiroaki Narimatsu, Nobuaki Sato, Koji Shimizu, Kazutoshi Ueda, Akihiro Imakiire, Masayuki Hikita, Rikiya Kamimura, Kazuhiko Sugiura, Kazuhiro Tsuruta, Keiji Toda

    2017 IEEE 67th Electronic Components and Technology Conference (ECTC)     1316 - 1321  2017.05  [Refereed]

    DOI

  • Niメッキによる高生産性パワーデバイス接合技術

    巽 宏平, 飯塚智徳

    応用物理   86 ( 2 ) 112 - 116  2017.02

  • Synthesis of SiC coating from SiO by a chemical vapor deposition (CVD) process

    Norihiro MURAKAWA, Masanori EGUCHI, Kohei TATSUMI

    Journal of the Ceramic Society of Japan   125 ( 3 ) 85 - 87  2017  [Refereed]

    DOI

  • Synthesis of SiC layer on metal silicon from SiO by a chemical vapor deposition process

    Norihiro MURAKAWA, Tomonori IIZUKA, Masanori EGUCHI, Kohei TATSUMI

    Journal of the Ceramic Society of Japan   125 ( 6 ) 516 - 519  2017  [Refereed]

    DOI

  • High-temperature-resistant interconnection by using Nickel Nano-particles for power devices packaging

    Tomonori Iizuka, Yasunori Tanaka, Kazuhito Kamei, Masakazu Inagaki, Norihiro Murakawa, Kohei Tatsumi

    2016 International Symposium on Semiconductor Manufacturing (ISSM)    2016.12  [Refereed]

    DOI

  • The reliability of Ag wedge bonding with various bonding pads for power devices

    Xing Wei, Zhou Yu, Ge Yan, Tomonori Iizuka, Kohei Tatsumi

    International Symposium on Microelectronics   2016 ( 1 ) 000385 - 000389  2016.10

     View Summary

    <title>Abstract</title>
    Recent years, with the development of intelligent vehicles, power devices would be widely used. But traditional Si power devices have problems under high temperature. Now, there is a tendency that using SiC instead of Si in power devices, as SiC has a higher band gap 3.25 eV comparing with 1.12 eV of Si. So that SiC power devices can withstand higher temperature and voltage. Also SiC power devices have the advantages of lower parasitic parameters, smaller device size and shorter response time. In this study, to investigate the reliability of Ag wedge bonding, Ag wires were bonded on Al pad and Au-Ni pad. And then we did shear test after high temperature storage life test (HTSL). Finally, we used energy dispersive X-ray spectroscopy (EDS) to do cross-section observation. The results show that, for Al pad, the shear strength has decreased after annealing at 300°C with mold packages, cracks and corrosion were observed. For Au-Ni pad, the shear strength has increased after annealing, and no cracks or corrosion formed. So Ag bonding wire is proposed as an alternative to Al bonding wire for selected metal pads in power devices.

    DOI

  • Reliability of silver wedge bonding for power devices

    Xing Wei, Zhou Yu, Wanmeng Xu, Tomonori Iizuka, Kohei Tatsumi

    International Symposium on Microelectronics   2015 ( 1 ) 000735 - 000739  2015.10

     View Summary

    Recently there is a trend toward to use SiC instead of Si in power devices since SiC can withstand higher temperature (above 300°C) and higher voltage with less power loss than Si. So there is a great interest to improve interconnection technique for power devices package. In this study, Ag wire with diameter of 200 μm was bonded on Al pad, after annealing at 200°C and 300°C, intermetallic compounds (IMC) were investigated by energy dispersive X-ray spectroscopy (EDS). The results show that, when annealed in air, two kinds of IMC Ag2Al and Ag3 Al formed and no voids or cracks were observed; but when annealed with epoxy molded IC package, voids were observed, and between Ag wire and IMC there was a corrosion layer.

    DOI

  • High temperature resistant packaging for SiC power devices using interconnections formed by Ni micro-electro-plating and Ni nano-particles

    Yasunori Tanaka, Keito Ota, Haruka Miyano, Yoshiaki Shigenaga, Tomonori IiZuka, Kohei Tatsumi

    2015 IEEE 65th Electronic Components and Technology Conference (ECTC)     1371 - 1376  2015.05  [Refereed]

    DOI

  • Role of Interface in Highly Filled Epoxy/BaTiO3 Nanocomposites. Part II-Effect of Nanoparticle Surface Chemistry on Processing, Thermal Expansion, Energy Storage and Breakdown Strength of the Nanocomposites

    Xingyi Huang, Liyuan Xie, Ke Yang, Chao Wu, Pingkai Jiang, Shengtao Li, Shuang Wu, Kohei Tatsumi, Toshikatsu Tanaka

    IEEE TRANSACTIONS ON DIELECTRICS AND ELECTRICAL INSULATION   21 ( 2 ) 480 - 487  2014.04  [Refereed]

     View Summary

    Highly filled dielectric polymer nanocomposites with high dielectric constant nanoparticles (e. g., BaTiO3) have promising application in many fields such as energy storage. The effectiveness of these nanoparticles to increase the dielectric constant and energy density of the resulting nanocomposites has already been demonstrated. However, the role of interface between the nanoparticles and polymer matrix on thermal expansion, energy storage and breakdown strength-the three parameters that are important for practical application of the dielectric polymer nanocomposites, has not been systematically documented. In this contribution, we investigated the effect of six kinds of nanoparticle surface chemistry on the processing, coefficient of thermal expansion, energy storage and breakdown strength of highly filled epoxy/BaTiO3 nanocomposites. It was found that all these aspects, in particular the processability of the nanocomposites, are associated with the nanoparticle surface chemistry. Combining the processability, coefficient of thermal expansion, energy storage and breakdown strength of the nanocomposites, we conclude that the nanoparticles functionalized by silane coupling agents with terminal groups capable of reacting with the epoxy matrix are more suitable for preparing highly filled dielectric polymer nanocomposites.

    DOI

  • Role of Interface in Highly Filled Epoxy/BaTiO3 Nanocomposites. Part I-Correlation between Nanoparticle Surface Chemistry and Nanocomposite Dielectric Property

    Xingyi Huang, Liyuan Xie, Ke Yang, Chao Wu, Pingkai Jiang, Shengtao Li, Shuang Wu, Kohei Tatsumi, Toshikatsu Tanaka

    IEEE TRANSACTIONS ON DIELECTRICS AND ELECTRICAL INSULATION   21 ( 2 ) 467 - 479  2014.04  [Refereed]

     View Summary

    The interface is critical for the design of polymer nanocomposites with desirable properties. The effect of interface behavior on the properties of polymer nanocomposites with low nanoparticle loading has been well documented. However, our understanding of the role of the interface in highly filled polymer nanocomposites is still limited because of the lack of comprehensive research work. In this contribution, by using BaTiO3 nanoparticles with six kinds of surface chemistry, we have prepared highly filled epoxy nanocomposites (50 vol% nanoparticle loading). The role of nanoparticle surface chemistry on the dielectric properties of epoxy nanocomposites is investigated at a wide frequency and temperature range by using broadband dielectric spectroscopy. Combining the microstructure analysis of the highly filled nanocomposites with a comprehensive X-ray photoelectron spectroscopy characterization of the surface chemistry of the BaTiO3 nanoparticles, an understanding is formed of the correlation between the nanoparticle surface chemistry and the dielectric properties of the nanocomposites. The functional group density, functional group type, and electrical properties of the modifier-the three parameters that are inherent from the nanoparticle surface modification-have a strong impact on the temperature and frequency dependence of the dielectric constant and dielectric loss tangent. This work demonstrates the great importance of surface chemistry in tuning the electrical properties of dielectric polymer nanocomposites.

    DOI

  • エポキシ/シリカコンポジットの部分放電特性に及ぼすナノフィラー添加効果と劣化抑制機構

    周玉清, 飯塚智徳, 田中祀捷, 巽宏平

    電気学会誘電・絶縁材料研究会資料   DEI-14-36   35 - 40  2014

  • エポキシ/アルミナコンポジットの部分放電試験における温度依存性

    林 紀全, 飯塚 智徳, 田中 祀捷, 巽 宏平

    電気学会研究会資料   2014 ( 46-55 ) 47 - 51  2014.01

  • High temperature resistant packaging for SiC power devices using interconnections formed by Ni micro-electroplating

    Noriyuki Kato, Akiyoshi Shigenaga, Kohei Tatsumi

    SILICON CARBIDE AND RELATED MATERIALS 2013, PTS 1 AND 2   778-780   1110 - 1113  2014  [Refereed]

     View Summary

    High temperature SiC devices require the materials for packaging also capable of working at higher temperature than those for Si devices. SiC devices are expected to help hybrid vehicle power control units (PCUs) produce higher power in a more compact size as SiC can withstand higher voltages and temperatures (above 300 degrees C) than silicon with less power loss. The improvement of interconnection technologies is increasingly becoming a top priority, particularly for the operation of SiC devices at relatively high temperatures. We propose a new interconnection method using nickel electroplating to replace Al wire bonding or die-bonding using solder materials. During the evaluation of the reliability of interconnections annealed at up to 500 degrees C, we observed no significant changes in mechanical or electrical properties. We found that micro-plating connections can be used successfully for high-temperature-resistant packaging for SiC devices.

    DOI

  • Alloying behaviour of electroplated Ag film with its underlying Pd/Ti film stack for low resistivity interconnect metallization

    Hirokazu Ezawa, Masahiro Miyata, Kohei Tatsumi

    Journal of Alloys and Compounds   587   487 - 492  2014

     View Summary

    In this paper, viability of electroplated Ag film into device application was studied. Alloying behavior of the Ag film with its underlying Pd(50 nm)/Ti(100 nm) film stack was investigated with respect to heat treatment at different temperatures from 400 °C to 800 °C in an argon ambient. After annealing at 400 °C, the electrical resistivity of the Ag film increased due to Pd alloying with Ag. Formation of Pd-Ti intermetallic phases became dominant over Ag-Pd alloying with increasing annealing temperature, leading to the resistivity decrease of the Ag film. The resistivity of the 800 °C annealed Ag film approached that of its as-plated Ag film. The excess Ti atoms which were not consumed to form the intermetallic phases with the Pd atoms migrated to the Ag film surface to form Ti oxides along the Ag grain boundaries on the topmost film surface. The Ag/Pd/Ti film stack has been confirmed to maintain the resistivity of the Ag film at as-plated low levels after high temperature annealing. This paper also discusses process integration issues to enable the Ag metallization process for future scaled and three dimensionally chip stacked devices. © 2013 Elsevier B.V. All rights reserved.

    DOI

  • New High-Temperature-resistant Packaging for SiC Power Devices Using Connectins Formed by Nickel Electroplating

    Kohei Tatsumi, Noriyuki Kato

    Proceedings of ICEP   TC3-3   269 - 273  2013

  • High-Temperature-Resistant Interconnections Formed by using Nickel micro-plating and Ni nano-particles for Power Devices

    Noriyuki Kato, Suguru Hashimoto, Tomonori Iizuka, Kohei Tatsumi

    JIEP   1   87 - 92  2013

  • Synthesis of nano-composite powder composed of silica and carbon and characteristic behavior at a high temperature thereof

    Norihiro Murakawa, Minghao Wang, Kohei Tatsumi

    Journal of the Ceramic Society of Japan   121 ( 1410 ) 250 - 253  2013

     View Summary

    A nano-composite powder composed of silica and carbon with a unique property could be prepared from a mixture of a silicate compound and an epoxy compound, in which the silica within the nano-composite powder has a BET surface area of as high as greater than 800 m2/g although the nano-composite powder has a BET surface area of less than 10m2/g. It was estimated that the silica and the carbon are in a very finely and uniformly mixed state within the nano-composite powder and that the silica and the carbon form particles having a diameter of several tens nm and a number of silica particles having a diameter of several nm exist within the every particle of the nano-composite powder. It was demonstrated that the nano-composite powder exhibits characteristic behaviors under calcination at a temperature of 1450°C such that an amorphous state of the nano-composite powder is maintained, a large amount of gaseous reactant generates from the nano-composite powder, and a reaction product of SiC is synthesized in the presence of another ingredient. © 2013 The Ceramic Society of Japan. All rights reserved.

    DOI

  • Process integration of fine pitch Cu redistribution wiring and SnCu micro-bumping for power efficient LSI devices with high-bandwidth stacked DRAM

    Hirokazu Ezawa, Takashi Togasaki, Tatsuo Migita, Soichi Yamashita, Masahiro Inohara, Yasuhiro Koshio, Masatoshi Fukuda, Masahiro Miyata, Kohei Tatsumi

    Microelectronic Engineering   103 ( 103 ) 22 - 32  2013

     View Summary

    This paper deals with the process integration to produce a high performance processor with a large-scale and high-bandwidth DRAM chip stacked. Ten micrometres pitch Cu redistribution wiring has been implemented on 12 in. DRAM wafers to relocate the Al bond pads where 40 lm pitch SnCu bumps are formed for a large number of I/Os of the memory interface. A phenol-melamine based resin film which is curable at less than 250 °C can be used so as to avert detraction from memory retention yield as well as to insulate the Cu lines, leading to reduction of wafer warpage in an effort to enable fine pitch lithography. In a chip-on-chip joining process, the logic chip is interconnected with the DRAM chip with a less than 1 μm accuracy by mass reflow bonding of the SnCu micro-bumps on both of the chips, revealing the self-aligning effect of the solder bumps. No failures have been observed after reliability stressing on the packaged two-chip stack. The present process integration has been qualified for the mass producing line to provide some merchant LSI devices and will be viable to future generation devices with more chips stacked using through Si via technology.

    DOI

  • エポキシ/シリカ・アルミナコンポジットのトリーイング開始V-t特性

    飯塚智徳, 巽宏平, 田中祀捷

    電気学会放電研究会資料   ED-11 ( 15-19.21-23 ) 13 - 18  2011.01

  • Investigation of heavily nitrogen-doped n(+) 4H-SiC crystals grown by physical vapor transport

    Noboru Ohtani, Masakazu Katsuno, Masashi Nakabayashi, Tatsuo Fujimoto, Hiroshi Tsuge, Hirokatsu Yashiro, Takashi Aigo, Hosei Hirano, Taizo Hoshino, Kohei Tatsumi

    JOURNAL OF CRYSTAL GROWTH   311 ( 6 ) 1475 - 1481  2009.03  [Refereed]

     View Summary

    Heavily nitrogen-doped n(+) 4H-SiC single crystals were grown by the physical vapor transport (PVT) method. The nitrogen incorporation kinetics in a heavily doped regime was studied in terms of growth temperature dependence, and it was revealed that the growth temperature substantially influenced the amount of nitrogen incorporated into the crystals and their surface step structures on the (0 0 0 (1) over bar )C facet plane. The structural quality of heavily nitrogen-doped 4H-SiC crystals was examined by X-ray rocking curve measurements and defect selective etching by molten KOH at around 500 degrees C. The crystals contained an extremely low density of 3C-SiC inclusions and stacking faults and showed a comparable crystalline quality to conventionally doped 4H-SiC substrates. Furthermore the structural stability of the heavily nitrogen-doped 4H-SiC substrates during high-temperature treatments has been investigated. The substrates with a large {0 0 0 1} surface roughness showed a resistivity increase after annealing at 1100 degrees C for 2 h, which was confirmed to be caused by the formation and expansion of double Shockley-type basal plane stacking faults in the substrates. The occurrence of the stacking faults largely depended on the surface preparation conditions of substrates, which indicate that the primary nucleation sites of stacking faults exist in the near-surface regions of substrates. (C) 2009 Elsevier B.V. All rights reserved.

    DOI

  • Stacking Fault Formation in Highly Nitrogen-doped 4H-SiC Substrates with Different Surface Preparation Conditions

    M. Katsuno, M. Nakabayashi, T. Fujimoto, N. Ohtani, H. Yashiro, H. Tsuge, T. Aigo, T. Hoshino, K. Tatsumi

    SILICON CARBIDE AND RELATED MATERIALS 2007, PTS 1 AND 2   600-603   341 - 344  2009  [Refereed]

     View Summary

    The stacking fault formation in highly nitrogen-doped n+ 4H-SiC single crystal substrates during high temperature treatment has been investigated in terms of the surface preparation conditions of substrates. Substrates with a relatively large surface roughness showed a resistivity increase after annealing at 1100 degrees C, which was confirmed to be caused by the formation and expansion of double Shockley-type basal plane stacking faults in the substrates. The occurrence of the stacking faults largely depended on the surface preparation conditions of the substrates, which indicates that the primary nucleation sites of stacking faults exist in the near-surface regions of substrates. In this regard, mechano-chemically polished (MCP) substrates with a minimum surface roughness (&lt; 0.3 nm) exhibited no resistivity increase and very few stacking faults after annealing even when the nitrogen concentration of the substrates exceeded 1 X 10(19) cm(-3).

  • Improvement of Thermal Fatigue Properties of Sn-Ag-Cu Lead-Free Solder Interconnects on Casio&apos;s Wafer-Level Packages Based on Morphology and Grain Boundary Character

    S. Terashima, T. Kohno, A. Mizusawa, K. Arai, O. Okada, T. Wakabayashi, M. Tanaka, K. Tatsumi

    JOURNAL OF ELECTRONIC MATERIALS   38 ( 1 ) 33 - 38  2009.01  [Refereed]

     View Summary

    Thermal fatigue properties of commercial LF35 (Sn-1.2Ag-0.5Cu-0.05Ni), SAC105 (Sn-1Ag-0.5Cu), and SAC305 (Sn-3Ag-0.5Cu) solders on Casio&apos;s wafer-level packages are discussed from the viewpoints of both morphology and grain boundary character. Orientation imaging microscopy revealed that both LF35 and SAC305 resisted the coarsening of tin grains during thermal fatigue as compared with SAC105, correlating with their greater fraction of coincidence site lattice boundaries. This seems to explain why LF35 has superior thermal fatigue life in spite of its lower silver content.

    DOI

  • Growth of Crack-free 100mm-diameter 4H-SiC Crystals with Low Micropipe Densities

    M. Nakabayashi, T. Fujimoto, M. Katsuno, N. Ohtani, H. Tsuge, H. Yashiro, T. Aigo, T. Hoshino, H. Hirano, K. Tatsumi

    SILICON CARBIDE AND RELATED MATERIALS 2007, PTS 1 AND 2   600-603   3 - 6  2009  [Refereed]

     View Summary

    The theromoelastic stress in post-growth SiC crystals has been investigated in order to suppress the cracks which were frequently observed in SiC crystals with larger diameters. Optimizing the temperature distribution in growing crystals lead to reduction of tensile stress components, and thus resulting in crack-free 100mm diameter SiC crystals with micropipe (MP) densities of 0.025/cm(2) The concept of process optimization we established is confirmed to be effective to the growth of large diameter SiC crystals with mechanical stability.

  • Development of Lapping and Polishing Technologies of 4H-SiC Wafers for Power Device Applications

    Hirokatsu Yashiro, Tatsuo Fujimoto, Noboru Ohtani, Taizo Hoshino, Masakazu Katsuno, Takashi Aigo, Hiroshi Tsuge, Masashi Nakabayashi, Hosei Hirano, Kohei Tatsumi

    SILICON CARBIDE AND RELATED MATERIALS 2007, PTS 1 AND 2   600-603   819 - 822  2009  [Refereed]

     View Summary

    The development of lapping and polishing technologies for SiC single crystal wafers has realized the fabrication of an extremely flat SiC wafer with excellent surface quality. To improve the SiC wafer flatness, we developed a four-step lapping process consisting of four stages of both-side lapping with different grit-size abrasives. We have applied this process to lapping of 2-inch-diameter SiC wafers and obtained an excellent flatness with TTV (total thickness variation) of less than 3 Am, LTV (local thickness variation) of less than 1 mu m, and SORI smaller than 10 mu m. We also developed a novel MCP (mechano-chemical polishing) process for SiC wafers to obtain a damage-free smooth surface. During MCP, oxidizing agents added to colloidal silica slurry, such as NaOCl and H(2)O(2), effectively oxidize the SiC wafer surface, and then the resulting oxides are removed by colloidal silica. AFM (atomic force microscope) observation of polished wafer surface revealed that this process allows us to have excellent surface smoothness as low as Ra=0.168 nm and RMS=0.2 nm.

  • パワー素子向け導電性4H-SiC単結晶基板の開発動向

    大谷昇, 中林正史, 勝野正和, 藤本辰雄, 柘植弘志, 藍郷崇, 矢代弘克, 平野芳生, 星野泰三, 巽宏平

    日本学術振興会第161・162委員会合同研究会 資料   3/14   15 - 21  2008.03

  • Thermal fatigue properties and grain boundary character distribution in Sn-xAg-0.5Cu (x=1, 1.2 and 3) lead free solder interconnects

    S. Terashima, M. Tanaka, K. Tatsumi

    SCIENCE AND TECHNOLOGY OF WELDING AND JOINING   13 ( 1 ) 60 - 65  2008.01  [Refereed]

     View Summary

    Thermal fatigue properties of Sn-xAg-0.5Cu (x51,1.2 and 3, mass%) lead free solder interconnects were discussed from the viewpoints of both morphology and grain boundary character distribution. 3Ag showed the longer thermal fatigue life than 1Ag and 1.2Ag. Both cracks, which were initiated by thermal strain, and grain boundary damage due to grain boundary sliding degraded the thermal fatigue lives. From a microstructural observation using orientation imaging microscopy, recrystallisation of tin grains was observed, and 3Ag suppressed coarsening of tin grains after further thermal fatigue as compared with 1Ag and 1.2Ag. Moreover, 3Ag showed a larger amount of coincidence site lattice boundaries than 1Ag and 1.2Ag. It is suggested that in 3Ag not only smaller tin grains but also larger amount of coincidence site lattice boundaries suppressed crack propagation and grain boundary sliding.

    DOI

  • Lead-free micro-ball bumping for flip chip and wafer level packaging

    Kohei Tatsumi, Shinji Ishikawa, Eiji Hashino, Masamoto Tanaka, Tsutomu Sasaki, Yoshiyuki Uchiyama, Hiroyuki Yamamoto, Taro Kohno, Masahiro Miyauchi, Takayuki Kaneko

    Proceedings IMAPS DEVICE Packaging 2007   03/19   1 - 6  2007

  • Lead-free solder micro-ball bumps for the next generation of flip chip interconnection: Micro-ball materials, bump formation process and reliability

    Shinji Ishikawa, Tomoyuki Uchiyama, Eiji Hashino, Taro Kohno, Masamoto Tanaka, Kohei Tatsumi

    57TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, 2007 PROCEEDINGS   57   872 - +  2007  [Refereed]

     View Summary

    Micro-ball wafer bumping (MBB) technology, which has capability of fine pitch bumping such as 150-mu m pad pitch and the advantages of adjusting the optimum material combinations of joints, was brought into practice. High productivity and yield were achieved by employing an inspection and the repair process with special equipment, and a void-less reflow process was established. Package-level reliability tests were performed for chips with Ti/NiV/Cu-UBM and Sn-Ag-Cu solder bumps using MBB technology with excellent results. An evaluation on reliability was also conducted with Sn-1.2Ag-0.5Cu-Ni solder and pure tin solder bumps. As a result of multiple reflow cycle tests for Ti/NiV/Cu-UBM and various lead-free solders, the shape of IMC and the spalling of IMC were influenced by the total amount of Cu and Ni in the solder and the UBM composition. Ti/NiV/Cu-UBM can be applied to, various solders by changing the thickness of the surface Cu layer according to the composition of the solder.

  • Grain refinement of high-purity FCC metals using equal-channel angular pressing

    Zenji Horita, Kaoru Kishikawa, Keiichi Kimura, Kohei Tatsumi, Terence G. Langdon

    RECRYSTALLIZATION AND GRAIN GROWTH III, PTS 1 AND 2   558-559   1273 - +  2007  [Refereed]

     View Summary

    Equal-channel angular pressing (ECAP) is a valuable technique for refining grain sizes to the submicrometer or the nanometer range. This study explores the reason for the difference in the grain refining behavior between pure Al and pure Cu. First, very high purity levels were adopted in order to minimize any effects of impurities: 99.999% for Al and 99.99999% for Cu. Second, high purity (99.999%) Au was also used in order to examine the effect of stacking fault energy. All three pure metals were subjected to ECAP and microstructural observations and hardness measurements were undertaken with respect to the number of ECAP passes. It is concluded that the stacking fault energy plays an important role and accounts for the difference in the grain refining behavior in the ECAP process.

  • Effect of Ni addition on bending properties of Sn-Ag-Cu lead-free solder joints

    Takayuki Kobayashi, Yoshiharu Kariya, Tsutomu Sasaki, Masamoto Tanaka, Kohei Tatsumil

    57TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, 2007 PROCEEDINGS   57   684 - +  2007  [Refereed]

     View Summary

    Effect of Ni addition on the bending properties of Sn-Ag-Cu lead-free solder joints was investigated. Three point bending tests were conducted with a 324pin flip chip specimen at 10 Hz frequency and with 3mm substrate displacement. The test temperatures were 298K and 398K. At each temperature, Sn-1.2Ag-0.5Cu with a small amount of Ni addition, LF35 showed higher performance. The reason LF35 showed higher bending performance was discussed based on a mechanical fatigue test using a micro bulk specimen. Ni addition caused a fine subgrain of beta-Sri, hence the crack propagation mechanism is changed, resulting in the improved fatigue performance of LF35.

  • ボール搭載法によるバンプ形成用Ti/NiV/Cu-UBMの安定性と信頼性 (MES 2006 第16回)

    石川信二, 内山朋幸, 橋野英児, 河野太郎, 巽宏平

    Microelectronics Symposium (MES)論文集 エレクトロニクス実装学会   16   19 - 22  2006

  • Improvement in drop shock reliability of Sn-1.2Ag-0.5Cu BGA interconnects by Ni addition

    Masamoto Tanaka, Tsutomu Sasaki, Takayuki Kobayashi, Kohei Tatsumi

    56TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE 2006, VOL 1 AND 2, PROCEEDINGS   56   78 - +  2006  [Refereed]

     View Summary

    The drop shock reliability of an Sn-Ag-Cu solder system in ball grid array (BGA) interconnects were improved by selecting a lower Ag chemical content and the addition of a small amount of Ni. The drop shock reliability of Sn-Ag-Cu solder in BGA interconnects was enhanced by the addition of small amount of Ni, and LF35(Sn-1.2Ag-0.5Cu-Ni) had twice better drop shock reliability than LF45(Sn-3.OAg-0.5Cu). One of the main reasons is the solder with lower Ag contents in the Sn-Ag-Cu solder system demonstrated softer properties in terms of hardness. Different intermetallic compound (IMC) layer morphologies were found on the Cu electrodes after reflow between Sn-1.2Ag-0.5Cu-Ni and Sn3.0Ag-0.5Cu, in which the former is smooth IMC and the latter is like a peninsula IMC. Different cracks modes were also detected. Cracks in Sn-1.2Ag-0.5Cu-Ni were mainly inside solder and cracks in Sn-3.OAg-0.5Cu were near the solder/electrode interface for all drop shocks tested. From SEM, EPMA mapping and TEM analysis, the small amount of doped Ni was mostly segregated at the interface. The doped Ni mainly existed in the Cu6Sn5 IMC layer region as formed (Cu,Ni)(6)Sn-5, and the Cu3Sn IMC region contains less Ni. Both different IMC morphologies and crack locations were discussed on the basis of the lattice distortion relaxation. The Cu6Sn5 peninsula IMC growth was discussed that was caused by the compression stress of itself, and the Sn-3.0Ag-0.5Cu crack inside the IMC was also discussed that was caused by the difference stress between Cu6Sn5 (compression stress) and Cu3Sn (tensile stress). Namely, the: doped Ni was substituted for the Cu site Of Cu6Sn5 and their lattice distortions were relaxed due to the smaller atomic radius of Ni compared with Cu. The stress difference between (Cu,Ni)6Sn5 and Cu3Sn was relieved by the Ni substitutions, which improved the drop shock reliability in BGA of Sn1.2Ag-0.5Cu-Ni.

  • IMC growth of solid state reaction between Ni UBM and Sn-3Ag-0.5Cu and Sn-3.5Ag solder bump using ball place bumping method during aging

    S Ishikawa, E Hashino, T Kono, K Tatsumi

    MATERIALS TRANSACTIONS   46 ( 11 ) 2351 - 2358  2005.11  [Refereed]

     View Summary

    The bumps for flip chip interconnection are becoming smaller and smaller. Since lead-free solders became popular, Ni-based under bump metallization (UBM) has attracted attention in recent years because of their slower reaction rate than traditional Cu-based UBM. However, there is little data concerning the solid state reaction between small lead-free solder bumps and Ni-based UBM. In this work, Sn-3Ag-0.5Cu and Sn3.5Ag solder bumps were fabricated with 110-mu m-diameter solder balls on electrolytic Ni, and the growth kinetics of intermetallic compound (IMC) layers and the morphology of bumps during long-term aging were investigated. The IMC layer exhibited parabolic growth, and the activation energy values for the Sn-3Ag-0.5Cu or Sn-3.5Ag solder/Ni UBM were obtained. The growth rate accelerated at 463 K or above. (Ni,Cu)(3)Sn-4 or Ni3Sn4 IMC was formed mainly at the solder/Ni interface after long-term aging. Large voids were formed at the solder/IMC interface at 463 K or above. The voids are the result of stress by volume expansion due to IMC growth. Coarse Ag(3)sn grains were observed adjacent to the voids and contributed to void initiation.

  • Thermal bond reliability of high reliability gold alloy wires for automotive IC’s

    Tomohiro Uno, Keiichi Kimura, Kohei Tatsumi

    Proceedings international Symposium on Microelectronics     557 - 565  2005

  • An application of micro-ball wafer bumping to double ball bump for flip chip interconnection

    K Tatsumi, Y Yamamoto, K Iwata, E Hashino, S Ishikawa, T Kohno

    55th Electronic Components & Technology Conference, Vols 1 and 2, 2005 Proceedings   55 ( 11 ) 855 - 860  2005  [Refereed]

     View Summary

    Micro-ball wafer bumping method was applied to forming double ball bumps, which increased the bump height to improve the reliability of the flip chip interconnection. The micro solder balls of 100um in diameter were transferred and connected to the whole electrode-pads covered with UBMs(Under Bump Metals) of an 8 inch wafer in one stroke using a fully automated micro ball mounter, which was originally developed. The balls were held on fluxed pads and melted in a reflow furnace. After cleaning the flux residue, the wafer bumped with micro-balls was then encapsulated with epoxy resin containing silica fillers by using Apic Yamada's wafer level molding system. The molding resin was spread to the whole wafer by compressing with a heated flat plate, where the top of the solder bumps were covered with an elastic parting film. The supplied resin volume was previously adjusted to the desired molding thickness. The exposed top of the ball bumps was cleaned and then second micro-ball bumping was processed on the top of the first bumps. The first and second balls were connected by reflowing to form the double ball bumps. The height variation and shear strength of double ball bumps were evaluated. To compare the reliability for the different type of bumps the TCTs and FEM analysis were performed for the chips connected with PCBs.

  • フリップチップ実装の進化と今後の行方-マイクロボールバンピング技術とその高精度化

    巽宏平

    ISS産業科学システムズ主催 第33回フリップチップ実装新技術シンポジウム論文集   33   40 - 62  2003

  • 実装における接続材料と信頼性

    宇野智裕, 巽宏平

    実装技術ガイドブック2002年 工業調査会   5   50 - 55  2002

  • フリップチップ実装実施のキーポイント-バンプ形成技術の最新動向とその特徴/マイクロボールバンピング技術

    巽宏平

    ISS産業科学システムズ主催 第25回フリップチップ実装新技術シンポジウム論文集   25   87 - 109  2002

  • アルミ合金電極上への無電解メッキによるNi/Au下地膜(UBM)形成プロセス解析と半田バンプ形成

    山本幸弘, 橋野英児, 巽宏平

    Proceedings of the 7th Microjoining and Assembly Technology in Electronics   8   109 - 114  2002

  • Significant reduction of wire sweep using Ni plating to realise ultra fine pitch wire bonding

    S Terashima, Y Yamamoto, T Uno, K Tatsumi

    52ND ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, 2002 PROCEEDINGS   52   891 - 896  2002  [Refereed]

     View Summary

    Significant reduction of the wire sweep in molding is proposed because the wire sweep is considered to be the major problem to realise wire bonding with ultra fine pitches of under 30 micrometers. In the present proposal, Ni was plated for several micrometers before molding on bonded Au wires. Ni plating was carried out by means of electroless plating for several minutes in the aqueous solution kept at 358K containing Ni and P. The wire sweep ratio for Ni plated wire (total diameter was 21 micrometers) was almost half of that for Au wire with the diameter of 15 micrometers except Ni plate, and was slightly smaller than that for Au wire with the diameter of 25 micrometers except Ni plate even the total diameter was smaller. It is considered that wire sweep suppression by this technique was due to the enhancement of both elastic and plastic properties.

  • 狭ピッチ用金ボンディングワイヤ

    宇野智裕, 寺嶋晋一, 巽宏平, 北村修

    電子材料   40 ( 7 ) 76 - 82  2001.07

  • 高密度50μm狭ピッチ接続におけるワイヤボンディング接合技術の開発

    宇野智裕, 寺嶋晋一, 北村修, 巽宏平

    新日鉄技報   374   22 - 26  2001

  • マイクロボールバンプ形成技術

    巽宏平, 橋野英児, 山本幸弘, 下川健二

    新日鉄技報   374   41 - 46  2001

  • Au/Al接合部における接合信頼性と支配要因

    宇野智裕, 巽宏平

    溶接学会論文誌   19 ( 1 ) 156 - 166  2001

  • Thermal Reliability in Gold-Aluminum Bonds encapsulated in Bi-phenyl Epoxy Resin

    Tomohiro Uno, Kohei Tatsumi

    Microelectronics Reliability   40   145 - 153  2001

  • Micro-ball wafer bumping for flip chip interconnection

    E Hashino, K Shimokawa, Y Yamamoto, K Tatsumi

    51ST ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE   51   957 - 964  2001  [Refereed]

     View Summary

    A new wafer bumping method using micro-balls was developed that can be used for high-density LSI assembly, specifically for Flip Chip interconnection. Micro solder balls with the diameter ranging from 60 mum to 200 mum were first formed with a high level of accuracy and sphericity. These balls were transferred and bonded to the whole electrode-pads of an 8-inch wafer in one stroke using a fully automated micro ball mounter, which was newly developed. The balls were held on fluxed pads and melted in a reflow furnace. The fluxing was performed using unique stamp system. The productivity and the yield were evaluated under the following conditions. The number of chips on an 8 inch wafer was 616, Pad pitch was 250 mum, Pad number of a chip was 635 (25x25 area array), and the total number of balls on a wafer was 385,000. The yield of forming bumps was confirmed to be higher than 99.995% without repairing and the cycle time of micro ball bumping was ca. 5 min. for an 8 inch wafer. The bump height variation, the bump shear strength and the bond reliability were evaluated in comparison with other methods.

  • Micro- Ball Bumping Technology

    Kohei Tatsumi, Eiji Hashino, Yukihiro Yamamoto, Kenji Shimokawa

    Nippon Steel Technical Report   84   46 - 52  2001

  • IMC Growth of Solid State Reaction between Ni UBM and Sn&#8211;3Ag&#8211;0.5Cu and Sn&#8211;3.5Ag Solder Bump Using Ball Place Bumping Method during Aging

    Shinji Ishikawa, Eiji Hashino, Taro Kono, Kohei Tatsumi

    MATERIALS TRANSACTIONS, JIM   42 ( 5 ) 803 - 808  2001

  • 50μm Fine Pitch Ball Bonding Technology

    Tomohiro Uno, Shinichi Terashima, Osamu Kitamura, Kohei Tatsumi

    Nippon Steel Technical Report   84   24 - 29  2001

  • 半導体実装分野は金属材料研究課題の宝庫

    巽 宏平

    まてりあ : 日本金属学会会報   39 ( 7 ) 600 - 600  2000

  • フリップチップ、TAB用マイクロボールバンプ形成技術

    巽宏平, 下川健二, 橋野英児

    電子材料   5   19 - 26  1999

  • AuバンプとCu配線上のSnめっき層における接合性および長期信頼性

    寺嶋晋一, 宇野智裕, 巽宏平

    Proceedings of 5th Microjoining and Assembly Technology in Electronics   5   45 - 50  1999

  • Au/Al接合部における金属間化合物相成長とボイド生成"

    宇野智裕, 巽宏平

    日本金属学会誌   7   828 - 837  1999

  • Au-Ag合金とAlとの接合部の拡散挙動および接合信頼性に及ぼす影響

    宇野智裕, 巽宏平

    日本金属学会誌   12   1545 - 1554  1999

  • Micro-Ball Bumping Technology for Flip Chip and TAB Interconnections

    K.Tatsumi, K.Shimokawa, E.Hashino, Y.Ohzeki, T.Nakamori, M.Tanaka

    The International Journal of Microcircuits and Electronic Packaging   22 ( 2 ) 127 - 136  1999

  • Bond reliability of cost effective Au-Ag alloy wire

    T Uno, K Tatsumi

    1999 INTERNATIONAL SYMPOSIUM ON MICROELECTRONICS, PROCEEDINGS   3906   450 - 455  1999  [Refereed]

     View Summary

    Highly-alloyed Au-Ag bonding wire could be effective in saving material costs. We investigated the effects of Ag alloying on ball formation, bond strength and bond reliability. Even with high Ag concentration (similar to 50at%), ball was formed spherically. Bond strength and ball deformability were good enough for IC's assembling when concentration of Ag was less than 30at%. Thermal reliability of bonds between Au-Ag wire and Al pad had the unique dependence of Ag concentration. Ball bonds of Au-14at%Ag yielded significant degradation through annealed. On the contrary bonds of Au-24at%Ag provided as good reliability as a commercial pure Au wire after annealed at 473K-1000h. The bond reliability has the connection with intermetallic growth as well as diffusion behavior at the bond interface. The growth of intermetallics was different from that of pure Au/Al bonds. Optimizing the Ag concentration in the wire was effective in improving the bond reliability.

  • Micro-Ball Bump Technology for Fine-Pitch Interconnections

    K.Shimokawa, E.Hashino, Y.Ohzeki, K.Tatsumi

    Proceedings of the 48th Electronic Components and Technology Conference   48   1472 - 1478  1998

  • フリップチップ接続用マイクロボールバンプ

    下川健二, 橋野英児, 大関義雄, 巽宏平

    電子情報通信学会 信学技報   12   71 - 78  1998

  • Micro-Ball Bump Technology for Flip Chip and TAB Interconnections

    K.Tatsumi, K.Shimokawa, E.Hashino, Y.Ohzeki, T.Nakamori, M.Tanaka

    Proceedings of AESF SUR/FIN 98 Annual Internat. Technical Conf.     123 - 133  1998

  • Micro-ball bump for flip chip interconnections

    K Shimokawa, E Hashino, Y Ohzeki, K Tatsumi

    48TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE - 1998 PROCEEDINGS   48   1472 - 1476  1998  [Refereed]

     View Summary

    Micro-ball bump technology has been developed for flip chip (FC) interconnections. This technology is based on (1) a production method of fine metal balls (micro-balls) and (2) a gang-bonding method for forming bumps (micro-ball bumps) on chip electrodes. Solder balls of 60-150mm and gold balls of 35-100mm in diameter were prepared with extremely uniform diameters and high sphericity. After holding these micro-balls on through-holes of an arrangement plate by a vacuum suction method, the micro-balls were transferred onto the electrodes of the chips in order to form the micro-ball bumps. An excess ball eliminating system and a ball bouncing system were developed for arranging the ball successfully on the plate. The cycle time of the originally developed mounter was 20 seconds for a chip with 300 bumps. Both bumping on a single chip and on multiple chips in a wafer were possible. The micro-solder bumps were formed onto the electrodes covered with under bump metals (UBMs). The micro-solder-balls of 150mm in diameter were transferred onto the flux printed electrodes of a chip with 220mm pitch and 45x45 area array. The micro-solder bumps were uniform in composition volume, and height because of the use of the micro-solder-balls with precisely controlled diameter and composition. Using the micro-gold-balls of 35mm in diameter, the bumps with 50mm pitch were formed on Al pads by means of thermocompression bonding. Proposed micro-ball bump technology could be applied to bumping not only for FC interconnections, but also for TABs.

  • Improvement in thermal reliability in gold-aluminum bonds encapsulated in bi-phenyl epoxy resin

    T Uno, S Terashima, K Onoue, K Tatsumi

    1998 INTERNATIONAL SYMPOSIUM ON MICROELECTRONICS   3582   591 - 596  1998  [Refereed]

     View Summary

    Bond degradation of Au wire/Al pad has become a major problem, because of the use of molding resin with low thermal stability (ex. bi-phenyl epoxy resin) and the use of the IC devices under high thermal environments. it is therefore important to secure the Au/Al bond reliability under high temperatures. The lifetime to bond failure for bi-phenyl epoxy molding became shorter than that for cresol novolac epoxy. The failures were caused by the corrosion reaction of Au-Al intermetallics with bromine(Br) contained in the resin compounds. It was clarified that the reactive intermetallic was Au4Al phase formed in the bond interface.
    The governing factors of the bond corrosion were investigated such as resin compound, gold wire material. Especially impurities in gold wire could affect the Au-Al intermetallic growing and therefore retard the corrosion. The use of the alloyed wire was effective in improving the bond reliability.

  • 半導体実装におけるAu/Al接合信頼性に及ぼすAl表面自然酸化膜の影響

    柘植敦子, 水野薫, 宇野智裕, 巽宏平

    新日鉄技報   363   77 - 82  1997

  • 狭ピッチワイヤボンディング技術

    巽宏平, 宇野智裕, 尾上浩三, 北村修

    新日鉄技報   363   32 - 36  1997

  • Lattice location of B atoms in an intermetallic compound Ni0.75Al0.15Ti0.10

    Koki Tanaka, Eiichi Yagi, Naoya Masahashi, Yoji Mizuhara, Kohei Tatsumi, Tomoo Takahari

    RIKEN Review   16   5 - 6  1997

  • Gold diffusion and intermetallic formation in Au/Al2O3/Al film

    A Tsuge, K Mizuno, T Uno, K Tatsumi

    JOURNAL OF THE JAPAN INSTITUTE OF METALS   59 ( 11 ) 1095 - 1102  1995.11  [Refereed]

     View Summary

    Diffusion across the Al2O3 film in the Au/Al2O3/Al film system (the Al film with 1 mu m thickness was vapor-deposited on a SiO2/Si substrate and exposed to the atmosphere to form a natural oxide layer, then the Au film was deposited on it.) at temperatures between 25 degrees and 500 degrees C has been studied by using Auger Electron Spectroscopy, X-ray Photoelectron Spectroscopy and electrical resistivity measurement. The temperature where Al is detected on the surface of the Au/Al2O3/Al system is 100 degrees C higher than that on the surface of the regular Au/Al system without the Al2O3 film. The activation energies for the intermetallic layer growth of the Au/Al2O3/Al system and the Au/Al system are 110 and 72 kJ/mol, respectively. The Al2O3 film formed by the exposure in air (ca. 3.2 nm in thickness) acts as a barrier for diffusion in Au/Al. In addition, we observed the SEM image of cross section of the Au/Al2O3/Al system. The Au-Al intermetallic layer is formed in the Al layer in the initial stage of Au/Al2O3/Al diffusion by Bu diffusion through the Al2O3 film into the Al layer.
    On the other hand, we studied the effect of annealing environment on the diffusion for the Au/Al2O3/Al system by using O-18 as tracer for SIMS analysis. The Au-Al intermetallic layer grows in an island formation for the Au/Al2O3/Al system and when annealed in air, the number of islands decreases. Because, during heat treatment in air, the Al2O3 film is formed continuously by supply of O-2 to the Al2O3 film through Au film.

  • Development of ultra-fine pitch

    K Tatsumi, Y Ohno, T Uno, T Katsumata, O Kitamura, M Furusawa

    SEVENTEENTH IEEE/CPMT INTERNATIONAL ELECTRONICS MANUFACTURING TECHNOLOGY SYMPOSIUM: MANUFACTURING TECHNOLOGIES - PRESENT AND FUTURE     295 - 298  1995  [Refereed]

  • EFFECT OF ALUMINUM OXIDE FILM ON DIFFUSION AND INTERMETALLIC

    Atsuko Kuwabara, Tomohiro Uno, Kaoru Mizuno, Kohei Tatsumi, Yasuhide Ohno

    Trans.Mat.Res.Soc.Jpn.   16B   1241 - 1244  1994

  • TRANSFERRED BALL BUMP TECHNOLOGY FOR TAPE CARRIER PACKAGES

    K TATSUMI, T ANDO, Y OHNO, M KONDA, Y KAWAKAMI, N OHIKATA, T MARUYAMA

    27TH INTERNATIONAL SYMPOSIUM ON MICROELECTRONICS   2369   54 - 59  1994  [Refereed]

  • EFFECT OF AL2O3 FILM ON DIFFUSION AND INTERMETALLIC FORMATION IN AU-AL COUPLES

    A KUWABARA, K MIZUNO, K TATSUMI, T UNO, Y OHNO

    ADVANCED MATERIALS '93, III - A & B   16 ( A & B ) 1241 - 1244  1994  [Refereed]

  • Void Formation and Reliability in Gold-Aluminum Bonding

    T.Uno, K.Tatsumi, Y.Ohno

    Proceedings of the Joint ASME/JSME Advances in Electronic Packaging   1-2   771 - 777  1992

  • 金、銅ワイヤのボールボンディング特性

    宇野智裕, 巽宏平, 水野薫, 北村修, 大野恭秀

    ハイブリッドマイクロエレクトロニクス協会マイクロエレクトロニクスシンポジウム論文集     137 - 140  1991

  • A COMPARISON OF THE METALLURGICAL BEHAVIOR OF GOLD AND COPPER WIRES IN BALL BONDING

    T UNO, K TATSUMI, K MIZUNO, O KITAMURA, Y OHNO

    MECHANICAL BEHAVIOR OF MATERIALS AND STRUCTURES IN MICROELECTRONICS   226   43 - 48  1991  [Refereed]

  • LATTICE LOCATION OF B-ATOMS IN NI0.75AL0.15TI0.10 INTERMETALLIC COMPOUNDS AS OBSERVED BY THE CHANNELING METHOD

    K TANAKA, E YAGI, N MASAHASHI, Y MIZUHARA, K TATSUMI, T TAKAHARI

    NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH SECTION B-BEAM INTERACTIONS WITH MATERIALS AND ATOMS   45 ( 1-4 ) 471 - 475  1990.01  [Refereed]

  • 銅双結晶の結晶粒界における再結晶粒形成

    宇野智裕, 巽宏平, 水野薫, 北村修, 大野恭秀

    日本金属学会誌   52 ( 12 ) 1169 - 1178  1988

▼display all

Books and Other Publications

  • EV・HEV向け電子部品、電装品開発とその最新事例 「SiCを中心としたパワーデバイスの高耐熱実装技術」

    巽 宏平

    技術情報協会  2018

  • 放熱・高耐熱材料の特性向上と熱対策技術 「SiCパワーデバイスのための高温耐熱接合技術」

    巽 宏平

    技術情報協会  2017

  • 研究開発リーダー 「新規事業開発のための一次情報と内部情報の効果的収集の仕方」

    巽 宏平

    技術情報協会  2014

  • 市場開拓、開発テーマ発掘のためのマーケティングの具体的手法と経験事例集 調査データに基づいた評価、分析手法を実務で実践するには

    巽 宏平

    技術情報協会  2013

  • 2022年を見据えた研究テーマ発掘の実践ノウハウ集「新規事業における情報収集と研究開発」

    巽 宏平

    技術情報協会  2012.07

  • 研究開発リーダー これから研究開発のリーダになる人に知ってほしいこと

    巽 宏平

    技術情報協会  2010.11

  • 研究開発テーマの発掘法 「魅力ある研究テーマをいかに発掘するか」

    巽 宏平

    技術情報協会  2009.11 ISBN: 9784861043086

  • 新人研究者・技術者を育てる“躾け”の仕方 第7節 自律した研究者・技術者にどのように育てていくべきなのか

    巽 宏平

    技術情報協会  2008.10 ISBN: 9784861042676

  • 材料の振動減衰能データブック

    巽 宏平

    朝倉書店  2007.11 ISBN: 9784254201314

  • 最新エレクトロニクス実装大全集 上巻 一流企業実務者が明かす最先端の材料と技術

    巽 宏平

    技術情報協会  2007.06

  • 最新エレクトロニクス大全集 下巻 実装技術編

    巽宏平, 石川信二, 橋野英児, 田中将元, 佐々木勉, 内山朋之, 山本幸弘, 河野太郎, 宮内雅弘, 金子高之

    技術情報協会  2007.06

  • 半導体実装分野は金属材料研究課題の宝庫

    巽 宏平

    まてりあ:日本金属学会会報  2000

  • CSP/MCM実装テクノロジー

    巽 宏平

    サイエンスフォーラム  1999.06 ISBN: 491616427X

▼display all

Industrial Property Rights

  • 半導体素子接合構造、半導体素子接合構造の生成方法及び導電性接合剤

    巽 宏平, 田中 康紀

    Patent

  • 耐熱評価用TEG

    巽 宏平

    Patent

  • 電極接続方法及び電極接続構造

    6667765

    巽 宏平

    Patent

  • ⾦属ナノ粒⼦を⽤いた⾦属接合構造及び⾦属接合⽅法

    6384895

    巽 宏平

    Patent

  • ⾦属ナノ粒⼦を⽤いた⾦属接合構造及び金属接合方法並びに金属接合材料

    6384894

    巽 宏平

    Patent

  • パワー半導体モジュール装置及びパワー半導体モジュール製造方法

    巽 宏平

    Patent

  • 半導体装置

    巽 宏平

    Patent

  • 炭化ケイ素のコーティング⽅法、炭化ケイ素コーティング基材の製造⽅法、 及び炭化ケイ素コーティング基材

    巽 宏平

    Patent

  • スラッジ回収方法及び粉粒体の製造方法

    6251870

    巽 宏平

    Patent

  • 超音波ワイヤボンディング装置および超音波ワイヤボンディング方法

    5804644

    巽 宏平

    Patent

  • パワー半導体装置及びその製造方法並びにボンディングワイヤ

    5728126

    巽 宏平

    Patent

  • 電子部品の接合材、接合用組成物、接合方法、及び電子部品

    6061427

    巽 宏平

    Patent

▼display all

Awards

  • パワー・エレクトロニクス・アワード 2019最優秀賞

    2019.12   日経エレクトロニクス  

  • 日経BP技術賞

    2008.04  

  • 溶接学会マイクロ接合研究委員会 優秀研究賞

    1996.07  

  • ASME/JSME優秀論文賞

    1992.07  

  • SHM(エレクトロニクス実装学会)優秀論文賞 (橘記念論文賞)

    1991.05  

Research Projects

  • 太陽電池コンタクター長寿命化接続技術の基盤研究

    Project Year :

    2018.04
    -
    2021.03
     

     View Summary

    Niマイクロメッキ接合による太陽電池インターコネクター接合技術:太陽電池のインターコネクターは主として、シリコンと鉛ハンダと銅の3層構造で形成されている。鉛ハンダはセルのシリコンと熱膨張差が大きく、熱疲労による劣化やハンダの腐食による電気抵抗の増加などの欠点がある。それに代わる、Niマイクロメッキ接合による太陽電池インタコネクター接合技術の長期信頼性の検討をおこなってきた。昨年度までには、ニッケルマイクロメッキ接合のマイクロストラクチャーの制御について検討を実施した。2019年度は、主としてニッケルマイクロメッキ接合の長期信頼性の検証のために、ニッケルと銅の接合の長期疲労寿命を、従来のはんだ接合と比較した。銅試験片にNiマイクロメッキを両面メッキし、比較実験として、同じ銅試験片にハンダを両面ディップし、共振型疲労試験を行った。結果は、室温下(25 ℃)、メッキの疲労限は0.729 mmであり、ハンダの疲労限0.603 mmに対し、疲労強度を約2.2倍示した。高温下、メッキの試験温度がハンダより100 ℃高いにもかかわらず、疲労強度はハンダの約4.3倍を示した。つまり、メッキ接合の長期信頼性はハンダを遥かに上回ることがわかった。共振型疲労試験の続き、SEMによる疲労した試験片の断面および破面観察を行った。結果から見ると、室温に比べて、高温実験のき裂進展はメッキの方は大きく変化がなかったことに対し、ハンダは複数のき裂が見られた。これはハンダの中で、クリープとカーケンドール効果が生じたと考えられる。また、 EBSDによる観察の結果、NiマイクロメッキはY方向で<101>と<100>の柱状晶であり、250 ℃でアニールしても柱状晶を保つことができ、耐熱性に優れていることがわかった。組織制御、信頼性評価など基盤研究としての項目は順調に進捗している。動作確認などの実デバイスでの評価については、試験材料の準備を含め、検討を進める。基盤研究としての接合部組織制御、信頼性評価は完了し、本技術の優位性は明らかになってきているが、今後は、実デバイスへの適用と動作確認を実施したい。Si素子とのインターコネクションには、下地処理が必要であり、下地との接合信頼性を含めて、従来法との比較評価を行う。また簡易的に動作確認を行い、大型パネルでの実用性の研究開発への計画を立案する

  • 自動車向けSiC耐熱モジュール実装技術の研究開発

    NEDO  戦略的イノベーション創造プログラム(SIP)/次世代パワーエレクトロニクス

    Project Year :

    2014.09
    -
    2019.02
     

  • ナノNi粒子による応力緩和型高温実装用インタコネクション技術研究

    科学研究費助成事業(早稲田大学)  科学研究費助成事業(基盤研究(C))

    Project Year :

    2015
    -
    2017
     

  • 企業との共同研究

    Project Year :

    2010
    -
     
     

Presentations

  • 共振式疲労試験機を用いたNiマイクロメッキ接合の長期信頼性

    于昕光, 堂免凌太, 森迫勇, 小柴佳子, 飯塚智徳, 巽宏平

    日本金属学会 第167回秋期講演大会 

    Presentation date: 2020.09

  • 山形Cuリードを用いた基盤埋込型パワーデバイス実装技術の研究

    福井直生, 宮崎達, 小柴佳子, 飯塚智徳, 巽宏平, 糸瀬智也, 匹田政幸, 上村力也

    エレクトロニクス実装学会第34回春季講演大会 

    Presentation date: 2020.03

  • Cuコアボールを介したNiマイクロメッキ接合の高温信頼性

    小野寺巧, 富士原巧, 小柴佳子, 飯塚智徳, 巽宏平

    日本金属学会 第166回春期講演大会 

    Presentation date: 2020.03

  • 共振式疲労試験機を用いたNiマイクロメッキ接合の長期信頼性

    于昕光, 堂免凌太, 森迫勇, 小柴佳子, 飯塚智徳, 巽宏平

    日本金属学会 第166回春期講演大会 

    Presentation date: 2020.03

  • コールドスプレー法によるパワーモジュールヒートシンク作製と評価

    小柴佳子, 福森稔, 森迫勇, 飯塚智徳, 巽宏平

    日本金属学会 第166回春期講演大会 

    Presentation date: 2020.03

  • Niマイクロメッキ接合における接合部の高温信頼性

    小野寺巧, 中川将嘉, 和田佳子, 飯塚智徳, 巽宏平

    日本金属学会 第165回秋期講演大会 

    Presentation date: 2019.09

  • 高耐熱パワーデバイス用Niマイクロメッキ接合における電流密度の接合強度に与える影響

    中川将嘉, 小野寺巧, 和田佳子, 飯塚智徳, 巽宏平

    日本金属学会 第165回秋期講演大会 

    Presentation date: 2019.09

  • パワーデバイスNiマイクロメッキ接合による基板埋込型実装技術の検討

    福井直生, 中川将嘉, 宮崎達, 飯塚智徳, 巽 宏平

    JPCA Show アカデミックプラザ 

    Presentation date: 2019.06

  • Ni/Al2O3/Al薄膜における拡散挙動の加熱雰囲気依存性

    和田佳子, 田中康紀, 飯塚智徳, 巽宏平

    日本金属学会 第164回春期講演大会 

    Presentation date: 2019.03

  • Niマイクロメッキを用いた基板埋込型SiCパワーモジュールの評価

    宮崎達, 山口圭, 森迫勇, 和田佳子, 福森稔, 飯塚智徳, 巽宏平, 糸瀬智也, 匹田政幸, 上村力也

    第33回エレクトロニクス実装学会春季講演大会 

    Presentation date: 2019.03

  • Cuボールを介したNiマイクロめっき接合による新実装方式の検討

    富士原巧, 小野寺巧, 田中康紀, 森迫勇, 和田佳子, 飯塚智徳, 巽宏平

    第33回エレクトロニクス実装学会春季講演大会 

    Presentation date: 2019.03

  • スルファミン酸浴を用いたNiマイクロめっき接合による最適めっき条件及び接合信頼性

    JEONGBIN YOON, 富士原巧, 魏星, 田中康紀, 森迫勇, 飯塚智徳, 巽宏平

    第33回エレクトロニクス実装学会春季講演大会 

    Presentation date: 2019.03

  • パワーデバイス用Niマイクロメッキ接合の機械的性質と微細組織に関する検討

    塚智徳, 宮川麻有, 中川寛淑, 稲垣雅一, 巽宏平

    JPCA Show アカデミックプラザ講演論文集 

    Presentation date: 2018.06

  • パワーデバイス用Niマイクロメッキ接合の機械的性質と微細組織に関する検討

    宮川麻有, 木内隼人, 中川寛淑, 飯塚智徳, 稲垣雅一, 巽宏平

    日本金属学会 第162回春期講演大会 

    Presentation date: 2018.03

  • ナノNi粒子を用いた高耐熱接合技術の研究

    田中康紀, 若田健眞, 村川紀博, 飯塚智徳, 巽宏平

    JPCA Show アカデミックプラザ講演 

    Presentation date: 2017.06

  • パワーデバイス用Niマイクロメッキ接合の高温強度と接合信頼性

    木内隼人, 石井翔平, 中川寛淑, 田中康紀, 飯塚智徳, 亀井一人, 稲垣雅一, 巽宏平

    日本金属学会 第160回春期講演大会 

    Presentation date: 2017.03

  • Niマイクロメッキ接合における強度特性とメッキ処理条件

    中川寛淑, 飯塚智徳, 木内隼人, 田中康紀, 稲垣雅一, 亀井一人, 巽宏平

    日本金属学会 第160回春期講演大会 

    Presentation date: 2017.03

  • Niナノ粒子を用いた半導体インタコネクション技術の研究

    石井翔平, 田中康紀, 飯塚智徳, 亀井一人, 村川紀博, 巽宏平

    第31回エレクトロニクス実装学会講演大会 

    Presentation date: 2017.03

  • ナノAg接合における接合界面応力制御と高温信頼性

    趙力, 亀井一人, 田中康紀, 飯塚智徳, 巽宏平

    第26回マイクロエレクトロニクスシンポジウム 

    Presentation date: 2016.09

  • エレクトロニクス実装用ナノコンポジット材料の部分放電試験における温度依存性

    飯塚智徳, 李兆健, 林紀全, 田中祀捷, 巽宏平

    JPCA Show アカデミックプラザ講演 

    Presentation date: 2016.06

  • 高温耐熱実装用Niマイクロメッキ接合における下地銅の表面偏析と酸化析出挙動

    宮野遥, 田中康紀, 太田啓仁, 飯塚智徳, 橋口栄弘, 稲垣雅一, 亀井一人, 巽宏平

    第30回エレクトロニクス実装学会春季講演大会 

    Presentation date: 2016.03

  • パワー半導体実装におけるAgワイヤの高温信頼性研究

    魏星, 余宙, 徐婉朦, 飯塚智徳, 巽宏平

    第30回エレクトロニクス実装学会春季講演大会 

    Presentation date: 2016.03

  • Si粒子の酸化挙動と酸化抑制方法

    新井田誠, 巽宏平

    第63回応用物理学会春季学術講演会 

    Presentation date: 2016.03

  • Niマイクロメッキ接続における高温での下地銅の表面偏析と酸化析出挙動

    宮野遥, 太田啓仁, 田中康紀, 飯塚智徳, 橋口栄弘, 稲垣雅一, 亀井一人, 巽宏平

    日本金属学会第158回期講演大会 

    Presentation date: 2016.03

  • パワー半導体実装における Ag ワイヤの信頼性研究

    魏星, 余宙, 徐婉朦, 飯塚智徳, 巽宏平

    第25回マイクロエレクトロニクスシンポジウム 

    Presentation date: 2015.09

  • SiCパワーデバイスにおける電解ニッケルメッキ接合を用いた新たな高温耐熱実装技術の研究

    宮野遙, 加藤紀之, 田中康紀, 太田啓人, 飯塚智徳, 巽宏平

    JPCA Show アカデミックプラザ講演 

    Presentation date: 2015.06

  • エレクトロニクス実装用 コンポジット材料の部分放電試験における温度依存性

    飯塚智徳, 林紀全, 田中祀捷, 巽宏平

    JPCA Show アカデミックプラザ講演 

    Presentation date: 2014.06

  • ナノNi粒子による接合技術の研究

    田中康紀, 橋本卓, 飯塚智徳, 巽宏平, 野上敦嗣, 澤泰久, 石川信二, 松原典恵, 田中將元

    第28回エレクトロニクス実装学会講演大会 

    Presentation date: 2014.03

  • ナノNi粒子によるAl電極接合

    橋本卓, 田中康紀, 飯塚智徳, 巽宏平, 野上敦嗣, 澤泰久, 石川信二, 松原典恵, 田中將元

    日本金属学会 第154回春期講演大会 

    Presentation date: 2014.03

  • エレクトロニクス実装用 ナノ/マイクロ-コンポジット絶縁材料の開発

    飯塚智徳, 林紀全, 田中祀捷, 巽宏平

    JPCA Show アカデミックプラザ講演 

    Presentation date: 2013.06

  • パワーデバイス用高耐熱ワイヤボンディング

    余宙, 巽宏平, 濱田賢祐, 武内彰

    第22回マイクロエレクトロニクスシンポジウム 

    Presentation date: 2012.09

  • パワーデバイス用銅ワイヤボンディング

    余 宙, 巽 宏平

    第26回エレクトロニクス実装学会春季講演大会 

    Presentation date: 2012.03

▼display all

Specific Research

  • インターコネクション材料と技術の研究

    2020  

     View Summary

    電気機器の導電接続の接合はハンダが広く使用されてきた。ハンダ材料は、Pb-Sn系から環境対応Pbフリーハンダ、Sn-Ag系に置き換わりつつある。しかしいずれの材料においても、近年特にエネルギー変換デバイス例えば、自動車用パワーデバイスや太陽電池セルのインターコネクター等でハンダの接続劣化が製品寿命を支配する例が多く見られている。ここでは、新たに提案してきたニッケルマイクロめっき接合(NMPB)の研究に取り組んだ。太陽電池セルのインターコネクターの加速劣化評価では、ハンダ接続はセルの変換効率低下、腐食、熱応力によるインターコネクターの劣化が顕著であったのに対して、提案技術ではほとんど劣化が見られないことが明らかとなった。

  • 高耐熱鉄系合金の低温接合技術の研究

    2017  

     View Summary

    鉄系金属の接合は溶接、ろうづけ、超音波接合などの方法が実用化されている。溶接、ろうづけは広く用いられているが、被接合部が高温にさらされるため、材質の劣化が免れない。特に高強度材は溶接熱影響部の脆化、強度低下などが問題となる。超音波接合の場合には、被接合体の形状、サイズが限定される。ここでは、耐熱性、耐食性にすぐれたNiに着目し、ナノNi粒子による接合の可能性を検討した。これらは400℃以下で、ナノ粒子は焼結を開始し、鉄系材料との接合も可能であることを見出した。接合部界面の微細組織の解析から、Niナノ粒子は、酸化膜の存在下でも、接合が可能であり、その後の加熱において、異種金属の拡散、合金化が生じることが明らかとなった。

  • ナノNi粒子による応力緩和型高温実装用インタコネクション技術研究

    2015   田中康紀, 飯塚智徳

     View Summary

    インバータに使用されるパワーモジュールは、省エネルギー化、高耐熱化を目的として、SiC半導体を利用する検討がなされているが、未解決の課題も多い。その一つが高耐熱実装技術である。従来の半田材料や、Alワイヤに代わる、高融点材料による接続技術開発が必要である。本研究では、耐酸化性に優れたNiナノ粒子を用い、熱応力による応力の緩和を目的としてAlフィルムを挿入した応力緩和型の接続構造を検討した。AlとNIナノ粒子との接合部の信頼性、応力緩和効果について検討した結果、Alフィルムの効果が、実験と有限要素法による(Mark Menta使用)シミレーションの双方から確認できた。

  • 高信頼Agインターコネクション技術の研究

    2014  

     View Summary

    半導体の導電接続は、金、銅、半田などが多用されてきたが、銀はマイグレーションなどが懸念され、チップ電極の裏面、リードフレームのリードメッキなどの使用に限定されてきた。 近年、SiCなどの新規パワー半導体の開発が進展し、これらの特徴を最大限に引き出すために、高温で、高電流密度の使用が期待されてきた。しかし従来の、アルミニウムワイヤ、半田などの材料による接続は、高温での使用では、組織変化や溶融による不良が懸念され、高融点材料による接続が検討されてきた。ここでは、Alワイヤに代わる銅、銀ワイヤの検討をおこない、特に比較的加工硬化の少ない銀ワイヤが、接合性、接続時にチップへのダメージなどの点から優れていることが明らかにした。またAL電極との接合信頼性については、高温で金属間化合物が形成されているが、比較的Al厚みの厚い場合(4μm)には一定の、長期信頼性が確保できること、さらには、Ni/Au電極では、十分な高温信頼性が確保できることをあきらかにしてきた。

  • ナノNi粒子による高温実装用インターコネクション技術研究

    2014  

     View Summary

    近年、自動車やエレクトロニクス分野において材料接合のニーズは多様化しており、新たに接合技術が求められている。特に車載用のエレクトロニクス部品は高温耐熱化が求められており、またEVやHEV用のパワーモジュール に期待されているSiCデバイスの実装には、はんだ接合に代わる高耐熱性を有する新たな接合技術の開発が求められている。ここでは300℃以上の長期高温耐熱性を有し、接合温度が400℃程度以下の接合技術をターゲットとした接合方法として、金属ナノ材料の適応可能性の検討を目的とした。現在までに、鉛フリー化に伴った高温はんだ代替の接合材料としてAgナノ粒子、Cuナノ粒子による接合が検討され、ナノペーストなどによる接合性の研究がされているが、高温環境での酸化等の問題も指摘されている。新たな接合材料として、銀よりも融点が高く、耐食性に優れているNiに着目し以下の結果が明らかとなった。1. 高融点材料で耐食性も期待できるNiを用いた接合が、低温300℃程度で可能であることが分かった。かつ接 合後も300℃以上の高耐熱性を有していることが判明した。2. パワーデバイスにおけるダイボンディング部「素子裏面電極‐基板電極」あるいは、表面電極とCuリードの接合を 想定したナノNi粒子のAlへの直接接合について、Al蒸着Siチップ同士の接合実験で加熱・加圧を行うことにより十分な初期強度ならびに 高温保管での強度が確保できることが分かった。3. 実験熱膨張差による応力緩和に金属の中間層を設けた新たな接合構造は効果的である結果となった。今後は応力緩和層の厚みなどの最適化、熱サイクル試験による急激な温度変化による接合信頼性の検証を行う予定ではあるが、熱膨張差による応力問題の解決策として有効であると言える。そしてこの応力緩和層を設けた新たな接合構造は銀ナノ粒子による接合にも効果的であると考えられる。4. SiCダイオードチップを用いた高温環境でのデバイス動作テストを行った結果、加熱による接合部の劣化はなく、300℃程度の高温動作が可能であることが分かった。

  • ナノNi粒子とA1接合機構の解明と応力緩和構造の研究

    2013  

     View Summary

    パワーデバイスにおけるダイボンディング部「素子裏面電極‐基板電極」あるいは、表面電極とCuリードの接合を想定したナノNi粒子のAlへの直接接合について、ナノNiペースト、ナノNi溶液を用いた接合評価をおこなった。Al蒸着Siチップ同士の接合実験で加熱・加圧を行うことにより十分な初期強度ならびに高温保管での強度が確保できることが分かった。さらにAl表面へのナノNi溶液の塗布方法として静電噴霧法は選択的に電極への塗布が可能であり、一定の強度が得られていることから、ナノ粒子の塗布方法として有効であると考えられる。高融点材料で耐食性も期待できるNiを用いた接合が、低温300℃程度で可能であることが分かった。かつ接合後も300℃以上の高耐熱性を有していることが判明した。界面のSTEMによる観察からは、低温側では酸化物を介した接合が開始し、高温側ではAl/Niの金属結合が進行していることが確認された。パワーデバイス実装への適応において、銅基板とSiまたはSiCチップとの熱膨張差から生じる応力の緩和については、Niナノ粒子層に応力緩和層を用いることで十分なな接合強度が維持できることがわかった。さらに最適な応力緩和層の配置と物性の検討を有限要素法によるシミュレーションも併用して検討する予定である。 またSiCダイオードチップを使用して、ダイボンディング部の「素子裏面電極―基板電極」の接合をナノNi粒子により行い、高温環境及び高温保持試験後において回路として正常に動作することを確認した。以上の結果から、ナノNi粒子は塗布方法のさらなる検討が必要ではあるが、ダイボンディング部の高耐熱実装技術として実用的かつ有効な接合技術であると考えられる。なお、粒子サイズによる接合強度の比較で、接合温度300℃では、粒子サイズの大きい方が接合強度が高くなる結果に対しては、小粒径の粒子では、表面の酸化膜量が相対的に多くなることが原因しているものと考えられた。このことから、表面活性を高めた小径のものと、酸化膜量を相対的に提言した大径の粒子複合化による最適なナノ接合材料の検討が必要と考えられる。

  • 省エネルギーSiCデバイス高温実装用Agインタコネクション技術研究

    2013  

     View Summary

    SiCチップ電極とワイヤボンディング接続信頼性の評価と支配要因解明: 予備実験より、Al電極へのAgワイヤの接合は、Al/Ag化合物の形成にともない、ボイドが発生し劣化すると考えられていた。しかしその機構は必ずしも明らかにされていなかった。そのため、初期のAlの電極厚さ、加熱温度、加熱雰囲気、初期ボンディング強度(初期接合状態)を変化させ、Al/Ag接合の拡散挙動と接合強度変化を調査した。その結果初期強度が高く、Alの電極厚さが4μmのものでは、300℃、100hの加熱条件でも強度劣化は見られなかった。 一方、初期強度が比較的低く、Alの厚さが1μmのものでは、同様の加熱条件で、強度は顕著に劣化した。従来Al/Agの金属間化合物の成長にともない、ボイド形成が進行し劣化すると考えられていたが、ボイド形成は、金属間化合物の形成形態により、ボイド形成の核の生成の有無により異なることが示唆される結果がえられた。 また加熱雰囲気が大気、真空ではその違いは顕著ではなく、従来報告されているAl/Ag接合対の劣化は、主として、樹脂封止中で認められており、化合物の腐食反応と密接に関連しているものと考えられた。電極材料の検討では、Ni/AuへのAg接合について検討したが、いずれの条件でも劣化は見られず、安定した接合部の信頼性が確保できるものと考えられた。 またAgワイヤの合金化(Au、Pd)は、大気、真空雰囲気では、接合部の信頼性にかかわる改善は見られないことから、樹脂成分による耐腐食に効果があるものと推定される。なお電気抵抗は合金化により4倍程度となり、今後の実用化としては、優位性が顕著ではなかった。またワイヤ表面の耐腐食コーティングは、有効であり、長時間大気中での放置においても、接合性の劣化は見られなかった。電気抵抗の上昇は1割以下であり、またコスト的な課題も大きくない。今後は、LSIおよびSiCパワーデバイスを想定し、Ni電極層を主とし、厚みならびにワイヤ材料のさらなる高温長時間の拡散挙動への影響を調査する。また太線Agワイヤの超音波接合による塑性変形を考慮した拡散対での界面拡散挙動を評価し実用可能性を検証する。さらに拡散シミュレーションとの比較から、SiCチップ電極とAgワイヤの最適構造の提案を行う。

  • 省エネルギーSiCデバイス高温実装技術研究

    2011  

     View Summary

    研究成果概要:省エネルギーSiCデバイス高温実装技術研究①(高温実装用)SiC(Si)チップ電極と基板のワイヤボンディング接続技術確立:太線ワイヤボンディングの検討をAlに加えて、Cuワイヤを用いて接合実験をおこなった。Cuワイヤの場合は、チップへのダメージはSiチップでは、顕著にあらわれ、接合マージンが狭くなるが、ボンディングステージを加熱することで、大幅な改善がみられることがわかった。酸化防止をおこないながら、さらに高温で接合することが今後の検討課題である。②(高温実装用)SiC(Si)チップ電極と基板とのフリップチップ接続(直接接合)技術確立:高温実装用フリップチップ化の基礎検討として、ナノ金属による接合、マイクロメッキによる接続、静電ジェット噴霧による接続(接合)について、調査をおこなった。ナノ金属による接合については、ボイド、空隙の対応のための複合化を中心に検討した。耐熱性は劣化するが、従来の導電樹脂等と比較して各段の耐熱性向上の確認ができた。マイクロメッキによる接続については、Niメッキによる導電接続の基礎検討をおこない、良好な接続と強度が確保できることが判明した。デバイス構造を想定した試験による応力に対する信頼性など、今後の検討課題となるが、実用の可能性が十分あるものと推定された。最適接続構造と合わせて検討が必要である。静電ジェット噴霧接続については、あらたな装置導入により、ナノ溶液の塗布実験を開始した。良好で比較的均一な塗布が可能であることが判明した。ナノ粒子の接合、凝集化が課題となるが、層状塗布中の加熱などあらたな緻密化の検討が必要であることが分かった。③信頼性実証ナノ金属の適用に係る信頼性課題を中心に検討した。ナノ金属は低温で接合が可能で、比較的高融点の金属を用いることで、高温の接続信頼性に優位性をもつと考えられる。しかし粒子の接合、凝集時に発生する応力やボイドが課題となることから、加熱接合の粒子の挙動について調査した。粒子間の接合(表面近傍拡散)は十分に行われるものの、物質(接合粒子)の移動が十分ではなく、ボイド、クラックの発生原因となって、信頼性低下の原因となる。塗布方法の検討あるいは、材料複合化により、より実用的な使用方法についての継続的な検討が必要である。

▼display all

 

Syllabus

▼display all